Intel appears to have understood the limitations of using a shared front side bus in multiprocessor configurations... Hopefully. Look:
Hopefully, the dual core chips get the opportunity to use either a faster FSB or a dual FSB.
From the <A HREF="http://www.theinquirer.net/?article=17802" target="_new">Inquirer</A>...Twin Castle will support <b>dual front side buses</b>, DDR2-400 memory, EM64T, PCI Express and direct connect storage components. The "Cranford" chip will target the value end of the four way market.
Hopefully, the dual core chips get the opportunity to use either a faster FSB or a dual FSB.