Sign in with
Sign up | Sign in
Your question

Clockless cpu, Intel in deep...

Last response: in CPUs
Share
March 11, 2001 8:45:22 PM

Sun Microsystem is attempting to develop a clockless cpu. Apparently this will enable a huge speed increase while also reducing the power consumptions - something we definetly need.

I wonder when it will be available. Also, wonder how intel will deal with it when all of this technology actually starts getting implemented. Because, all their sale and marketing seems to be based on clock speed rather than performance.

I suppose they're just gonna have to embrace the technology and hope their brand name still carries value. Especially when there are plenty of competition from all directions.

I wonder how much of an improvement this technology will allow, and how they're gonna measure & describe the different models of the cpu's. perhaps they're gonna start using mips or bips or whatever it may be.


<b>Related info</b>

<A HREF="http://www.theregister.co.uk/content/2/17356.html" target="_new">The Register</A>
<A HREF="http://www.async.elen.utah.edu/~async01" target="_new">Async2001 conference</A>
<A HREF="http://www.cs.man.ac.uk/amulet" target="_new">AMULET project</A>



<i><b><font color=red>"2 is not equal to 3, not even for large values of 2"</font color=red></b></i>
March 11, 2001 9:18:58 PM

a clockless cpu means what? No matter what kind of computer we develop, it will have to processing information with respect to time. Even a quantum computer will be with respect to time...although it will be mostly with respect to the speed of light.

<font color=red>This is a forum, not a chat room. You aren't going to find a date here.</font color=red>
March 11, 2001 10:43:08 PM

how the hell would the do that? that's like trying to build a car that really isn't there

-----------------
"648kb is all the space anyone will ever need!"

Bill Gates, 1980s
Related resources
a b à CPUs
March 12, 2001 2:40:06 AM

I believe it means no set clock, like playing the piano without a metronome. The thing will process information as fast as it can, full tilt all the time. You would have to measure such a processor in data units instead of clock cycles. It would not necessarily perform better.

Suicide is painless...........
March 12, 2001 2:50:16 AM

well a "clocked" cpu has a timing mechanism that keeps every calculation and permutation in synchronous order. that means one really intricate calculation will be done at the same time one really simple calcuation is done. a "clockless" cpu takes out the timing and allows each part of the cpu to move as fast as it can, so complicated calculations are done while 10 simple calcuations are done. you can see how this will speeds things up, it was actually in popular science a while ago, pretty cool stuff

My name is Mud.
March 12, 2001 8:21:54 AM

If you followed the links then perhaps you'd understand. I'm no expert in Asynchronous Circuit Design, hell I don't even no the first thing about it. But I will try to summerise what the experts are saying.

In the beginning when there were loadsof computer designs floating around, John von-neumann built ORDVAC - a computer with no clock. It wasn't the only design, but it is proof for you that it can and has existed.

There loads of asynchronous logic designs that can be implemented, not sure which one sun will be using though.

I'll put a whole section in from the Manchester university cs department website.

<i>
There are many different flavours of asynchronous logic, and they are as different from each other as they are from synchronous design. However there are a few key features which describe most current approaches, and these can be seen as binary choices:

<b>Dual rail encoding vs. data bundling.</b>
In dual rail encoded data, each boolean is implemented as two wires. This allows the value and the timing information to be communicated for each data bit. Bundled data, on the other hand, has one wire for each data bit and a separate wire to indicate the timing.

<b>Level vs. transition encoding.</b>
Level sensitive circuits typically represent a logic one by a high voltage and a logic zero by a low voltage. Transition signalling uses a change in the signal level to convey information.

<b>Speed-independent vs. delay-insensitive design.</b>
A speed independent design is tolerant to variations in gate speeds but not to propagation delays in wires; a delay insensitive circuit is tolerant to variations in wire delays as well.
</i>

Synchronous (clock based) systems are where the whole system is either a clocked finite state machine itself, or a composition of severel subsystems of similar nature. Each state is held in a flipflop (i.e. registers).

The inherit problem with the clock is that the clock signals are nothing more than electrical signals that must propogate to all their destinations and are subject to any delays travelling the distance. This can bring about a clock skew.

For a microchip the clock skew can be handled quite easily for upto 50mhz, but any speeds above that can cause severe porblems. <i>Phased loops</i> (I think thats what they're called) can be placed to compensate for the variances, but this slows down the entire system in order to synchronise it. As chips are getting larger, and clocks faster, the whole skew problem is getting worse.

The clock also causes immense energy dissepation, and thus heat dissapation. The CMOS gates only release energy when they are switched. In asynchronous systems it means only when processing somehting. In synchronous ones however, it means energy is dissapated everytime a clock signal is generated. and its not only the clock that dissapates the heat but also any and every system to which it is connected. A lot of gates are switched just to acknowledge the reception of a clock signal.


Grizley1: no it isn't.



<i><b><font color=red>"2 is not equal to 3, not even for large values of 2"</font color=red></b></i>
March 12, 2001 2:25:30 PM

Then without a clock speed wouldn't it just speed up as fast as it will go and either wear itself out or burn up? they must have some type of "governor" device.

-----------------
"648kb is all the space anyone will ever need!"

Bill Gates, 1980s
March 12, 2001 2:27:03 PM

Don't understand, why should that happen?


<i><b><font color=red>"2 is not equal to 3, not even for large values of 2"</font color=red></b></i>
March 12, 2001 2:46:43 PM

well the clock speed keeps it all "together" i guess. the faster the clock speed the faster the CPU is allowed to run, basically if you cpu is 1100MHz that would be a certain number of calculations/sec, more of course than say 700MHz. If there was no clock speed, wouldn't the cpu try to go as high as possible, since there is nothing to keep it in line

-----------------
"648kb is all the space anyone will ever need!"

Bill Gates, 1980s
March 12, 2001 2:52:44 PM

i think i am explaining it wrong.... i know what it is in my head but i can't put it into words.... i wil just forget it. :smile:

-----------------
"648kb is all the space anyone will ever need!"

Bill Gates, 1980s
March 12, 2001 3:06:10 PM

No, I think your on to something, Grizely1. You should call up the University of Utah and tell them to pull the plug before they waste too much money on this project. LOL
March 12, 2001 4:02:05 PM

it's those t-bird melting fumes, get out of you basement and get some air.

AMD just took out your frontal lobe, Dr. lechter is so envious.

"Amd cpu...Gone in 2 secs flat, it truly is a fast chip!"
March 12, 2001 4:09:02 PM

Intel took out your whole freakin' brain.

-----------------
"648kb is all the space anyone will ever need!"

Bill Gates, 1980s
March 12, 2001 4:09:29 PM

I think this may help explain the differences between a clocked CPU and a clockless CPU:

A clocked CPU:
Every component works on a cycle dictated by the clock. Each component performs one operation per clock cycle which is calculated approximately by taking the multiplier times the FSB.

So even though a single ALU might be able to perform three and a half operations per clock cycle, to keep it synchronized with the rest of the CPU, it only perfoms one operation and remains dormant through the rest of the clock cycle.

Also, each component in the CPU will not process another command until it finishes the first command. All components are synchronous. And to keep the components synchronized at high clock speeds, sometimes additional waiting is required.

Say you had an instruction come in that required ten ALU calculations and four FPU calculations. Now say that the chip had four ALU components and two FPU components.

The CPU sends out the calculations to be done. In the first clock cycle the ALUs knock out 4 of the ALU calculations, leaving 6 left. Two of the 4 FPU calculations get finished by the FPUs. The second clock cycle, another 4 ALU calcs are finished, and the final two FPU calcs are done. In a third clock cycle the final 2 ALU calcs are done while the FPU sits there doing nothing and the other two ALUs do nothing as well.

Now in this three clock cycles the CPU has finished processing the data, but the FPU remained dormant during the third clock cycle to remain synchronous.

A clockless CPU:
Each component in the CPU works as fast as it can without any clock limitations. Or more correctly, each component works on it's own individual clock. And a controller sends tasks to components as tasks come up.

So the same ALU that was in the clocked CPU in a clockless CPU can perform it's 3 and a half operations per 'controller cycle' now, instead of being limited to only one. This lets it act as though it were three and a half ALUs. And component operating time is no longer wasted on synchronization. In the above example a clockless CPU with the same instructions could perform 12 ALU calcs in the first time period and two FPU calcs. Had there been more ALU calculations, the ALUs could have even been halfway into their next four calculations. In the next time period it would perform the final two FPU calcs. But it would also use the remaining processing power to calculate 12 (and a possible 4 halves) of the ALU calcs for the next instruction.

The difference between a clockless CPU and a clocked CPU is that the components in a clockless CPU are never dormant unless there really is no data to process. So instead of a clock synchonization being used to keep the calculations together in the form of a single answer, a controller will be used to put together the returns from each unit unto the solution to the processed command.

So instead of a CPU being measured in terms of clock speed and how many ALUs and FPUs it has, it will now have to be measured in terms of controller speed, ALU speed, number of ALUs, FPU speed, and number of FPUs. Or, more simply, how many ALU calcs and FPU calcs can be performed in the cycle of the controller.

So the chips can still be sold in terms of clock speed because the clockless chip will still probably have a clock on the controller, but the difference bewteen the number of caclulations per 'cycle' is dramatically different between the two types of chips.

And, in theory at least, it sounds like the chip would burn itself out faster. Certainly in terms of life span, this may indeed be true because it's forcing each component to work harder. However, how long do chips go now before they litterally die of old age? I still have x86 chips that work that have existed and been heavily used for over six years.

Say that the lifespan of today's chip is even 15 years under average use. In a clockless system, stressing the components like this may make it last only 10 years. Put it under heavy use and it's still 7 to 5 years before it'll die of old age. And really, how many heavily-used systems last 5 years without being replaced with something newer?

At least this is how I understand the concept of the clockless CPU to work. If I have any of it wrong, I'd love to hear how so. :) 

- Sanity is purely based on point-of-view.
March 12, 2001 4:17:16 PM

Even if Sun pulls off the development of a good solid clockless CPU, it'll be in the server market. And most of Intel's profit isn't in servers. Since the two companies don't really compete against each other much, I don't see how it will affect either company much if Sun succeeds.

The only difference is that eventually Intel will use the technology for their chips and make us use it if it turns out to be as good for performance as we all hope. But that'll be at least a year after Sun has been using their chips.

And AMD, if they can get their R&D together, will probably release their clockless CPU six months to a year after Intel. ...If they do at all that is.

- Sanity is purely based on point-of-view.
March 12, 2001 4:28:00 PM

Exactly my point! It runs as fast as it can. But, when you run a clocked cpu as fast as it can (OCing) it wil burn out, etc.

what stops the clockless cpu from running too fast?

-----------------
"648kb is all the space anyone will ever need!"

Bill Gates, 1980s
March 12, 2001 4:45:45 PM

Can't you make any intelligent comments. or is that far beyond your capabilities, and vocabulary.

Have you been to college? or school?

No flames here.



<i><b><font color=red>"2 is not equal to 3, not even for large values of 2"</font color=red></b></i>
March 12, 2001 4:48:10 PM

I still dont think its like that. Even if it is, I'm sure they'll take that into consideration. Also, the whole cpu will no longer be as fast as its slowest component.


<i><b><font color=red>"2 is not equal to 3, not even for large values of 2"</font color=red></b></i>
March 12, 2001 5:00:39 PM

I believe that each component in the clockless CPU will run at it's own speed. That keeps each component from running too fast.

And there will probably a central routing controller which will break down commands and send the information to each individual component to process, and then take their responses and put it together again as a united answer.

It would be like a multi-threaded computer program in many respects. A main routine would recieve a command. It then breaks that commands into sub-commands. Then it calls sub-routines to process each sub-command as a seperate thread. Then when each sub-routine has returned it's answer, the main routine puts it together as a whole and gives the solution to the command.

Only this is a CPU, so it's some sort of controller instead of a main routine. And it issues commands to ALUs, FPUs, and other components instead of to sub-routines.

- Sanity is purely based on point-of-view.
!