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Palomino Manufacturing Process?

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Anonymous   03-22-2001 at 08:49:06 PM

Does anyone know what process the Palomino is going to be manufactured on? I thought it was supposed to be 0.15u, but some other people say that it'll still be the 0.18u, like the current Thunderbirds. Dresden is ready for the 0.15u manufacturing process AFAIK.

Can anyone help in this regard? Thanks.

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Anonymous   03-22-2001 at 09:31:09 PM
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No one know? Well, I've mailed AMD. Hopefully they respond before the next millenium. ;)

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Nikko   03-22-2001 at 11:48:17 PM
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Palomino will be on the same process as T-bird. Thoroughbred will be .13u with SOI.

<P ID="edit"><FONT SIZE=-1><EM>Edited by Nikko on 03/22/01 05:50 PM.</EM></FONT></P>

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ksoth   03-23-2001 at 01:44:03 AM
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Yes, Palomino is at .18 micron, but with silicon on insulator technology, which is a better manufacturing process than current .18 micron. AMD will not use .15 micron technology, but will do .13 micron later. I think it is Via with their Cyrix III processor that will be using a .13/.15 micron hybrid process (or is it .15/.18??).

"We put the <i>fun</i> back into fundamentalist dogma!"

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Anonymous   03-23-2001 at 06:50:03 AM
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Sorry, but AMD is not using SOI until they move to .13 micron. Perhaps you have SOI confused with the rumors of AMD using isotopically pure silicon for Palomino which is not the same thing.

Here's a page that discusses HiP7, AMD and Mots process that uses SOI:
<A HREF="http://www.chip-architect.com/news/2000_11_25_AMD_process_tech.html" target="_new">http://www.chip-architect.com/news/2000_11_25_AMD_process_tech.html</A>

<P ID="edit"><FONT SIZE=-1><EM>Edited by Connie on 03/23/01 00:58 AM.</EM></FONT></P>

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yoda271828   03-23-2001 at 06:16:51 PM
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Nikko and Connie are correct, the Palomino will be 0.18 micron. AMD will skip the 0.15 micron, and go straight to 0.13 micron with the Clawhammer and Thoroughbred in Q1 2002.

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