333MHz FSB and DDR333 capable 735 chipset

[Makaveli]

It will be sometime before it's released but it is being worked on! And thank god the Athlon needs a FSB increase like the P4 needs a real FPU.

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[juin]

I dont know where thay have take that.Becase athlon dont not have 333 mghz FSB.I think they misunderstood with there SIS 645 for P4.

 

[khha4113]

Can't you read it right?

<b>>> Yesterday in an AMD development seminar in Japan, SiS revealed its 333MHz FSB and DDR333 capable 735 chipset . Furthermore, this chipset uses <font color=red>AMD’s Hypertransport</font color=red> technology for higher <font color=blue>transfer speed between the North Bridge and South Bridge</font color=blue>, which is also featured in Nvidia’s upcoming nForce chipset.<<</b>

Didn't P4 have 400MHz FSB already?



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[zengeos]

The new MB's with 33mhz and faster FSB's for Athlon are for the version of Athlon being developed and sampled for release in the spring, is my guess.


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[wapaaga]

actuall the eve6 bus desing supports up to a 400 mhz ddr bus speed

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[Guest]

The 333MHz FSB is actually only a 166MHz FSB in actual clock speed; but it is double pumped (i.e. DDR) so it gets two transfers per clock signal: 166 x 2 = 332. But 333Mhz looks better, so they rounded it up.

AMD's current processors use a 266MHz FSB (which is really only a 133MHz clocked bus, with dual tranfers). Earlier processors were 200MHz FSB (again, really only 100MHz clock).

So, the 166MHz FSB (333MHz effective rate) seems to be the next logical step for increasing the clock speeds of things. No, they don't officially have it yet, but that is where they are going and that is what the SiS735 chipset ALREADY supports...again, just not totally official. (Although this news bit pretty much makes it official...) DDR memory is also moving to that same clock rate. There is a spec out there in Standards Land for DDR333 SDRAMs (may not be finalized yet, though). (So, is 333MHz the next 'technically' logical step, or did AMD and memory standards bodies agree to make that the next step? If they did, I would assume that there was technological reason behind it.)

I won't get into the P4's bus speed because I just had second thoughts about what I was going to say. I believe that they use the same kind of trick with their bus speeds: the specified speed is usually 'effective speed' (the multiplied result) instead of the actual clock speed. (Rambus memory works at a 200MHz bus that is quad pumped and therefore gets rated as 800MHz RDRAM. At least the 800 stuff does. The slower versions - 700 and 600 - use a slower clocked bus that is still quad pumped.) But I wouldn't want to post something inaccurate and get flamed to death.

Justin

 

[lhgpoobaa]

suprised they arnt squeezing another speed step inbetween 133(266DDR) and 166(333DDR), namely 150(300DDR)

would be easy to implement as officially rated 300Mhz DDR is already being produced by corsair.

dont know about 333DDR though yet.

I'll respect your comments & opinions, even if i disagree with them, Provided you display maturity.

 

[Guest]

sis 735 is made on a 0.18 micron process thats why it scales so high

 

[Makaveli]

I didn't know it was manufactured on 0.18 Micron process
but makes sense! I think AMD will need to have there cpu's ready for this when intel takes P4 to 133FSB!

By then the Athlon will be on a 0.13 micron process and hopefully they add 512 L2 Cache as intel is doing with Northwood!