Help with CPU Speeds

Yes, an AMD can do more instructions per clockcycle. However, that is not the only issue.

Sometimes, processors need to streamline a command. Some streamline some more than others. Not all commands take a single operation to complete, and some of the more complex ones can bog a CPU down. That is was MMX/3DNow! and the SSE and SSE2 instruction sets are supposed to help do. They are instuctions that take fewer opperations.

So, what it comes down to, is that one CPU has streamlined their instruction set better. However, there are other things too.

FSB is great, but only if you actualy use it. The bandwith on the P4 is increadable, but the CPU doesn't need it 99% of the time, so it realy doesn't do that much. Unfortunately, the AMD chip is on the other end of that, where it could use more Bandwith than it has quite often. This is where the newer DDR333 and DDR400 technologies fit in.

Interestingly enough, P4s on DDR systems perform almost identicaly to systems with RDRam.

60 FPS, 70 FPS, 80 FPS Crash!
Daylight comes and I have to go to work :frown:

There are two key factors to the Athlon XP's superior performance, Cache size and superior FPU, both of which should be even when Intel releases the northwood. The Athlon XP has significantly more L1 cache than the P4. This decreases the access to RAM. When there's a lot of cache the speed of the bus and memory isn't as important. This is why an Athlon is faster in Business apps than a P4 although it has a slower FSB. Secondly, the Athlon XP has a superior FPU (Floating-point unit). The FPU is used in games and other CPU intensive apps. As far as I know, the Athlon XP has 3 fully functional FPUs working in parallel, which is why it is extremely fast per clock cycle.

AMD technology + Intel technology = Intel/AMD Pentathlon IV; the <b>ULTIMATE</b> PC processor

From the details I've read, it's all due to something more insidious...the P4's 20-stage deep pipeline causes branch mispredictions. The time it takes to retransmit data results in a certain amount of "lag", meaning that for the P4 2.0GHz is not really 2.0GHz because of mised cycles. If 1 out of three cycles is missed, it will be 1/3 slower. Someone else want to explain this phenomena in more datail?

Back to you Tom...