Yeah Microsoft have not offically stated if they will be bringing out a 64bit version on Windows XP for Hammer.
I think AMD might have a tough time getting Microsoft to support x86-64. The reason I say this is not because x86-64 is hard to code or is inferior, but because of the architectural features of the Hammer Platform (which I will talk about later )
If Microsoft to release a x86-64 version of Windows XP it will mainly be used in Hammer based 2-4 way servers and will not be avaliable to home users.
I fear enthustiasts like us will be stuck with Win XP (32 bit) and it will be highly unlikley that Microsoft will produce a x86-64 'Home Edtion' version of XP. A x86-64 'Professional Edtion' of Win XP with multiple CPU support is more likley.
Going back to the architecture of the Hammer. First and foremostly the Hammer architecture is very diffrent. AMD have decided to go for the ccNUMA architecture instead of the tradtional SMP that Intel have stuck to.
As far as I know Microsoft have had little experience of developing an OS for ccNUMA based systems so are likly to come across new challeges.
ccNUMA architecture with multiple processors will present a serious rethink in the way the OS manages system memory, because we are now dealing with 'local' and 'non-local' memory access. Ultimately the way the OS manages and allocates memory for programs will affect the speed of the system greatly.
In SMP configuration (what Microsoft OS's are used to) the memory is logically treated as one block therefore it matters little of where data is stored in memory since all the memory resources are 'local' to the CPUs.
In NUMA, access to 'local' memory will take less time that access to 'non-local' memory. The OS has to decide where to store data either 'locally' to CPU or 'non locally'. The choice will depend on which processor needs the data the most. If a processor is working on a thread that requests specfic program data all the time the OS should store the program data locally to that CPU and not to anothers CPU memory block. You can imagine how important this will become especially when you add more CPU's (i.e 4-8 way systems). It would to liitle justice if program data was scattered all over the system (we want to minimise the number of requests a CPU has to make to another for a piece of data). Hammer systems might face this problem if the program data cannot wholly fit into one location.
Another problem also comes into play that is 'Integrity of data'. If the same piece of data is stored twice so that each CPU ie. (CPU1 and CPU2) has a working copy it can work with (thus minimising requests) which will be treated as the orginal source ?..if an update is made by CPU2 to memory how will CPU3 decide which data to use ? The updated version stored in local memory to CPU2 or data stored locally in CPU1 ?
In a SMP system data integrity or cache coherency is achieved by the system bus.
<i>In Intel servers this is referred to as a "snoopy" bus, as the CPUs can "snoop" on each other and see each other's memory requests. This is how cache coherency is handled. If a CPU sees that another CPU is requesting a memory address that it owns (has the latest copy of the data), the CPU will respond to the request and deliver the data from its cache. A CPU will request ownership when it wishes to write to an address, and will keep it until it "ages" the written data out to the memory or until another CPU requests
ownership.</i> (Source: Cellular MultiProcessing and Uniform Memory Access, UNISYS, Dec 1999)
In general I am aware solutions to these NUMA problems have already been solved, the question is whether Microsoft wish to develop a OS that not only supports x86-64 but also a new system memory architecture.
I am not slating AMD Hammer systems, in fact I think they look quite promising. I am just wondering whether AMD have enough experience behind them to deliver a decent NUMA based server that will challege Intel and other server manufactuers. Microsoft just presents another can of worms, a simple recompile won't work, the code which handles memory allocation will need to be rewritten. However with normal applications a recompilation is feasible, providing it is designed to work on a single processor PC.
Please feel free to argue or add to my comments as I could be talking a load of shite...I am not a programmer or platform/cpu expert.
<font color=purple>~* K6-2 @ 333MHz *~
I don't need a 'Gigahertz' chip to surf the web just yet ;-)</font color=purple><P ID="edit"><FONT SIZE=-1><EM>Edited by mr_gobbledegook on 12/16/01 03:33 PM.</EM></FONT></P>
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