AMD mounting spec changed?

Story over here:

<A HREF="http://www.heatsink-guide.com/" target="_new">http://www.heatsink-guide.com/</A>

it doesn't make much sense... though supposedly it stems from not being serious partners with kyrotech anymore...
check [H]

Engineering is the science of making life simple, by making it more complicated.

LoL, I hope that was a joke crash, the tbred will make heatsinks smaller, till the hammer, the holes arent needed anymore.


ALso, all motherboards out now still have the holes, and they probably will for some time, so its not that big of a deal at all.

"The Cash Left In My Pocket,The BEST Benchmark"

The boards will have the holes for the forseeable future, and the holes do cause genuine technical problems, so I dont see a problem.

"The Cash Left In My Pocket,The BEST Benchmark"

The new faster motherboards dont neccisarily need not have the holes, so I imagine you will be able to get a holed mobo for quite some time.

"The Cash Left In My Pocket,The BEST Benchmark"

Already have 333fsb mobos with holes, id say it was a safe bet.

"The Cash Left In My Pocket,The BEST Benchmark"

something to keep an eye on though.

i know... i think ill write an "ideal mobo wishlist" over in the mobo section

Toms Forums. Destroying my sanity
one braincell at a time.

I can imagine that. AMD and Intel are by no means perfect which is why I want a Pentathlon!

AMD technology + Intel technology = Intel/AMD Pentathlon IV; the <b>ULTIMATE</b> PC processor

I COULD but it wouldn't be worth my time!

What's the frequency, Kenneth?

I actually have to agree with Crashman. Both companies are purposely holding back on performance lately.

As for the holes, it isn't just the overclockers who are losing out here. It is also the professional workstation developers who simply want the absolute most assurance that when the abnormal happens, their system won't become a worthless pile of charred rubble.

<pre>If you let others think for you, you're the
only one to blame when things go wrong.</pre><p>

Give me an Nvati GeForeon 9000 any day!

AMD technology + Intel technology = Intel/AMD Pentathlon IV; the <b>ULTIMATE</b> PC processor

Perhaps there should be a poll started here on who uses them big a** heatsinks to overclock? Do any of you in this thread overclock your AMD's? It doesn't seem to bother anyone here so I will assume for now you don't, but there is a lot of dismay being voiced around other places on this issue.

According to HardOCP they have. The original PDF is on AMD's website, as well. Check HardOCP for more info.

<font color=orange>Quarter</font color=orange> <font color=blue>Pounder</font color=blue> <font color=orange>Inside</font color=orange>
Don't step in the sarcasm!

<A HREF="http://www.anandtech.com/showdoc.html?i=1600&p=2" target="_new">This</A> is what the back of the Solo (Hammer mobo) looks like. The mounting for Hammer CPUs will be more like the P4, with the addition of a metal backing to prevent the bowing seen in P4 motherboards using the new rentention mechanism. As to the Athlons, I see AMD moving to making them "budget" chips, much like the current Durons, while the Hammer becomes the bleeding edge. So, since most hardcore overclockers use the top end CPUs of Intel and AMD (or at least the non-budget versions), it'd be safe to say that the new mounting specs are to make Athlon boards cheaper, and more in line with a budget price point. That's the only reason I can see, since if they <i>just</i> changed the mounting specs, we probably won't see any boards using it for at least 6 months, which brings us near the end of the Athlon as AMD's top of the line chip. Plus, I'm sure that the board makers out there that cater to overclockers see the need for the current mounting specs, and won't change them. AMD's specs aren't the end all of design. I believe that boards with holes existed before AMD made them part of the "recommended" design (I could be wrong, though). Anyway, I think it's safe to say that this change is in anticipation of the Athlon becoming a budget line of processors, where hardcore cooling isn't needed.

-SammyBoy

I see your point but it could be argued the other way. People will buy the older cheap processors hoping to overclock them closer to top price processor performance just as they have been doing with the durons for a while now. And limiting the user to smaller heatsinks with newer mobos will discourage this.

Well, I doubt there will be a Barton core, as it would take away fab space from the Hammer. Since Dresden supposedly won't be 100% .13 SOI until next year, that would mean that a fraction of the FAB would be split between two processors. That doesn't make a heckuva lot of sense, since the Hammer will have a much higher ASP than the Barton could ever have. <A HREF="http://www.penstarsys.com/editor/Today/amd3/index.html" target="_new">This</A> article lays out the logic of how the CPU lineup of AMD would change. The only point I'm not sure about is the AXP vs. Duron as the new budget CPU once the Hammer is out. Granted, AMD could theoretically make more money per processor if they kept to the Duron core for the budget line, but I'm not sure if that would help AMD sell more processors. I mean, they could <i>own</i> the budget segment if they placed their AXPs against the P4 Celerons. And while that isn't a bread-winner of a market, it does allow for a flooding of the market with AMD processors, and securing some more OEMs, which can be used later to sell Hammer-based systems.

And, while Intel had a problem with the top of the line P3s trouncing the supposedly more advanced P4 (granted, only up to the 1.5GHz part), AMD can prevent that very easily. If in fact, they are releasing a PR3400 Hammer, they can very easily produce a PR2100 AXP for the budget segment that would destroy any Intel P4 Celerons. By the end of the year, I'd imagine that the .13 PR2100-2400 AXPs will be cheap enough to consider budget, due solely to the process shrink and refinement. Those would not be able to compete with the Hammer line, <i>unless</i> the Hammer line is an underperformer like the initial P4s were. But, that is unlikely, since the Hammer is actually a tweaked out version of the AXP, not a complete redesign like the P4 was of the P3.

Also, I don't think its a matter of AMD trying to screw over the OCers. They have limited fab space, and need to focus on the cash cows, which will be the Hammer, they hope. So, in order to do that, they need to axe either the AXP or Duron (I think Duron is dead, the author of the article thinks it will be the AXP). Remeber, the Austin plant is going 100% flash memory, which means that only Dresden will be putting out CPUs (and possible UMC in Taiwan). So, the two cores that offer the best profit margin will survive, while the odd man out will be downsized. Otherwise, AMD will have to increase prices and be in a bad position if Intel starts a price war in Q1'03.

Finally, the Hammer HSF mounting will be more like the P4, which means that the holes won't be needed. The "budget" line will be low enough clocked (plus the .13 shrink) that they won't need massive cooling. If it is true that it is a technical difficulty to place those four holes, then it makes no sense for the Socket A spec to require those once the Hammer comes out. Some mobo makers will keep putting them there because they cater to OCers, unless it increases the production cost too much. In which case, I suggest that if you want a Socket A platform with the 4 hole mount, get one of the DDR400 chipset ones, and keep it till it dies, since there won't be much innovation in the Athlon line once the Hammer comes out.

That's my two cents... I suggest you read the article I linked to, as it provides very logical reasoning that is easy to follow.

-SammyBoy

But I do wish they will consider DDR 400 in the future. It is not to be ignored at all, and a 400MHZ FSB+DDR400 solution for Hammer or Barton is definitly a positive only idea.

--
For the first time, Hookers are hooked on Phonics!!

BTW, I have PC2400 OCZ. My Epox 8KHA+ has to set by default to 133MHZ to apply to factory default.
The RAM on the website is claimed CAS 2. Now the system runs at 133MHZ-266FSB CAS 2.5 (RAM timing: 2.5, I am guessing that refers to CAS or CL). Would it be safe to:
A)Try to up the CAS to 2? What are side-effects or risks?
B)Put it to 150MHZ-300MHZ RAM, therefore PC2400? Risks?

--
For the first time, Hookers are hooked on Phonics!!

A: if its rated at cas2 it will do cas 2, most 2.5 will do cas2, if you get errors, bsods turn it back down, but its not likely.

B: this depends on your northbridge/cpu/ram, since your ram is raited 2400cl2 it wont be the bottleneck, your system should be able to do 150mhz easily, give it a try!.

"The Cash Left In My Pocket,The BEST Benchmark"

Since AMD's roadmap still indicates Barton, which is SOI, is slated for release BEFORE Hammer comes out, it seems to me that much of your post could be considered so much FUD.

Now, some of what you assert is only sensible. Hre's what I think might happen.

AMD is pleasantly surprised by the .13 micron ramping of Thoroughbred. So much so that Barton isn't deemed necessary, Athlon will ramp right up to near PR2800 by the time Hammer comes out, which is sufficient to remain competetive with Intel's P4 line.

You look at it as the cup is half empty, so AMD could do things but refuses to because they want to force people onto their next gen chip. I see that AMD has a fraction of Intel's engineers yet they have been able to remain competitive to some extent because of their singular focus. In order to continue to remain competitive against Intel, they must continue to remain focussed. Just as in another thread where you asserted that it would take next to no engineering resources to add another 128Kb cache to Thoroughbred, you continue to on the one hand look at AMD as having nearly unlimited resources to throw away but on the other worry that because AMD is the 2nd fiddle, they need to be careful how they expend their resources.

Well here's the rub. AMD has limited resources. I think we can agree on that.
Hammer is a new processor with some parts of the core descended from Athlon. but with other portions that are all new and in some respects revolutionary.

AMD needs to get Hammer ready to go ASAP. They have already pushed their original Hammer timetable back a good 6-9 months from the original projected release date of early 2002.
If they use 5 engineers adding an additional 128kb to Thoroughbred, how much will that push back the release of Hammer?

A month? Two months? Maybe more? Maybe less?

The point is, AMD has commited to release Hammer by the end of the year. They don't just have the corporations and OEMS, all of which are watching this very carefully, but they have investors watching too. IF AMD doesn't execute on Hammer VERY well, their share price will tank. They'll LOSE business/sales possibly.

So, if they pursued the course YOU suggest, they would likely harm their financial position. They'd also harm their possible OEM alliances as untrustworthy.

AMD has spent the last 3 years working hard to build their reputation as a reliable chip manufacturer. Do you want that to possibly be irreperably damaged?

I know I don't.

So far AMD is executing on Hammer very well. It could be that Barton isn't necessary as the testbed for SOI. Hammer is apparently that much ahead of schedule. BUT until AMD officially says they are cancelling Barton, OR they change their roadmap, I'll continue in the belief that AMD intends to release Barton before Hammer.

Mark-



When all else fails, throw your computer out the window!!!

Here's a pretty well thought out article on AMD; their current situation and future projections. The author addresses a number of your points as well as Slvr's points. I still am of the opinion that if AMD was going to change the Barton rollout schedule OR nix it altogether, we'd hear about it pretty darn soon!

Here's the link
{url]http://www.penstarsys.com/editor/Today/amd3/index.html[/url]

One point he brings up is AMD's limited production capacity. I am hoping that AMD is more accurate in their capacity projections than this author is.

Mark-

When all else fails, throw your computer out the window!!!

If anything, as the process shrinks to .09 etc SOI can be further refined.

Mark-

When all else fails, throw your computer out the window!!!

Well, my assumption is this: once SOI becomes commonplace in AMD fabs, then instead of having to recalibrate the machines for both a new process size and material (current Silicon compared to SOI), they will have the just calibrate everything for the process shrink. Much like AMD going from .18 to .13... same material, just a smaller process. So, once SOI is there to stay, they just have to refine things. Hope that answered your question.

BTW, I am, by no means, an expert. I'm a simple college student, with experience working in a factory that produced products that had tolerences and details that you couldn't even feel with a fingertip (a cavity in a half-inch piece of steel that was .02 inches deep). Therefore, extrapolating that out to a process with tolerences on the order of nanometers, I can only assume that a ton of recalibration has to be done to insure proper fabrication. So, I would assume that a different material (or even a wafer of silicon that is slightly harder or softer than the previous wafer) would have a profound effect on the outcome of the product. That's where I get the idea that it would be inefficient and cost prohibitive to try to run both Barton and Hammer cores at the same time, at least until the Dresden fab is 100% .13 SOI ready. And since Hammer is the future of AMD, one would think that they would make sure that they had all possible lines producing Hammer CPUs, while keeping the .13 lines without SOI for the Duron and/or AXP.

-SammyBoy

I work in semiconductors, and the adjustment is not as difficult as you would think, simply because you can adjust everything, if x layer needs to be 30nm but you now have a 10nm thicker wafer, you can simply adjust the time the wafer is in process so that a 20nm layer is depositied instead, simple and not prohibitive.


But soi wafers are treated exactly the same as bulk except for one or two small process steps. These process steps do not change the future process steps very much, and deffinatly not to the point where soi wafers were incompatable with bulk tools.

"The Cash Left In My Pocket,The BEST Benchmark"

I think the confusion comes from the fact that while each layer of material on the silicon has a thickness tolerance, there is no final thickness tolerance which is relevant. So if your initial wafer is 2 times as thick with soi as with bulk, the layers which are put down upon that are not affected by this.

But yes, etching is actually not done on thew wafer itself(except for small amounts of overetch on the first gate oxide barriers etc, or if the design specifically calls for it, most etching is done to metals and polysilicon layers laid on top of the base silicon.

"The Cash Left In My Pocket,The BEST Benchmark"