OMG! Big news about Hammer and Prescott!

[Dark_Archonis]

First of all, here's a link talking about romoured last-minute changes to Hammer, and some changes to Prescott:

<A HREF="http://www.geek.com/news/geeknews/2002june/bch20020626015137.htm" target="_new">http://www.geek.com/news/geeknews/2002june/bch20020626015137.htm</A>

I'm just so excited right now. It appears Prescott's release has accelerated, and it may actually have support for dual DDR-333, plus an integrated memory controller! OMG, It seems Intel is pulling out all the stops for Prescott. Read the article for full info.

Here's another article regarding Hammer:

<A HREF="http://www.geek.com/news/geeknews/2002june/bch20020626015146.htm" target="_new">http://www.geek.com/news/geeknews/2002june/bch20020626015146.htm</A>

And finally, the most exciting article:

<A HREF="http://www.geek.com/news/geeknews/2002june/bch20020627015159.htm" target="_new">http://www.geek.com/news/geeknews/2002june/bch20020627015159.htm</A>

In this article, it says that Intel's Otellini was <b>lying</b> when he said Prescott didn't have Yamhill. It seems it was some sort of ploy from Intel, no doubt made just as a joke for all of us enthusiasts out there. It seems Prescott and Hammer are shaping up to be real performance monsters.

We don't know for sure if all of this is true, but I really hope it is.

------------------------------------------------
Montecito & Chivano; Intel's Big Guns.

 

[zengeos]

Prescott will NOT have integrated memory controller. the original site in Germany, I believe, that posted this several days ago had a bad translation.

Mark-

<font color=blue>When all else fails, throw your computer out the window!!!</font color=blue>

 

[slvr_phoenix]

**shrug** I guess it's cool. At the same time though, it's all completely rumor and guesswork. Hell, we've probably already heard the same rumors here or even thought them up ourselves. Does it make them any more credible when it is an outside source if that outside source has no more proof than we do? **really big shrug**


Tech support said take a screen shot.
Putting it down with my .22 was the humane thing to do.

 

[bront]

Interesting rumors, but I wouldn't put too much stock in them. Looks like a long trail of "He said she said". Don't panic about Hammer, as I'm sure it will be just fine. The intell chip is interesting too, but there isn't much out on it yet.

English is phun.

 

[bront]

Psst...

I heard Via is skipping X86-64 and jumping to x86-128 with their new C4 processor, Codenamed B.O.M.B.

English is phun.

 

[Dark_Archonis]

So, they'are all lies then, even though they say that Prescott has gone to the silicon stage?

These might just be rumours, but whenever we hear bad news about Prescott or Hammer, those can be rumours, too. We can't take everything as rumours, I mean some things are going to be true, we just don't know which ones.

And staying on topic, zengeos, how do you know Prescott WONT have integrated memory controller?

I think it's fair to say that bad things we hear or presume should be treated as a rumour just as much as a the good things.

And when you think about it, some rumours make alot of sense, or seem very logical, so they seem "probable".

I just posted this topic because I feel that these are more than rumours. Sure, you can doubt them or me, or you probably think I'm an Intel fanboy, but I don't really care. I have reason to believe that they <i>could</i> be true since I've read about these exact same rumours on alot of sites, and forums.

------------------------------------------------
Montecito & Chivano; Intel's Big Guns.

 

[slvr_phoenix]

I never said that they were all lies. I just don't think I personally am going to give them any more credability than I would if anyone else on this board made the same claim. I'll wait for retail silicon.

I mean hell, I speculated months ago that Prescott will probably have Yamhill built in but disabled by default and that AMD must be hiding something about their .13 micron production to keep delaying and hedging on any real data. I've guessed a lot of other things too. Are any of them truth? Beats the hell out of me.

And that's my point. Does it make it any more believable if someone else says it? To me, no. But them, I'm a sceptic and refuse to hold final judgement until I have final silicon.

On a slightly different note: I hope Prescott doesn't have an on-die memory controller. I still think that is a bad route to go. There <i>must</i> be a better way.

And I'm still stumped on something. Why is it that Intel can make a 3GHz air-cooled chip with ALUs and FPUs and all that, yet they can't make a 1GHz air-cooled northbridge to match it? What's up with that?

Anywho... Fluffy bunnies and sunshine for everyone!


Tech support said take a screen shot.
Putting it down with my .22 was the humane thing to do.

 

[slvr_phoenix]

Psst...

I heard Via is skipping X86-64 and jumping to x86-128 with their new C4 processor, Codenamed B.O.M.B.

Wow! Is that the one with SSE4 enhancements and six field programmable gate array logic units where each can switch between two ALUs or an FPU so that the processor is always using as much of it's core as possible per clock?

(By the way, maybe I'm nuts, but why hasn't anyone ever invented a single master logic unit that can perform a single FPU process or multiple ALU processes per clock?)


Tech support said take a screen shot.
Putting it down with my .22 was the humane thing to do.

 

[chuck232]

Wow! Is that the one with SSE4 enhancements and six field programmable gate array logic units where each can switch between two ALUs or an FPU so that the processor is always using as much of it's core as possible per clock?

No I think it's the one with the gravitomic field generators which use the pull and push of atoms and their friction to create a subatomic chain reaction that results in ultra fast processing. There's no processor, it's just the field generator. The only problem is if you sit near it for too long, your cells degenerate and you die.

Falling down stairs saves time

 

[ritesh_laud]

In this article, it says that Intel's Otellini was lying when he said Prescott didn't have Yamhill.

The source for this particular rumor is VAN'S HARDWARE. Need I say more?

Ritesh

 

[papasmurf]

all news that you guys hear should be considered false or not considered at all untill the chips...get ready for it...COME OUT! I dont think even amd or intel are entirely sure what their chips will include yet, all they have are the rough drafts and let me assure you they are very rough. so just sit back and relax, have a coke, and when the chips come out then we can rant and rave all we want. and cyrix guy...

Introducing Tapeworms! The new big thing for weight loss!

 

[zengeos]

And staying on topic, zengeos, how do you know Prescott WONT have integrated memory controller?

Because the news was originally posted on a German web site and translated into English from there. The translation was a poor one and other people who are fluent in both German and English said the German version clearly says the memory controller comment was with regards to the separate chipset to be released along with Prescott, orsomething to that extent. It's been discussed on several tech site forums an all concur.

If memory serves me, people also emailed the author for clarification.

Mark-

<font color=blue>When all else fails, throw your computer out the window!!!</font color=blue>

 

[eden]

You're right about Prescott having a mem controller being a VERY BAD idea. When compared to ClawHammer's, Prescott's mem controller is nothing short of bad. If they will use Dual Channel DDR333, Rambus is gone. Can Intel really do that? And what about DDR II? Well yeah Intel is known to change things all the time and make us pay more (socket switching), but I agree that I doubt a memory controller will be added, otherwise Rambus is dead, P4s no longer have the right viable future (that is unless RDRAM continues to develop slowly on DC 16-bit)

--
Intel and AMD sitting under a tree, P-R-O-C-E-S-S-I-N-G!

 

[Quetzacoatl]

What is the disadvantage of using an on-die memory controller compared to one in say, the northbridge? It really does look like Intel has ditched Rambus, and put effort behind DC DDR and DDR II.

"When there's a will, there's a way."

 

[zengeos]

The one disadvantage to on die memory controller is the CU needs to be updated each time a new memory type comes out. So, rather than just upgrading the motherboard and RAM when you ant new memory, you must also upgrade the CPU.

On the other side of the coin, the on die memory controller gives the system MUCH lower latency which translates to noticeably better performance. In addition, AMD updates their CPUs yearly or even more frequently, which should be more than frequently enough to keep the memory controller on the die up to date.

Mark-

<font color=blue>When all else fails, throw your computer out the window!!!</font color=blue>

 

[Quetzacoatl]

The Hammer is rumored to first use .13um and an integrated memory controller for DC DDR isn't it? So, you are saying, memory controllers are only useful for a specific type, and must be changed whenever a higher speed grade or newer type appears? Sound's like a doubled edged blade, good and bad. Still, Intel benefits much more from lower latency memory than AMD does, and the P4 is much more sensitive to memory bandwidth as well, right?

"When there's a will, there's a way."

 

[eden]

Pretty much so, but any CPU works better with lower latency. However with AMD, I think DDR333 will last for a good year or two like DDR266 did, they just don't need that extra bandwidth each time. They added 2 extra pipeline stages but it doesn't translate to a memory hungry CPU at all. The On-die Mem adds a good 20-30% improved performance anyway!
For AMD, the on-die mem controller is a good thing, for Intel, it's VERY BAD.

--
Intel and AMD sitting under a tree, P-R-O-C-E-S-S-I-N-G!

 

[Quetzacoatl]

Do you think it's feasable that AMD would ever return to their SDR roots, or just integrate a memory controller and go DDR for the required time? Yeah, I can imagine the large varities of P4's with memory controllers...SDR, DDR, and RDR...ick.

"When there's a will, there's a way."

 

[eden]

SDR? Why would they do that?

--
Intel and AMD sitting under a tree, P-R-O-C-E-S-S-I-N-G!

 

[Quetzacoatl]

Just curious, maybe a low cost solution, even though it would castrate the performance. I don't know, just was thinking of the i845 at the time.

"When there's a will, there's a way."

 

[eden]

Pray you never think of it anymore!

--
Intel and AMD sitting under a tree, P-R-O-C-E-S-S-I-N-G!

 

[Quetzacoatl]

Just on a strange note...would it seem even somewhat feasable to make an ultra low cost, DC SDR motherboard for the Athlon? I know it sounds retarded, but it just sorta of occured to me that it is possible, if stupid at that. I just thought...hmmm I have some old PC-133 SDR, why not use it in DC to give my Athlon 2.1Gb/s! *warm glow of technology* Mmm.....memory saturation...

yes, I know, I would NEVER want to hurt my AMD computers with SDRAM...ick, a Hammer server running on SDR...UGH!

Hmm, on that same note, if I ever bought a Pentium4 system, i'd NEVER buy it with SDR...ick, only 1/4 of the memory bandwidth being used.

"When there's a will, there's a way."<P ID="edit"><FONT SIZE=-1><EM>Edited by Quetzacoatl on 06/27/02 11:23 PM.</EM></FONT></P>

 

[SammyBoy]

Well, if the memory controller is on-die, it solves the issues of bad chipset suppliers, as all that's left is an AGP controller and features. So, in my mind, instead of upgrading a board to give a CPU a new lease on life with more bandwidth or better performance, it would be the opposite... you upgrade the CPU cause you like the board you have, and it has the features you want. Now, either way you end up spending money. Also, even though AMD has stated that PC1600, 2100, and 2700 will be officially supported, there's nothing to say that you won't be able to mod something to give it PC3000, or PC3200, or whatever. AMD hasn't stated yet what the FSB will be... they gave an enigmatic answer in their FAQ, something about how it will be different from the FSB we know today. Dunno what that means.

But, in the end, you'll buy a board because of what it has, since the main difference in chipsets now is the memory controller. I'd imagine that AMD has a pretty solid idea of the requirements for the chipsets, and for at least the time between the release of the Hammer and the die shrink in 2H'03, any board will support the Hammer, and probably the next revision or two of the Hammer, unless AMD changes something drasically. The hope, then, would be that if you had an "older" board, it would still support a newer CPU, much like it is today, with SocketA, and you'd still save money, since you wouldn't have to replace both.

So, the ALi, VIA, SiS, and AMD chipsets will be competing only on price and features, with an AGP controller thrown in there. Performances is based solely on the CPU, so soon we'll see who does make the best chipsets, quality-wise.

Okay.... I'm done now. My work-numbed brain is reeling and it's 2am... I need sleep, and my post is rambling and incoherent. Respond, if you'd like, I'll try to clarify things when I'm more awake.

-SammyBoy

 

[eden]

Well from what we hear, there is no FSB, it's a Hyper Transport world, the on-die mem controller also takes part in that. I also don't get it, but we'll see. I suppose Overclocking will work by CPU increments, though how will we know the limits of that is perplexing, and what about multipliers!

--
Intel and AMD sitting under a tree, P-R-O-C-E-S-S-I-N-G!