All well and good. It's nice to see that AMD is <i>finally</i> addressing the issue of better memory technologies and how an on-die mem controller can actually use them.
The next major question is though: Exactly how much improvement will an on-die mem controller make?
It it is a major improvement over an off-die controller, then you could end up with <i>worse</i> performance even using a dual-channel DDRII-400 memory solution than you would be using the on-die single-channel DDR-333 memory solution.
But if the on-die controller doesn't give <i>that</i> much of an improvement, and the dc-DDRII solution turns out to be better, then one must ask the question: What was the point of even putting the mem contoller on the die in the first place?
and what about the number of pins? i thought all versions of the hammer were gonna have more than socket 462, which means for hammer to work with external mem controllers it will mean another chipset revision i.e. Nforce3
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