166 FSB = no performance increase. TRUE?

The reviews from Anand and many other sites concluded about 5-6% performance increase when moving from 133MHz DDR to 166MHz DDR FSB and memory. That's not a lot in terms of performance increases. 10% would be the rule of thumb for bare minimum to count as an "increase" as that is the only time when it is noticable. While it's great for bragging rights in benchmarks, it really doesn't mean much.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.

it also depends on the applications you use.

i did a fairly detailed benchmark of my old unlocked tbird 1200C on 133/133 133/166 and 166/166 speeds with my epox 8k3a+

jumping up to 166/166 did have an effect, but only for select programs like superPI, divx encoding and games... anything that has high demands for mem bandwidth.

another application i benchmarked, cure for cancer, showed absolutely no benefit from running at a higher fsb. memory wise its not very intensive, relying mostly on CPU grunt.

if you do a search for posts done by me in the CPU overclock forum you can find it.

<b>MegaHertz Matters! ... But not without Cache our a decent chipset!!! </b>

lol.. might wanna check that sig dude.

<font color=green> there's more to life than increasing its speed -Ghandi</font color=green>

lol

My frog asked me for a straw...dunno what happened his ass all over the place

Here is my theory:
The increase from 266 to 333MT, is only adding 600MBs/sec, and only is a 25% increase. Going to a 200MHZ DDR FSB, is a 50% increase, up to 1.1GB/sec added. So that concludes IMO, that only going for 200MHZ FSB and mem will the difference finally be noticeable. The P4 got about 5-10% on average, and that was a 33% increase in FSB and memory, so it makes perfect sense to get around that for an Athlon using 200MHZ FSB.
I don't know why AMD wants to compete using a cheap 25% increase in FSB and memory, when 400MHZ is not too hard and far, and would easily allow Athlons to get back in the competition in most benchmarks.

Right now, there are 3 things to be done with Athlons to ever get back in a serious competition:
1)Increase FSB to 200MHZ
2)Increase cache width to 256-bit.
3)From the above, increase cache to 512KB L2.
I beleive that increasing the cache width might unlock the need for higher bandwidth by Athlons. That overall could potential give up to 15% better performance, and that could be serious competition IMO.

--
And now, an advice from your friendly Nike shoes slogan: JUST DO HER!

5% is a CPU upgrade of one level though, maybe more. It's nothing to sneeze at.

The Boogie Knights: Saving beautiful monsters from ravoning princesses since 1983.

The Athlon only can't deal with more than 2.1 GB/sec at 266 mHz. Memory bandwith increases along with the FSB. At 200 mHz the bandwith is 1.6 GB/sec, at 266 mHz its 2.1 GB/sec, at 333 mHz its 2.7 GB/sec, and at 400 mHz its 3.2 GB/sec. Going to 400 mHz FSB would show a pretty large jump in performance.

"Trying is the first step towards failure."

btw, if anyone gonna say, why p4 need 800MT/s fsb for bandwidth of 6.4GB/s.. 4-way interleaved PC1600 (DDR200) sdram (not even DDR400) has a theoretical bandwidth of 6.4GB/s also.

<font color=green> there's more to life than increasing its speed -Ghandi</font color=green>

Different apps get different results. For instance, 3D-Mark 2001 loves memory bandwidth, but you have to increase your CPU bus as well in order to get it, as you have. The biggest disappointment is running PC2700 (DDR333) on a stock 133MHz bus Athlon (DDR266) and getting only a 1% increase, which is what most people would do, since overclocking the CPU bus to DDR333 usually requires unlocking the processor.

Of course raw memory bandwidth benchmarks don't have any relavence to real applications, but they would show a maximum 25% increase.

<font color=blue>You're posting in a forum with class. It may be third class, but it's still class!</font color=blue>

Well, Prescott's official FSB was moved down to 166 MHz QDR as opposed to the original 200MHz. So I guess they don't see it happening for a while.
Oh, and 5% is well within the margin of error for testing system performance. 10% is the bare minimum for noticability. Is it good for bragging rights in benchmarks? Sure, why not. Is it even relevant to anyone using a computer? Probably not.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.

The added cache for Northwood brought about an average of 10% improvement, sometimes even 15%. That's barely noticable but it is noticable. But yes, Northwood's biggest improvement was the added scalability, not its per clock performance. Everybody seems to think it was the cache.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.

first of all, you and kzzrn having multiple discussions at once.. that's so funny.

anyways,

did i missed something? what are u guys talking about here? when did intel moved down from 200mhz to 166mhz?

here's the deal:
133mhz......533MT/s
166mhz......667MT/s
200mhz......800MT/s

oh it would be a good day for p4 at 800mt/s fsb.

<font color=green> there's more to life than increasing its speed -Ghandi</font color=green>

oh yes, of course. thanks for the clear up.

<font color=green> there's more to life than increasing its speed -Ghandi</font color=green>

Eden:

While 400MHz is attainable, the timing problems alone would be enough to drive some poor electical engineer batty. So, while with one stick or RAM, you probably have no problem going up to 400MHz, but, anything more than one stick or 256MB (from what I've gathered from OCers) is going to cause problems, even if the CPU is running at the same FSB. I figure that if Intel isn't keen on debuting a 800QDR Prescott, it's probably due to the electical issues surrounding it. At that point, you <i>need</i> DDRII or PC1600 Rambus (which will be awhile, since PC1200 isn't going to be official until around 2004, 2005). To have a CPU run at that bus, but have memory at a slower speed would be worse than cutting the cache in half. Just look at a T-bird 'C' paired with PC1600 DDR. So anything beyond DDR333 will need to be DDRII, since AMD will probably not release a chip that needs memory speed that isn't official. Using OCed PC2700 modules probably would be a black eye for AMD. Right now, 166MHz is the max for DDR platforms, and 133MHz is the max for Rambus platforms. And, it looks like it will be that way till at least mid 2003.

Also, I'm yet to be convinced that increasing the FSB and memory bandwidth of the K7 core is really whats needed. If it was, I'm sure that AMD would have invested the time to create a RDRAM platform as well. The fact that they didn't and aren't including it in the memory controller on the Hammer, tells me that there is something else within the core that needs fixing. The fact that the L2 cache isn't optimized as best as it could be is one thing, and I'm hoping that Barton, when the cache is added, also has some changes to the L2 to core path, like making it wider, and possible seperating it into smaller, independant chunks, so that more can be accessed at once. I think that 8 independant cells of 64KB L2 cache would be more efficient than the current 2 cells of 128KB (that's my understanding, at least, since the L2 cache in all diagrams of the core show it in two distinct, and possibly independant, parts). Perhaps I am wrong, but I would think that setting up the L2 to function like Raid stripping, and then have 8 seperate, distinct cells (like HDDs), it would be alot faster.

-SammyBoy