Intel 3.06ghz 64 bit cpu?

[Denisk]

Is intel pentium 4 3.06 64bit cpu or not?
I need proofs guys

 

[slvr_phoenix]

Not.

<A HREF="http://forumz.tomshardware.com/community/modules.php?name=Forums&file=viewtopic&p=45775#45775" target="_new"><font color=red>Join</font color=red> <font color=blue>the</font color=blue> <font color=green>THGC</font color=green> <font color=orange>LAN</font color=orange> <font color=purple>Party</font color=purple>!</A>

 

[halkebul]

The AMD Athlon 64, 64-bit/32-bit CPU, should be available approx. mid 2003.

<i>It's your world kid!!!</i>

 

[eden]

There's no proof needed (it seems someone is trying to tell you otherwise, as in: it is 64-bit), whoever is trying to claim this is an a-hole who needs to be strapped on a chair and face slapped several times to learn a bit more about CPUs.

--
The THGC Photo Album project,<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&file=faq&notfound=1&code=1" target="_new">CLICK HERE!</A>

 

[Raystonn]

As others have stated, the Pentium 4 Processor is an IA32 processor. This makes it a 32-bit processor. It has a few instructions that process data of 64-bit and 128-bit sizes, and may use 64-bit transfers internally in some areas, but it is still classified as a 32-bit processor.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[eden]

You're talking about SSE2 instructions, right?
I don't recall of any other registers with 64-bit in the P7.

--
The THGC Photo Album project,<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&file=faq&notfound=1&code=1" target="_new">CLICK HERE!</A>

 

[imgod2u]

The x87 FPU is also 64-bits wide. The x87/MMX registers are 80-bits wide. The SSE/SSE2 (or XMM) registers are 128-bits wide. Execution of SSE/SSE2 vectors are done by the FPU.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.

 

[eden]

Ah yes that's pretty much it. The way he put it vaguely, it sounded as if the P4 could handle 64-bit somewhere in the integer or memory registers than just on the FPUs.

--
The THGC Photo Album project,<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&file=faq&notfound=1&code=1" target="_new">CLICK HERE!</A>

 

[lhgpoobaa]

yes, but only selected areas... the CPU is still essentially only a 32bit one.

<A HREF="http://www.ihatetelstra.com" target="_new">http://www.ihatetelstra.com</A>
<A HREF="http://www.telstraexposed.com" target="_new">http://www.telstraexposed.com</A>
<A HREF="http://www.antitelstra.com" target="_new">http://www.antitelstra.com</A>
<A HREF="http://www.whirlpool.net.au" target="_new">http://www.whirlpool.net.au</A>

 

[eden]

Were you saying "selected areas" as in what I just said, or somewhere else?

--
The THGC Photo Album project,<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&file=faq&notfound=1&code=1" target="_new">CLICK HERE!</A>

 

[juin]

a bunch of 32 bit data on a single 32 instruction.That is still 32 bit data so having the 4GB limit

Now what to do??

 

[imgod2u]

Double-precision FP is 64-bits wide, not 2 pieces of 32-bit data. The General Purpose Registers are 32-bits wide and that's what defines the "bitness", period.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.

 

[lhgpoobaa]

yes. agreeing with wot u said.

<A HREF="http://www.ihatetelstra.com" target="_new">http://www.ihatetelstra.com</A>
<A HREF="http://www.telstraexposed.com" target="_new">http://www.telstraexposed.com</A>
<A HREF="http://www.antitelstra.com" target="_new">http://www.antitelstra.com</A>
<A HREF="http://www.whirlpool.net.au" target="_new">http://www.whirlpool.net.au</A>

 

[juin]

SSE-2 use 2X32 bit setting to archive.

SSE or SSE-2 use usual instruction but have multiple data.They put to data number back to back that create a 64 bit data also you need to activate this feature when the code get assemblage.

Double precision the name say it well.If there were really a 64 bit data that will be call extendent precision.

The bitnees is set by the ISA wich all IA-64 are all 64 bit IA-32 are all 32 bit

Now what to do??

 

[Raystonn]

There are two standard floating point data types in use in programming languages. The first is 32-bits. The second, called double-precision, is 64-bits. Modern IA32 processors actually have 80-bit FPUs, going above and beyond the required precision of the data types.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[imgod2u]

SSE-2 use 2X32 bit setting to archive.

SSE2 adds capability to 2x 64-bit FP data. SSE had the ability to do 4x 32-bit FP or Integer data.

SSE or SSE-2 use usual instruction but have multiple data.They put to data number back to back that create a 64 bit data also you need to activate this feature when the code get assemblage.

SSE2 packs 2x 64-bit FP data into a 128-bit Vector and skews the execution using the exact same FPU as if they were individual data being operated on by individual instructions. The only difference is that with a 128-bit SSE2 Vector, you only need to decode, schedule and execute one instruction.

Double precision the name say it well.If there were really a 64 bit data that will be call extendent precision.

Double-precision is 64-bit FP data (a double in c++). Extended precision is 80-bit FP data (which is possible but slow since the FPU are 64-bits wide, you'd need to skew the data and processing). The x87/MMX registers are 80-bits wide.

The bitnees is set by the ISA wich all IA-64 are all 64 bit IA-32 are all 32 bit

x86 use to be a 16-bit ISA, then there came the 32-bit ISA with no extensions needed to add 32-bit, merely switching the processor to protected mode. The original x86 ISA provided use of 32-bit Integers, however, the data would be broken up internally and skewedly processed (very slow). So no, it's not determined by the ISA. The exact defining "bitness" of a microprocessor is the size of its General Purpose Registers. A simple search on google would tell you as much.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.

 

[juin]

x86 use to be a 16-bit ISA, then there came the 32-bit ISA with no extensions needed to add 32-bit, merely switching the processor to protected mode. The original x86 ISA provided use of 32-bit Integers, however, the data would be broken up internally and skewedly processed (very slow). So no, it's not determined by the ISA. The exact defining "bitness" of a microprocessor is the size of its General Purpose Registers. A simple search on google would tell you as much.

GPR follow the ISA you dont put register extention or extra register before having a wider or bigger ISA but i think you can put extra rotatif register.

Now what to do??

 

[juin]

i wonder if i misunderstod vector lenght and vertor precision.

Now what to do??

 

[imgod2u]

GPR follow the ISA you dont put register extention or extra register before having a wider or bigger ISA but i think you can put extra rotatif register.

The ISA doesn't neccessarily specify the width of the GPR's. It merely provides a list of types of data that the processor is capable of working on (which also includes long, a 64-bit Integer data). The current x86 ISA on all IA-32 compatible processors support Long integer (64-bit) data types, even though IA-32 compatible processors are 32-bit. So no, it isn't defined by the ISA nor are the width of the GPR's defined by the ISA.

i wonder if i misunderstod vector lenght and vertor precision.

I've never heard of Vector precision. Precision is how accurate a single piece of data is according the the value it holds. This mainly applies to FP data as the bigger the FP data type, the more precise a value it can store. Vectors have lengths, but since they're just a cluster of data types, they don't neccessarily have a precision.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.