Sign in with
Sign up | Sign in
Your question

Multipliers discussion

Tags:
Last response: in CPUs
Share
December 25, 2002 11:33:54 PM

Here are questions I have about multipliers that i jotted down as i was going to bed last night :) 
1)WHY multipliers generate, say, 11x the throughput (physically how do they process the signals etc)
2)why higher multipliers affect your ability to OC the fsb
3)multipliers can be changed, so they're not something physical about the chip (i.e. the multiplier is not decided before the chip is made, it is decided after.) how is it decided?

--------------

<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&..." target="_new">mubla otohp eht ni ecaf ruoy teg</A>

More about : multipliers discussion

December 26, 2002 2:26:36 AM

1.) i asked this same question in this forum a couple of times and never got a relevent response...

2.) the CPU core is only able to handle X amount of speed, i have found that sometimes if you play with lowering or raising the multiplier and doing the oppiste to the FSB you sometimes can get a higher OC, depending on other system compnents, ie RAM.

3.) as far as how it is decided all i can provide is an educated guess. what the manufacturer probablyy does is either;
A: tests each core to find out how fast it will go then underclock it slightly as a cushion.
or
B: they predetermine that the particular wafer that the cores are made on will run at whatever speed.

<A HREF="http://www.textfiles.com/100/actung.hum" target="_new">Relaxen und watch das blinkenlights...</A>
December 26, 2002 2:44:57 AM

Its decided in factory.
You get a batch of cpu's put into cpu die's.
then you test them at the highest speed. those that pass well become that speed, those that dont are sold as progressivly lower speed grade cpu's.
Course sometimes most/all the cpu's are good and fast ones are sold as slow anyway...

that why the Tbred XP1700+ is a good overclocker, as is the AGOIA XP1600 or most P4's of low speed grades.

And yes, the speed is determined after the cpu is made. Hardcoded into the circutry.

<b><font color=purple>[Rik_]</font color=purple> I wonder how many people have made their own phasechange system?
<font color=blue>[LHGPooBaa]</font color=blue> I get phasechange whenever i eat a hot chillie :lol:  </b>
Related resources
December 26, 2002 2:47:07 AM

As far as timing... with the 11x example the cpu is just set to run 11 times faster than the system bus speed, and only recieves data packets once evey 11 cycles.

<b><font color=purple>[Rik_]</font color=purple> I wonder how many people have made their own phasechange system?
<font color=blue>[LHGPooBaa]</font color=blue> I get phasechange whenever i eat a hot chillie :lol:  </b>
December 26, 2002 3:38:29 AM

how do they decide if a given chip will have a 166fsb with a 10x multiplier or a 133 with a 13x multiplier (i don't know if those chips actually exist, i'm just giving an example, because there are TWO variables there, so how do you decide which to set where?)
as for the 11x thing, do you mean it receives data packets 11 times per cycle?

--------------

<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&..." target="_new">mubla otohp eht ni ecaf ruoy teg</A>
December 26, 2002 4:04:05 AM

lol
no bus speed is pretty much independent of the CPU. So so long as the cpu can do a certain speed it doesnt matter if it is 133 or 166fsb.
Just the multiplier is different.

and NO
thats once every 11 cycles, not 11 times per cycle.

the cpu does do 11 cycles per every bus cycle though.


<b><font color=purple>[Rik_]</font color=purple> I wonder how many people have made their own phasechange system?
<font color=blue>[LHGPooBaa]</font color=blue> I get phasechange whenever i eat a hot chillie :lol:  </b>
December 26, 2002 4:20:32 AM

Quote:
Technically that would be meaning that it is seriously hampered by current bus bandwidth, no?


That actually IS true to a certain extent... which would by why 166 bus OC cpus outperform 133 bus CPUs...

A friend of mine said once that if we could get back to the internal freq./bus freq. ratios we had back in the days of 486, it'd be VERY good for performance.. just imagine a 4GHz CPU with a 1GHz bus! (not 1GHz QDR/DDR/etc which limit address speeds, 1GHz frequency). That'd be quite nice...

-Col.Kiwi
December 26, 2002 4:45:26 AM

Or getting a (TRUE) 1:1 ratio CPU/bus, with a 1X multiplier....although realistically impossible, can you imagine a 4 GHZ comp set up like that? THAT would prove to be an interesting concept.

Although I dunno if any components would work with it though.....



Quick!!! Whats the number for 911?
December 26, 2002 9:03:27 AM

no, that did exist... what do you think 086,286,386 and 486 cpu's run at???

it was only the advent of the 486DX-50,66 or 100 that you got multipliers, and if i remember correctly there were instances where a 486-50 performed alot worse than a 486-33 as it used the 25mhz bus speed (2x25) as opposed to (1x33).


Of course memory, memory latency, chipset architecture and cpu architecture are also important factors.
While the 133FSB athlons do suffer some bandwidth limitations, they are ALOT less of an issue compared to say Pentium4's using SDRAM or low speed DDR ram. Thus the reason why 166fsb athlons dont gain terribly much performance wise from the 25% bus speed boost.
The special architecture of the P4 needs high bandwidth to perform well.

<b><font color=purple>[Rik_]</font color=purple> I wonder how many people have made their own phasechange system?
<font color=blue>[LHGPooBaa]</font color=blue> I get phasechange whenever i eat a hot chillie :lol:  </b>
December 26, 2002 5:13:40 PM

I meant in today's terms. There would have to be a LOT of design changes and technological leaps to get a 1:1 ratio with 1X multiplier in any system we could even imagine with today's speeds. (Drooling over the processing power of a 4 GHZ system with that kinda power!!!!!) Imagine what that would do to today's pipelines.....LOL!!!!



Quick!!! Whats the number for 911?
December 26, 2002 5:47:43 PM

It would very much make sure pipeline bubbles rarely occur, but unfortunatly you can't help but wonder if the CPU stalls, if the memory bandwidth won't try to chug it down nevertheless, causing weird data processing.

--
<A HREF="http://forumz.tomshardware.com/modules.php?name=Forums&..." target="_new">The THGC Photo Album, send your pics and see others'!</A>
December 27, 2002 12:56:25 AM

It would be virtually impossible to make a bus run at such high speeds. Have WAAAAAY to much trouble with signal integrity, noise and especially path lengths.
Its much better to have a slow bus, but double, quad or octal pump it with data.

<b><font color=purple>[Rik_]</font color=purple> I wonder how many people have made their own phasechange system?
<font color=blue>[LHGPooBaa]</font color=blue> I get phasechange whenever i eat a hot chillie :lol:  </b>
December 27, 2002 4:04:54 AM

....And Heaven forbid the problems that you would have with the ram and the PCI/AGP busses!!! LOL!



Quick!!! Whats the number for 911?
!