Tom's Hardware > Forum > Motherboards & Memory > General Motherboard > what does this sentence mean?
Word :    Username :           
 

I was reading an article and came across this:

An FSB of 133 MHz ("533 MHz quad-pumped" )

What does that mean? 533 MHz quad-pumped?

Sponsored Links
Register or log in to remove.

133MHz*<b><font color=red>4</b></font color=red>=533MHz

:smile: Good or Bad have no meaning at all, depends on what your point of view is.

Reply to khha4113

What it means is it transfers 4 bits of data per a clock cycle. Though the problem with this system is it has massively high latencies because it is only running at 133mhz truespeed so an avarage DDR 333 or 400 is about the same speed because it is 166mhz and 200mhz true speed for DDR. SDRam transfers 1 bit of data per a clock cycle. Normal DDR tansfers 2 bits of data per a clock cycle and with dual channel DDR 4 bits per a clock cycle.
AREA_51

<P ID="edit"><FONT SIZE=-1><EM>Edited by vk2amv on 12/17/02 09:02 PM.</EM></FONT></P>

Reply to vk2amv

Quote :

What it means is it transfers 4 bitsof data a secondinstead of the one like in SDRAM. Though the problem with this system is it has massively high latencies because it is only running at 133mhz truespeed so an avarage DDR 333 or 400 is about the same speed because it is 166mhz and 200mhz true speed for DDR.


Umm.. excuse me.. not quite right and extraordinarily confusing!!
quad-pumped means it can transfer an 'effective' 4bits per <b>CYCLE</b> as opposed to SDR RAM. NOTE: DDR transfers an effective 2 bits per cycle.
However the differences in bus-width (number of wires between RAM and NorthBridge), and number of channels (how many of those buses of multiple wires) have a huge impact on performance.

For instance, DDR266 is something like (feel free to correct)
2 bit per cycle times
133MHz (133 million cycles per second) times
64 wires equals
17,024 Million bits per second
OR (17,024 / 8) 2128 million BYTES per second (hence PC2100)

RDRAM PC800 (which is 100MHz quadpumped dual channel)
4 bits per cycle
100 million cycles per second
32 wires per channel
2 channels (i850)
equals 25,600 million bits per second.
OR (25,600 / 8) 3200 million bytes per second.

These are peak transfer rates.. only achieved if you read continuously and the data being (pre)fetched is always used, ie. perfect circumstances.

The reason RDRAM doesn't always beat DDR-RAM at these speeds is the latencies discussed earlier. Basically requests and read/write commands can take longer to process in RDRAM controllers (sortof).. so sometimes if you only require 100 bytes of info DDR can get it quicker. If you need 100MBytes of info RDRAM will serve it up a lot quicker.

Then of course, these days we have DDR333, DDR400 and PC1066 (nearly got PC1200) RDRAM. these speeds all change things generally for the better, except where DDR400 introduced latencies (CAS 2.5) that were higher than DDR333 so the slower memory won cause it's control timings could be pushed further.
Aggressive timings proved to be more beneficial than raw peak data-rates.

Hope that all helps..

Balzi


"Meet me on Platform 10 in 3 minutes... or Platform 3 in 10 minutes, whichever you prefer!!"

Reply to balzi
Tom's Hardware > Forum > Motherboards & Memory > General Motherboard > what does this sentence mean?
Go to:

There are 1287 identified and unidentified users. To see the list of identified users, Click here.

Please mind

You are about to answer a thread that has been inactive for more than 6 months.
If you still wish to proceed, please ensure that your posting is original and does not duplicate or overlap any prior responses to this thread.

Add a reply Cancel
Sponsored links
  • Ask the community now
  • Publish
Ad
They won a badge
Join us in greeting them