If they're actually producing c2c 16nm finfets, it's going to take more than 3 months to tune the silicon. It's no easy task.
ARM likely isn't expecting fully working silicon on the first spin either. But both companies get something to work from with that... TSMC gets a design to practice/benchmark their yield with and ARM gets silicon to see if back-annotated post-PAR simulation matches silicon results.
Being the first guinea pig on TSMC's 16nm process likely comes with substantial discounts on those first masks and wafers, which is great for early silicon that most likely won't work (or at least not perfectly) on the first try anyway.
For TSMC, it does not matter too much whether or not ARM's design is faulty or not since TSMC can still determine how good their process is by examining the dies with a microscope between metallization layers as they fab the chips.