"Fudzilla has also received reports that suggest that L1, L2, L3 and L4 memory will instead be 'shared between the CPU and GPU.'"
L1 cache isn't even shared between cores, let alone between the CPU and GPU. I call BS.
I'm skeptical about L1, L2 being shared, L3 and L4 might, though...but i think it's more likely that only L4 is shared, or that it's exclusive to graphics.
Don't the highest-end models get paired with discrete graphics anyways?
Yeah, but if this gives you GT650m performance, while consuming far less power, you could actually game on the go, without plugging it in. Not intended to compete with 660m and above, though, i would guess. Might be able to undercut the discrete mobile market if they're smart.
1. Obviously 64MB of onboard cache would make it an expensive chip due to size and complexity. One could argue most people purchasing a high end i7 desktop chip would have dedicated graphics card. I don't think Intel's focus is for those systems.
2. However, it makes sense to put a 64MB cache in the mobile chips for ultrabooks where the option for dedicated graphics isn't possible due to reduced battery capacity, heat, and space on the motherboard.
64MB sounds expensive but it may be necessary to provide enough bandwidth to keep the GPU from starving the CPU. Building it into the die using 22 NM may make it cheap enough to provide enough bang for the price.
1. GT3e is for notebooks and -R series BGA parts only.
2. Agreed, but this isn't for ultrabooks afaik.
3. That's exactly why they're doing it, because making it shared GDDR would induce latency issues for the CPU. Best of both worlds.
Those people who can afford to buy or plan to buy this kind of high end CPU surely have enough money or planned to buy dedicated GPU. It is pointless to put integrated GPU in this kind of chip.
It's for notebooks and BGA desktop parts (read: AiOs) only.
1. Obviously 64MB of onboard cache would make it an expensive chip due to size and complexity.
Not if the L4 is on a separate die from the rest of the CPU.
With the 386, 486 and Pentiums, L2 cache used to be on the motherboard. With the Pentium Pro, Pentium 2 and early Pentium 3, the L2 cache used to reside on separate chips on the CPU package.
There is plenty of precedent for on-package/off-die cache.
Also, a 64MB SRAM is more than 3.2 billion transistors which would make this cache larger than the whole CPU die which does not make much sense cost-wise. Logically, this would indicate that the cache is DRAM-based to keep surface area and cost in check. Since DRAM and high-speed CMOS processes do not play well together, this would also point towards an off-die DRAM chip.
So my bet is custom on-package DRAM chip.
You're pretty much dead on, check this out:http://www.anandtech.com/show/6892/haswell-gt3e-pictured-coming-to-desktops-rsku-notebooks