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AMD's Barcelona to "stink" in ORACLE - Page 3

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We don't know how Barcelona will actually perform, period.

Indeed.

Quote :

But it doesn't mean the microarchitecture doesn't look like a beast.It does.

We have not seen any details about the microarchitecture yet, so we can't conclude.


How much more details do you know about Core 2?

Let me just ask you, does it use score boarding or reservation stations? How many entries of TLB does it have, with what replacement algorithm? Does it tag caches with virtual or physical addresses, and in what format does it store instructions in its L1 cache?

All you think you know about Core 2 are those marketing-oriented high-level specs - not much different from what we know about Barcelona.

Quote :


The shared L3 design is brilliant

How? Have you seen it? Do you know how it performs?

No, I haven't seen it, much like you haven't seen the shared L2 smart cache of Core 2. Oh yeah, do you think the latter a good design? Don't you?

BTW, Barcelona's L3 is a large shared victim cache. If you still don't know what I mean, then you're not yet qualified for the answer; sorry. :-p

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plus cc-NUMA make Barcelona a very scalable chip.

cc-NUMA has nothing with the scalability of Barcelona! It has with the scalability of its platform.


And Barcelona works and supports such a platform, unlike any Intel x86 chips.

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You don't need to believe what AMD says,

I don't believe to their undefined bold claims, until they support them with benchmarks.

Good, I already said you don't need to. Go get your candy now.

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but it's not unreasonable to agree with their estimates, either.

They are estimating too much, but they haven't provided any evidence or explanations about what they are estimating and how. For example I think that it is absolutely unreasonable to expect Barcelona to outperform Clovertown by 40%.

We will see whether you think is right or wrong when it's out. You better eat your own post when there are some apps that Barcelona outperforms Clovertown by 40%.

Quote :

Nothing's screwed up in Brisbane over Windsor.


1. lower performance/clock
2. lower frequencies


1. With lower price and much lower power consumption, a 2% less performance/clock is nothing.
2. Be sure it will pick up shortly, and go higher than Windsor.

Quote :

AMD promised none other than the lower TDP, and they meet the promised.

They promised Brisbane to be available in 2006, but they didn't kept their promise.

It is available, to the OEMs and the channel, but not to the end users. Did AMD call you and say it'll be available to you and your neighbors?

Quote :

4x4 and C2Q are different animals,

Yes, QuadFX(not 4x4) is a platform, C2Q is a CPU.

So you know, don't you?

Quote :

for different purposes.

Nope, both are for same purposes desktop/workstation PC's.

Still you claim the platform and the processor are for the same purpose? Do you know the difference between a platform and a processor?

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AMD showcased 4x4 by running 4 heavy weight tasks on 4 screens smootly at the same time;

So?

So what?

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can C2Q do so?

Yes.show us.

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Can C2Q even do two?

Yes.wow, something for you to brag about..

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I guess those reviews were performed with 4 graphics cards

We haven't seen a review with 4 GPUs yet. Have you? What's the big deal about the 4 graphics cards, when only two can be uses in SLI ?
What's not the big deal to have 4 different displays from one machine?
Ah... I know, you really love to buy two or more C2D for the same purpose.

Quote :

performing 2+ graphically intensive tasks?

If you mean graphics and video editing, encoding and rendering, then yes. If you mean two 3D games running on two monitors, then no because no one can play two 3D games at same time.

Who plays 2 games at the same time?

Quote :

Or do they simply think like most people on this forum did, that hacking (C2D and C2Q) around for SLI doesn't worth one's efforts?

What do you mean by hacking around for SLI?

I don't know. I usually find the word "hack" associated with C2D+SLI on the Internet.

Quote :

Last time I checked quad-SLI isn't even possible on any Core 2 platform (please correct me if I'm wrong).

I think that you haven't checked and you don't know what is Quad-SLI. Quad-SLI was introduced on Intel platform using Pentium EE CPU, the Dell XPS 600. And yes it is possible on a Core2 platform with 680i/650i chipset. So, you may go check. Here is a reputable link: http://www.nvidia.com/object/IO_28569.html

And that link refers to a Core 2 system? Are you sober?

Quote :

Of course you will argue how useless quad-SLI is.

Are you sure?

Do I have to be?

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I guess people have very different meaning for the term "mega" in in mega-tasking, then.

Oh, please enlight us with your definitions for mega-tasking. We just came from Mars and we just saw a PC for the first time.

How unfortunately, because if so you wouldn't understand. (Read: stop replying like a nutcase.)

Quote :

But even under dual-SLI with multiple graphical apps my guess is QFX would also slightly outperform C2Q.

Damn! You have no idea what are you talking about.....
1. QFX does not outperform Core2 Quad.

You are wrong. It depends on the application.

Quote :

2. For gaming Core2 Quad platforms are wiping the floor with QFX using one graphics card, two graphics cards in SLI and two graphics cards in quad-SLI. Oh, BTW, QFX can have 4 graphics cards but only two can work in SLI. And QFX SLI is weaker then the SLI on the 680i chipset Intel mainboards. On the 680a the one PCIe is x16 and the other is x8. On the 680i both are x16!
http://img.hexus.net/v2/cpu/amd/QuadFX2/680a-big.jpg
http://img.hexus.net/v2/cpu/amd/QuadFX2/680i-big.jpg



Are you sure the structure of 680i is stronger? Because if so, then you are again wrong.

Quote :

Time to wake up. Some Quad FX reviews:
AbcNews
Anandtech
DailyTech
EliteBastards
ExtremTech
FiringSquad
HardwareSecrets
HardOCP
Hexus
Hexus2
HotHardware
HWupgrade
LegitReviews (overclocked FX-74)
PC.Watch
PCPerspective
TechReport
THG
XbitLabs

According to these reviews, Core2 Quad compared to QuadFX is:
1. faster
2. cheaper
3. more overclockable
4. more energy efficient
5. cooler
6. smaller
7. more supported

BTW, If I missed any on-line review, please let me know.



I guess if that makes QFX (the platform) a failure compared to C2Q (the processor), then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.


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Why for games only? Can't I be playing a game while overviewing a few video encodings? Or maybe having my RPG character in auto mode while working on a CAD? there are other scenarios even without gaming at all.

I think that you are consuming too much AMD marketing. That has nothing with the real life.

I guess your understanding of real life is just too limited.

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see no reason that memory latency on Quad FX would be higher if NUMA is properly supported.

Because you have no idea how is NUMA working.

No, because I know what is NUMA properly supported, whereas you apparently don't.

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Maybe you can tell me how and why?

Yes I can. But you can also learn by your self. Here is a nice paper:http://www.research.rutgers.edu/~w [...] ulz.pdf.gz.


Why don't you just admit that you can't answer? That paper does not compare memory access latency in multiprocessor NUMA and UMA at all.

If NUMA is properly supported, then remote memory access should be very rare, and mostly from local cache. The latency will be lower than a highly congested FSB.

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Besides, 1333MHz is going to make FSB more (~70%) power hungry and expensive.

Is the number ~70% pulled out of your ass?
100% *(1333 / 1067) - 100% = 24.93% != ~70%

You are just ignorant. In the first order, power consumption is proportional to square of frequency. 1.3*1.3 = 1.69.

Reply to abinstein
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For example I think that it is absolutely unreasonable to expect Barcelona to outperform Clovertown by 40%.



We will see whether you think is right or wrong when it's out. You better eat your own post when there are some apps that Barcelona outperforms Clovertown by 40%.

Sciencemark and Cinebench


I guess if that makes QFX (the platform) a failure compared to C2Q (the processor), then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.

Pretty much everyone on these forums knows that.

Reply to 1Tanker

Quote :



For example I think that it is absolutely unreasonable to expect Barcelona to outperform Clovertown by 40%.



We will see whether you think is right or wrong when it's out. You better eat your own post when there are some apps that Barcelona outperforms Clovertown by 40%.

Sciencemark and Cinebench


I guess if that makes QFX (the platform) a failure compared to C2Q (the processor), then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.

Pretty much everyone on these forums knows that.


If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.

Reply to abinstein

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AMD promised none other than the lower TDP, and they meet the promised.

They promised Brisbane to be available in 2006, but they didn't kept their promise.

Quote :


It is available, to the OEMs and the channel, but not to the end users. Did AMD call you and say it'll be available to you and your neighbors?



Last I checked the calendar said 2007 today. And let's keep in mind:

From DailyTech

AMD senior vice president of technology development Douglas Grose claimed "We'll be producing early products probably in Q2 of 2008, with full production in the second half."

18 months. Minimum. That's a helluva long time in the CPU industry!

Reply to CaptRobertApril

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then pretty much everyone on these forums is ignorant. I'm truly sorry.



Hey, when was the last time you gave me a nice big kiss on my hairy a$$ and slipped me the tongue? :twisted:

Reply to CaptRobertApril

Quote :

then pretty much everyone on these forums is ignorant. I'm truly sorry.



Hey, when was the last time you gave me a nice big kiss on my hairy a$$ and slipped me the tongue? :twisted:

I don't think I ever did... maybe you should ask your dog or your neighbor's cat? I mean if you usually get that drunk... you could ask some others, too. :lol:

EDIT: about the "pretty much everyone" part, that sentence alone is cut out of its context. I was actually saying if everyone thinks Pentium-4 is a failure (compared to AXP and P3), then everyone is ignorant.

In the end, P4 proves to be a better performing processor than both AXP and P3. It does not scale, but some of its tricks and tweaks are useful in Core 2 and will be used in future Intel processors, too. Of course, those who can only comprehend simple arguments will always have a simple view of the world: Netburst sucks.

Reply to abinstein

Quote :

I don't think I ever did... maybe you should ask your dog or your neighbor's cat? I mean if you usually get that drunk... you could ask some others, too. :lol:



Nah. The cat's got too raspy a tongue and it leaves a rash. :lol:

Reply to CaptRobertApril
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Quote :


EDIT: about the "pretty much everyone" part, that sentence alone is cut out of its context. I was actually saying if everyone thinks Pentium-4 is a failure (compared to AXP and P3), then everyone is ignorant.

In the end, P4 proves to be a better performing processor than both AXP and P3. It does not scale, but some of its tricks and tweaks are useful in Core 2 and will be used in future Intel processors, too. Of course, those who can only comprehend simple arguments will always have a simple view of the world: Netburst sucks.

That's not what you wrote.

Quote :

then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.

Yes, P4 was a complete failure at it's release. It was getting beat up by P3 Tualatins, and a 1.4GHz Athlon was giving the 2.0GHz P4 fits. Fully understood. Nothing out of context.

Reply to 1Tanker

Quote :


EDIT: about the "pretty much everyone" part, that sentence alone is cut out of its context. I was actually saying if everyone thinks Pentium-4 is a failure (compared to AXP and P3), then everyone is ignorant.

In the end, P4 proves to be a better performing processor than both AXP and P3. It does not scale, but some of its tricks and tweaks are useful in Core 2 and will be used in future Intel processors, too. Of course, those who can only comprehend simple arguments will always have a simple view of the world: Netburst sucks.

That's not what you wrote.

Quote :

then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.

Yes, P4 was a complete failure at it's release. It was getting beat up by P3 Tualatins, and a 1.4GHz Athlon was giving the 2.0GHz P4 fits. Fully understood. Nothing out of context.

That's tellin' him Tanker! Go get him! Sic! Kill! Good boy! :lol:

Reply to CaptRobertApril
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How much more details do you know about Core 2?

http://www.intel.com/design/proces [...] 248966.pdf

Quote :

Let me just ask you, does it use score boarding or reservation stations?

32 entry RS.

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How many entries of TLB does it have


16 entries for inner level large/4kB pages, 256 entries for outer level large & 32 entries for outer level 4kB pages.

Quote :

, with what replacement algorithm?

pseudo-LRU

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Does it tag caches with virtual or physical addresses,

physical


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and in what format does it store instructions in its L1 cache?

SFENCE

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All you think you know about Core 2 are those marketing-oriented high-level specs - not much different from what we know about Barcelona.

BS! We were talking about Barcelona's architecture, and your questions about Core2 have nothing to do with it!
Now when I answered your questions about Core2, answer me the same questions about Barcelona!

Quote :

No, I haven't seen it, much like you haven't seen the shared L2 smart cache of Core 2.

I wasn't talking stories about how Core2 shared L2 is a brilliant design, but you were about Barcelona's L3. So, if you know something about Barcelona's L3 shared cache, that have leaded you to your "brilliant design" conclusions, please share it with us.

Quote :

Oh yeah, do you think the latter a good design? Don't you?


Although Barcelona & Core2 shared caches are differently implemented, I would need to know some exact numbers about Barcelona's shared L3, before we can talk about which one is better. For example the latencies are important:
http://img372.imageshack.us/img372/4599/tab1vw6.jpg
http://img372.imageshack.us/img372/9529/tab2lc1.jpg

Quote :

BTW, Barcelona's L3 is a large shared victim cache.

Large for K8. We'll have to see how large the 2MB are for Barcelona.

Quote :

If you still don't know what I mean, then you're not yet qualified for the answer; sorry. :-p

Oh, Mr. Smart@$$, I know what you mean. The victim cache....it will be shared between the cores as exclusive, proportionally to the needs of the cores.

Quote :

And Barcelona works and supports such a platform, unlike any Intel x86 chips.

BS! Honestly, I would recommend you to read more, but post less.

Quote :

Go get your candy now.

Damn, I thought that you are more intelligent.

Quote :

We will see whether you think is right or wrong when it's out.

Yeap, we'll see the same about you too.

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You better eat your own post

You are missing the point of the forum.

Quote :

when there are some apps that Barcelona outperforms Clovertown by 40%.

So, "various workloads" is "some apps"?
So, what about the "some apps" in which Clovertwon will outperform Barcelona?

Quote :

1. With lower price and much lower power consumption, a 2% less performance/clock is nothing.

It is. Instead of improving the performance/clock, AMD degraded it.

Quote :

2. Be sure it will pick up shortly, and go higher than Windsor.

I don't think so. On their roadmap, the highes clocked parts for this year are the 90nm. Unless you count on unexpected paper launching. :roll:

Quote :

It is available, to the OEMs and the channel, but not to the end users.

BS, no OEM was offering Brisbane in 2006.

Quote :

Did AMD call you and say it'll be available to you and your neighbors?

Look after the interviews with Henri Richard and tell me if I have interpreted something wrong. :lol:

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So you know, don't you?

Like you, obviously.

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Still you claim the platform and the processor are for the same purpose?

Nope, QuadFX and Core2 Quad are for the same purpose: PERSONAL COMPUTING, x86 desktop/workstation. Maybe some people will by QuadFX as a space heater, but it's purpose is really to be used in a PC.
http://www.intel.com/products/proc [...] /index.htm
http://www.amd.com/us-en/Corporate [...] 83,00.html


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Do you know the difference between a platform and a processor?

Do you know the difference between a stupid question and a stupid conclusion?

Quote :

show us.

Are you blind or stupid?

Quote :

wow, something for you to brag about..

I thought that you were the one bragging about something... :wink:

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What's not the big deal to have 4 different displays from one machine?

Oh, Mr.4Heads. For what purposes are you going to use 4 different displays on a PC(you know, personal computer)?

Quote :

Ah... I know, you really love to buy two or more C2D for the same purpose.

I don't have such needs, and quadFX is not required for such purpose. You can have 4 displays on a single graphics card with a Semrpon. Have you heart about Matrox?

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Who plays 2 games at the same time?

Maybe someone with two heads and 4 arms.

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I don't know. I usually find the word "hack" associated with C2D+SLI on the Internet.

So?

Quote :

Do I have to be?

No, you don't have to be sure about anything. You are the smartest and most educated man on the earth, since you are born. Also you can read our thoughts and you can predict what we are going to think. :roll:

Quote :

You are wrong. It depends on the application.

Ok, it depends on the application. In most real-life applications Core2 Quad paltform outperforms QuadFX. Am I right now?

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Are you sure the structure of 680i is stronger? Because if so, then you are again wrong.

I am so sure.

Quote :

It overlaps a 16x and a 8x (electrical) slot coming off the same nForce 680a MCP. This is not for artistic reasons. Take another look at the diagram, and you will see there is no direct HyperTransport link between the two MCPs. If they want to communicate with each other, they must go via their HyperTransport links to the primary processor, which must act as the middle man. So it's not exactly hard to see why trying to run SLI across cards connected to different MCPs is not going to give you the best performance. The necessity of talking via the primary CPU adds too much latency.

To cut a long story short(er), running SLI on Quad FX means having one card at 16x and one at 8x off the primary MCP, whereas the equivalent Intel platform will give you SLI on two full-speed 16x connections. In practice, we haven't seen enormous differences when there's a single GPU on each slot. But things could be rather different with dual-GPU cards. It really is no wonder that Nvidia talks about being able to run multiple graphics cards to drive lots of monitors - not running quad-card SLI.


http://www.hexus.net/content/item. [...] 505&page=3
Please provide some evidence to debunk me!

Quote :

I guess if that makes QFX (the platform) a failure compared to C2Q (the processor)

No, it makes the QFX platform a failure alone.

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then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.

Oh yeah, AMD positive spin, Intel negative spin. Although Northwood was not that much of a failure it can't change the fact the Netburst was a disaster. So, how the failure of P4 fits in our discussion and how is it an argument that QFX is not a failure?


Quote :

I guess your understanding of real life is just too limited.

You guess stupid. PM me when you will get rid of the green iron blocks welded on your eyes.

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No, because I know what is NUMA properly supported, whereas you apparently don't.

ROFL! Teach us about properly supported NUMA! :roll:

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Why don't you just admit that you can't answer?

OMG, why do you think that I can't answer?

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That paper does not compare memory access latency in multiprocessor NUMA and UMA at all.

Damn you, read the f*king paper!

Quote :

Number of Processors: 2–32
Levels in Cache Hierarchy: 2
Size of L1 cache: 8 KB3
L1 cache line size: 32 Bytes
L1 associativity: 2–way
L1 access latency: 1 cycle
Size of L2 cache: 64 KB3
L2 cache line size: 32 Bytes
L2 associativity: 2–way
L2 access latency: 10 cycles
Main memory access latency: 100 cycles
Remote access latency (NUMA): 100–2000 cycles
NUMA memory distribution: Round–Robin



Quote :

If NUMA is properly supported, then remote memory access should be very rare, and mostly from local cache.

Tell us more please :roll:

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The latency will be lower than a highly congested FSB.

Are you talking about NUMA in platforms with FSB or HTT?

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You are just ignorant.

Nope. I think the same for you, but I didn't told you so far. I also think that you are a noob.

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In the first order, power consumption is proportional to square of frequency. 1.3*1.3 = 1.69.

Nope! You are wrong.
Ptotal = Pstatic + Pdynamic
Pdynamic = C * V * V * F, where C is cumulative capacitance, V is voltage and F is frequency.

Reply to gOJDO

This is pointless. He's not going to listen.

Reply to dasickninja
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Quote :

This is pointless. He's not going to listen.

Well, at least others are not going to consume his BS seriously.

Reply to gOJDO

Quote :

This is pointless. He's not going to listen.

Well, at least others are not going to consume his BS seriously.
*Shrugs* What the hell. Carry on.

Reply to dasickninja

Quote :

This is pointless. He's not going to listen.

Well, at least others are not going to consume his BS seriously.


Dang - 75% of what you were talking about went way over my head. 8O

Mind if I PM you when I put together specs for a new rig?

:D

Reply to Twisted_Sister

Quote :

How much more details do you know about Core 2?

http://www.intel.com/design/proces [...] 248966.pdf

Quote :

Let me just ask you, does it use score boarding or reservation stations?

32 entry RS.

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How many entries of TLB does it have


16 entries for inner level large/4kB pages, 256 entries for outer level large & 32 entries for outer level 4kB pages.
L1 or L2? Instruction or data?

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, with what replacement algorithm?

pseudo-LRU

Exactly how pseudo it is? You do know there are all different types of pseudo-LRU just as there are all different types of pseudo-anything (like random numbers)? What's the goodness of Core2's TLB implementation that makes it better memory access?

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Does it tag caches with virtual or physical addresses,

physical
Oh? and please educate us on whether it's virtually or physically indexed, or how does it hide the virtual-to-physical translation delay, or does it use any form of virtual hint? And how does it help Core 2's performance?

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and in what format does it store instructions in its L1 cache?

SFENCE
SFENCE is an x86 instruction, not a format.

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All you think you know about Core 2 are those marketing-oriented high-level specs - not much different from what we know about Barcelona.

BS! We were talking about Barcelona's architecture, and your questions about Core2 have nothing to do with it!
Now when I answered your questions about Core2, answer me the same questions about Barcelona!
Yes, you named the features (some inaccurate, tho) - if only any of those names had just one way of implementation with 100% certainty of its performance, you'd have had answered.

The names of the features do no relate to how good a microarchitecture is. Unless you can explain/relate/quantize how much performance come from each of them, you really don't know more than what AMD could've easily revealed about Barcelona.

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No, I haven't seen it, much like you haven't seen the shared L2 smart cache of Core 2.

I wasn't talking stories about how Core2 shared L2 is a brilliant design, but you were about Barcelona's L3. So, if you know something about Barcelona's L3 shared cache, that have leaded you to your "brilliant design" conclusions, please share it with us.
It's as brilliant as Core2's L2 "smartness". It's a good balance of many aspects, and a clever incremental change.

Quote :

Oh yeah, do you think the latter a good design? Don't you?


Although Barcelona & Core2 shared caches are differently implemented, I would need to know some exact numbers about Barcelona's shared L3, before we can talk about which one is better. For example the latencies are important:
http://img372.imageshack.us/img372/4599/tab1vw6.jpg
http://img372.imageshack.us/img372/9529/tab2lc1.jpg

Nop, the latency of a victim cache @L3 isn't as important as that of a L2 inclusive cache.

Quote :

BTW, Barcelona's L3 is a large shared victim cache.

Large for K8. We'll have to see how large the 2MB are for Barcelona.
Can you read properly, or do you have to be such a nutcase? It's conceptually a large shared "victim" cache. It's never going to be cost effective if it was as large as 16MB inclusive L3.

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If you still don't know what I mean, then you're not yet qualified for the answer; sorry. :-p

Oh, Mr. Smart@$$, I know what you mean. The victim cache....it will be shared between the cores as exclusive, proportionally to the needs of the cores.

"Victim" cache itself doesn't make the cache shared, nor does it make it proportional to the cores.

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And Barcelona works and supports such a platform, unlike any Intel x86 chips.

BS! Honestly, I would recommend you to read more, but post less.
Well, please enlighten us how any of Intel's x86 CPU "supports" ccNUMA.

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Go get your candy now.

Damn, I thought that you are more intelligent.

Want me help you find the candies?

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We will see whether you think is right or wrong when it's out.

Yeap, we'll see the same about you too.

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You better eat your own post

You are missing the point of the forum.

The point of the forum... which is... you may diss Barcelona with some inaccurate information?

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when there are some apps that Barcelona outperforms Clovertown by 40%.

So, "various workloads" is "some apps"?
So, what about the "some apps" in which Clovertwon will outperform Barcelona?

What I heard from you was something like "40% speedup is absolutely unreasonable". I think "some apps" could already disqualify the "absolutely un-" part.

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1. With lower price and much lower power consumption, a 2% less performance/clock is nothing.

It is. Instead of improving the performance/clock, AMD degraded it.

AMD degraded 2% IPC with 30% less power and cheaper price.

Quote :

2. Be sure it will pick up shortly, and go higher than Windsor.

I don't think so. On their roadmap, the highes clocked parts for this year are the 90nm. Unless you count on unexpected paper launching. :roll:

Quote :

It is available, to the OEMs and the channel, but not to the end users.

BS, no OEM was offering Brisbane in 2006.
Brisbane was available to OEMs in 2006. Does that require OEMs offering Brisbane?

Quote :

So you know, don't you?

Like you, obviously.
You were wrong about that, obviously.

Quote :

Still you claim the platform and the processor are for the same purpose?

Nope, QuadFX and Core2 Quad are for the same purpose: PERSONAL COMPUTING, x86 desktop/workstation. Maybe some people will by QuadFX as a space heater, but it's purpose is really to be used in a PC.

Your generalization is way too broad.

By the same token, all Intel's x86-related products are for the same purpose? So multi-socket multi-board datacenter and entry-level ATX servers are for the same purpose, too? Why don't you just say Itanium is for the same "computing" purpose, too?

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Do you know the difference between a platform and a processor?

Do you know the difference between a stupid question and a stupid conclusion?

Just tell us that you don't, will you? QFX is a platform, C2Q is a processor. We already knew that QFX won't outperform a C2Q setup on those benchmarks that a K8 system being slower than a C2D one. Does that make QFX (a platform) same or less than C2Q (a processor)?

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show us.

Are you blind or stupid?
Sorry, I'm ignorant about C2Q. Please just show us a C2Q system that runs 4 heavy tasks on 4 display smoothly. I'd be much obliged.

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wow, something for you to brag about..

I thought that you were the one bragging about something... :wink:
No, not me, but I won't simply diss AMD for bragging about its QFX.

Quote :

What's not the big deal to have 4 different displays from one machine?

Oh, Mr.4Heads. For what purposes are you going to use 4 different displays on a PC(you know, personal computer)?

Front, up, left, and right side views.
Or do you always wear a front-looking helmet when walking on the street, since you have only one head?

Quote :

Ah... I know, you really love to buy two or more C2D for the same purpose.

I don't have such needs, and quadFX is not required for such purpose. You can have 4 displays on a single graphics card with a Semrpon. Have you heart about Matrox?
4 displays on a single graphics card, with a Sempron, to do what? The same tasks as QFX? I'll buy one from you if you can make that happen with a "Sempron-level" pricing.

Quote :


Who plays 2 games at the same time?

Maybe someone with two heads and 4 arms.
Nuts.

Quote :

I don't know. I usually find the word "hack" associated with C2D+SLI on the Internet.

So?
You conveniently cut off your own question. Very low indeed.

Quote :

Do I have to be?

No, you don't have to be sure about anything. You are the smartest and most educated man on the earth, since you are born. Also you can read our thoughts and you can predict what we are going to think. :roll:
In fact, I don't claim so. But honestly I didn't predict you'd reply in such dissing manner, just because QFX is a platform that Intel actually tried to follow, and Barcelona looks really nice.

Quote :

You are wrong. It depends on the application.

Ok, it depends on the application. In most real-life applications Core2 Quad paltform outperforms QuadFX. Am I right now?

In most real-life apps C2 would perform about the same as K8. For PC enthusiast apps, C2 would outperform K8 by 15% in average. Again, it's inaccurate to compare "QFX" with "C2Q".

Quote :

Are you sure the structure of 680i is stronger? Because if so, then you are again wrong.

I am so sure.
Then you are so wrong. :-)

Quote :

...
http://www.hexus.net/content/item. [...] 505&page=3
Please provide some evidence to debunk me!


The max inter-GPU BW of SLI is 1GB/s, out of 8GB/s of the HT links. In practice, inter-GPU comm. is much less than that of CPU-GPU. In the future, when necessary, an HT link can simply be added between the two PCIe SLI slots.

Quote :

I guess if that makes QFX (the platform) a failure compared to C2Q (the processor)

No, it makes the QFX platform a failure alone.

Quote :

then the whole Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.

Oh yeah, AMD positive spin, Intel negative spin. Although Northwood was not that much of a failure it can't change the fact the Netburst was a disaster. So, how the failure of P4 fits in our discussion and how is it an argument that QFX is not a failure?
P4 is a disaster compared to AXP and P3? Who is spinning?
Techniques in P4 are being used in other/future Intel processors. The drive of crazy clock freq was silly; the hyperthreading impl. was not ideal, but to say P4 is a disaster, you have to be fanboi (either Intel or AMD).

Quote :


I guess your understanding of real life is just too limited.

You guess stupid. PM me when you will get rid of the green iron blocks welded on your eyes.
Not when yours are barred with blue Core 2 signs.

Quote :

No, because I know what is NUMA properly supported, whereas you apparently don't.

ROFL! Teach us about properly supported NUMA! :roll:
And who are you to demand so? Just because you're ignorant doesn't mean I'm responsible to teach you until you understand.

Quote :

Why don't you just admit that you can't answer?

OMG, why do you think that I can't answer?
OMG, do you think you answered?

Quote :

That paper does not compare memory access latency in multiprocessor NUMA and UMA at all.

Damn you, read the f*king paper!

Quote :

Number of Processors: 2–32
Levels in Cache Hierarchy: 2
Size of L1 cache: 8 KB3
L1 cache line size: 32 Bytes
L1 associativity: 2–way
L1 access latency: 1 cycle
Size of L2 cache: 64 KB3
L2 cache line size: 32 Bytes
L2 associativity: 2–way
L2 access latency: 10 cycles
Main memory access latency: 100 cycles
Remote access latency (NUMA): 100–2000 cycles
NUMA memory distribution: Round–Robin


Yes, I read the paper, and you didn't.
1. The NUMA latency is "remote" access, which should be rare.
2. The numbers are their assumptions for their experiments, not measurements.
Again, the paper does not compare the memory access delay of any practical UMA and NUMA systems.

Quote :

If NUMA is properly supported, then remote memory access should be very rare, and mostly from local cache.

Tell us more please :roll:

Quote :

The latency will be lower than a highly congested FSB.

Are you talking about NUMA in platforms with FSB or HTT?

... we are obviously not on the same page.

But if you read p.589 of CA AQA by H&P you would have known a few things better than you do:
1. Their estimate of remote versus local memory read latencies is about 140 versus 85.
2. The # clock cycles due to remote memory access is almost always less than 5 (out of 85 cycles local memory access).
Now I'm sure K8's direct connect architecture has memory access latency 5+ less than Core 2's FSB.

Quote :

You are just ignorant.

Nope. I think the same for you, but I didn't told you so far. I also think that you are a noob.

Quote :

In the first order, power consumption is proportional to square of frequency. 1.3*1.3 = 1.69.

Nope! You are wrong.
Ptotal = Pstatic + Pdynamic
Pdynamic = C * V * V * F, where C is cumulative capacitance, V is voltage and F is frequency.

Reply to abinstein

Frankly, I don't see how you can compare a processor that doesn't exist to one that does with any kind of seriousness.

Reply to dasickninja

Quote :

This is pointless. He's not going to listen.

Well, at least others are not going to consume his BS seriously.

I guess those "others" are already used to your pro-Intel BS over the years.

Reply to abinstein

Quote :

Frankly, I don't see how you can compare a processor that doesn't exist to one that does with any kind of seriousness.



That's true. I haven't seen Barcelona yet, only the specs. The specs seem right, the promise seem reachable. Only a few refuse to accept them - well, just plainly say you don't want to believe in AMD, and stop using any half-baked technical arguments to diss Barcelona (and DCA).

Reply to abinstein
- 0 +

Okay, I confess. I have no idea what a Clovertown, Brisbane, or Barcelona is. :)

Reply to belvdr

Clovertown is the Code name for quad core Xeons which are derived from Kentsfield, Brisbane is the name for the latest generation of 65nm Athlon64 and its subfamilies, and Barcelona is the name of the new unreleased AMD platform, also know as K8L or more recently K8.
So the socket breakdown is like this:
Clovertown - LGA771
Brisbane - AM2 (940)
Barcelona - LGA1207

Reply to dasickninja
- 0 +

Quote :



If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.



Baron???? That you???

Reply to turpit
- 0 +

Quote :

Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.



Quote :

P4 is a disaster compared to AXP and P3? Who is spinning?



:roll:


Quote :

Sorry, I'm ignorant about C2Q. Please just show us a C2Q system that runs 4 heavy tasks on 4 display smoothly. I'd be much obliged.



Can you show us a Quad FX system running Alan Wake? :roll: Intel obviously can't run 4 heavy tasks across 4 displays smoothly, because no one has the resources or interest to demonstrate so :wink: And why are you even touting the ridiculousness of 4 displays as an actual advantage?

http://content.funnyhumor.com/pictures/cathug.jpg

Reply to r0ck
- 0 +

Quote :



If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.



Baron???? That you???

Nope, could be Charlie but certianly not 9-inch. However, he likes to ignore data and deride the the conversation.... pretty much the staple for an AMD fanatic.Nope, it's not Charlie.
http://img389.imageshack.us/img389/3226/abssg6.jpg
He is a chinese who has lived in the USA, Los Angeles, California. Married with a kid.He is a respected member of FUDZone and he is an AMD fanboy also:

Quote :

Why are you suggesting Intel-only tactics to AMD? You must be joking! 1. Hype the Hypertransport some more. It sounds like something pretty neat. Kinda Star Treck-ish. Just like what Intel had done with HyperThreading. 2. Dust off the integrated mem controller. Clearly, something integrated has gotta be a god thing. How about Rambus? 3. Refurbishthe the FX-60 nomenclature to , the "FX-60 Extreme Super Hero Plus" Yeah... we all know the Extreme(ly hot) Edition... 4. Go after the sympathy crowd. Big guy vs little guy. Always a favorite. For IT products, people actually favor big guys. 5. Crank up the clock and claim Megahertz superiority. Works well in 3rd world countries. Actually it worked extremely well right in the U.S. for Intel, until AMD woke up those idiots (and Intel). 6. Dust off the 2003 ads that 64 bits is a must. Itanium WAS a must, sure. 7. Start a campaign against dual core. "You don't need two cores with AMD" - sounds good to me. And you certainly don't want a better, more closely integrated memory controller. 8. Brand slogan : Our chips are made in Germany. German stuff is pretty good.. reference BMW, etc Or one can buy from the Jewish Centrino instead. 9. More lawsuits. That should deflect attention and also aid the sympathy option. Actually... more strong arms to the retails is always a more effective weapon. Afterall, fear is always more powerful than sympathy. 10. Start a " More power to the people" campaign. AMD chips dissipate more power and more is better. Reminds me the Extreme Edition ... not only power, but $$$ costs more too. :-)I can tell you that AMD will not consider any of these Intel tactics as options, not becasue they're Intel, but because they're despicable.

http://talkback.zdnet.com/5208-958 [...] eID=373052

Reply to gOJDO
- 0 +

Quote :

It would appear that DaSickNinja was correct, we are getting trash bombed by BSers from the Zone :)



Its bad enough we have the horde and intelliots to deal with, now the Horde has to bring in reinforcements from another site?

Reply to turpit

I find it terrible that I'm correct. Differeing opinions I can stand, but spammers (thats what they are when you whittle it away) are the bane of all forums.

Reply to dasickninja

Quote :



If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.



Baron???? That you???

Nope, could be Charlie but certianly not 9-inch. However, he likes to ignore data and deride the the conversation.... pretty much the staple for an AMD fanatic.

So much for people on this forum, exactly like what Baron has described. You deride the conversation, then start personal markings (if not attacks) and blame the others, when you were found plain wrong.

And to gOJDO:

a) No, I'm not the Chinese. I'm not "native" American, but I didn't come to US to Los Angeles.
b) I guess you got that image by searching "abinstein"? FYI, here is more information about this guy http://360.yahoo.com/abinstein
c) You failed to get your knowledge of NUMA (among others) right, so you try to switch attention to me personally, and even fail that, too. You are such a loser. You truly reveal your own nature.

Reply to abinstein

To be frank, before I feel like getting this thread locked, you dodged the issue numerous times. Not to mention, its an argument over a nonexistent m/arch, which we've only seen a task manager and a die shot for. Nothing concrete. gOJDO sometimes goes a bit overboard, but never without due reason. You'll have to excuse our bitchiness for insults to our intelligence and such, seeing as we've had to deal with throngs of AMDZone spammers, flooding the Forumz just to call us stupid. If anyone wishes to argue the issue, argue the issue and nothing else, or I'll request a lock.

Reply to dasickninja

Quote :


He is a chinese who has lived in the USA, Los Angeles, California. Married with a kid.He is a respected member of FUDZone and he is an AMD fanboy also



Just for the record, the above statements, especially the "respected member of FUDZone", is total BS. First, IMO, this is more a FUDrumZ than any zone. Second, if you were referring to AMDZone, then I have to say I'm a relatively new member there, and there are many members more respected than me.

Also, at AMDZone, people (including me) actually question pro-AMD opinions as much as pro-Intel ones. Discussions there tend to be heated, but rarely get as low as what you (gOJDO and JJ) have made it here.

Reply to abinstein

And that earns a thread lock.

Reply to dasickninja

Quote :

To be frank, before I feel like getting this thread locked, you dodged the issue numerous times. Not to mention, its an argument over a nonexistent m/arch, which we've only seen a task manager and a die shot for. Nothing concrete. gOJDO sometimes goes a bit overboard, but never without due reason. You'll have to excuse our bitchiness for insults to our intelligence and such, seeing as we've had to deal with throngs of AMDZone spammers, flooding the Forumz just to call us stupid. If anyone wishes to argue the issue, argue the issue and nothing else, or I'll request a lock.



Just for the record (again), I've never insulted your intelligence. IMO, or maybe IMHO, anyone who thinks that "P4 is a failure compared to AXP and P3" is ignorant. Does that insult you? If so, my apology.

Or, if you have examples where I insulted you, please kindly specify, and I will apologize to you if apology is due. Otherwise, feel free to lock this thread or ban the ID. I really don't care.

Reply to abinstein

Read what I wrote, not what you think. I'm not in charge of locking threads or banning people, but I take no pause in using the report button on threads like these. If the discussion stays on the topic of hardware no matter how harsh the parties involved may be, and doesn't degenerate into name calling and petty insults, I won't ask for a lock. If it does, all it takes is one click.

Reply to dasickninja
- 0 +

Quote :



If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.



Baron???? That you???

Nope, could be Charlie but certianly not 9-inch. However, he likes to ignore data and deride the the conversation.... pretty much the staple for an AMD fanatic.

So much for people on this forum, exactly like what Baron has described. You deride the conversation, then start personal markings (if not attacks) and blame the others, when you were found plain wrong.

And to gOJDO:

a) No, I'm not the Chinese. I'm not "native" American, but I didn't come to US to Los Angeles.
b) I guess you got that image by searching "abinstein"? FYI, here is more information about this guy http://360.yahoo.com/abinstein
c) You failed to get your knowledge of NUMA (among others) right, so you try to switch attention to me personally, and even fail that, too. You are such a loser. You truly reveal your own nature.


Well lets see. The actual "personal markings (if not attacks)" I saw in your quote were made by you

Quote :



If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.


followed by

Quote :


You are such a loser.


Are you one of those individuals who feels you have the right to post attacks in a public forum, but no one else has the right to respond in kind?
If so, perhaps you should limit yourself to AMDzone

Reply to turpit

Right or wrong, I was interested in what abinstein said. He was offering information, again either right or wrong. Thats for me to discern. He was taken apart piece by piece in his comments on and about the subject. If this is a way conduct ourselves then anyone can shut down anything they dont want out. OK, I like what ifs too, as alot of us do, and maybe some truths are untruths, but at the end of the day we will all know anyways. It seems to me that its always the amd posts that do this, somehow people need to talk about amd without all this garbage. I know I like speculation, even if it is nothing more than that. I say we should be as just as concerned with tact as well as fACT

Reply to jaydeejohn

Quote :

Intel's Pentium-4 line is a failure, at its initial release, compared to both Athlon XP and Pentium-3.



Quote :

P4 is a disaster compared to AXP and P3? Who is spinning?



This is so FUD :roll: ; you cut the "if" part and the "then" from the first quote of my statement above.

Quote :

Sorry, I'm ignorant about C2Q. Please just show us a C2Q system that runs 4 heavy tasks on 4 display smoothly. I'd be much obliged.



Can you show us a Quad FX system running Alan Wake? :roll: Intel obviously can't run 4 heavy tasks across 4 displays smoothly, because no one has the resources or interest to demonstrate so :wink: And why are you even touting the ridiculousness of 4 displays as an actual advantage?

To say having 4 displays ridiculous, you have to first make sure there is no one wanting it. In fact, I usually have two different displays in front of me when I'm working, sometimes three, and thus I really like the QFX concept. I agree, however, that presently it is too noisy, too power hungry (partly due to the MB and GPUs), and too few choice of MB & setup options, which is why I'm not getting one until later. I guess and hope these will improve over time.

Just for yet another record, I do not fully agree with AMD's 4x4 decisions, such as only the more expensive (FX) CPUs could be used, and no registered/ECC memory at the moment. (Well, I guess its their business tactics to separate markets, but it's not to our interests.) But that doesn't mean QFX by itself is a worthless concept - IMO, it could be very useful if implemented right, and it leverages K8's NUMA nature well. I guess this is the main difference between me and those dissing QFX for the sake of online reviews.

Reply to abinstein

My point is that if you are posting something as speculation, note it as such. Don't try to pass it as fact. Debate is what makes a forum a forum, but this last page was foolishness. Argue the issue and nothing else. Jokes are okay, but insults from both sides are not.

Reply to dasickninja

Eggxaktly. I for one learn alot even if the truth resides mostly on one side, I can also learn from the other side as well. Usually a correction from fud leads to more knowledge for me anyways

Reply to jaydeejohn

Quote :


Nope, could be Charlie but certianly not 9-inch. However, he likes to ignore data and deride the the conversation.... pretty much the staple for an AMD fanatic.



So much for people on this forum, exactly like what Baron has described. You deride the conversation, then start personal markings (if not attacks) and blame the others, when you were found plain wrong.

And to gOJDO:

a) No, I'm not the Chinese. I'm not "native" American, but I didn't come to US to Los Angeles.
b) I guess you got that image by searching "abinstein"? FYI, here is more information about this guy http://360.yahoo.com/abinstein
c) You failed to get your knowledge of NUMA (among others) right, so you try to switch attention to me personally, and even fail that, too. You are such a loser. You truly reveal your own nature.


Well lets see. The actual "personal markings (if not attacks)" I saw in your quote were made by you

Quote :



If so, then pretty much everyone on these forums is ignorant. I'm truly sorry.


followed by

Quote :


You are such a loser.


Are you one of those individuals who feels you have the right to post attacks in a public forum, but no one else has the right to respond in kind?
If so, perhaps you should limit yourself to AMDzone
turpit... if you feel attacked by the two statements of mine above, I apologize. Please let me clarify:

The first statement is conditioned after a "if" part; if you flip back to previous posts in the thread, some say P4 is a failure, some say 3-year-old P4 is on par with K8, and some say yet otherwise. My statement (the whole if.... then...) is only to stress on the fact that you can't judge a platform at its initial release, nor by the first round of (probably biased) reviews.

The second statement (loser) is targeted at gOJDO after his silly "investigation" of some Chinese guy, dissing AMDZone as FUDZone, and calling me an AMD fanboy. Well, on other thoughts, maybe you're right, and I shouldn't have acted as low as him.

Anyway, in either case, the claims were not target at you (or the most sensible others).

Further, My apology to everyone for shifting the discussion to personal critics and defense of me. I will read but not respond to any such posts/critics and stay on topic from now on.

Reply to abinstein

Quote :


Snooping, every memory transaction requires the CPU to check the other CPU first. NUMA doesn't solve this "requirement".



If two processors are working on two different processes with few shared data between them (as per definition of megatasking), then snooping as MEOSI won't induce much if any overhead.

A cache miss requiring a call to memory still has to snoop to ensure it fetches the freshes copy of the data.

That is true. But his original claim that "every memory transaction requires the CPU to check the other CPU first" is wrong. As you said, only when there is cache miss would the local processor consult a remote cache.

For cHT, the remote cache access can happen in parallel with the main memory read (for the local cache miss), and extra latency would be small. The major overhead is bandwidth, whose characteristic is heavily app-dependent, but well under cHT capability for 4P and less.

Reply to abinstein

Quote :


That is true. But his original claim that "every memory transaction requires the CPU to check the other CPU first" is wrong. As you said, only when there is cache miss would the local processor consult a remote cache.


What is a memory transaction if not a cache miss? Before an Opteron or Quad FX can use local memory, it must check the other socket(s) to see if they have a modified version. This additional checking causes the increased latency and occurs even with NUMA, and is one of the primary reasons that scalability of gluelessly connected Opterons above 4 sockets is poor.

Reply to accord99

Quote :

we havent even seen any benches from barcelona. IMO it is too early to guess at what its going to be like. I suspect it will flop like 4x4 did. they kept 4x4 all secret up until the release also and it bombed. i would think that if barcelona was so good they would be showing off some early benches to piss off intel and stem the tide of people buying new systems right now, so they can wait for barcelona. but then again what do i know



QFX is not a flop. All of you idiots were actually thinking AMD was trying to compete with C2Q. It wasn't. It was a show of innovation and a way to differentiate FX and X4. The only previous difference was an unlocked multiplier.

How could they expect 4 cores to overpower 4 cores that are clock for clock faster? It still may end up my next upgrade if AMD raises the RAM to 8GB.

Barcelona is a 90% new core. The specs have impressed everyone that saw them. Even more info has come out since the first analysis last year. Who are you?

Barcelona is a BEAST. PERIOD! The only way to beat K8 is to have more available sockets. Itanium goes up to 64 and Power goes to 64. They are the leaders of TPC-C.

I think Barcelona at 16 sockets (64 cores) will actually crack at least the Top 20, maybe even the Top 10. It depends on how good their L3 logic is as that and unganging should make that happen. At the minimum L3 will allow eight 1 hop NUMA nodes rather than the 4 possible now.

lol fanboy

Reply to apache_lives

Quote :


That is true. But his original claim that "every memory transaction requires the CPU to check the other CPU first" is wrong. As you said, only when there is cache miss would the local processor consult a remote cache.


What is a memory transaction if not a cache miss? Before an Opteron or Quad FX can use local memory, it must check the other socket(s) to see if they have a modified version. This additional checking causes the increased latency and occurs even with NUMA, and is one of the primary reasons that scalability of gluelessly connected Opterons above 4 sockets is poor.

1. A local memory transaction do not need to wait for remote caches unless the cache line is currently shared.
2. As I previously said, H&P estimate in 2001 the fastest directory-based ccNUMA to have 140 cycles 3-hop remote memory access vs. 85 locally. In terms of delay, a snooping cache coherence protocol would do better than a directory-based one.
3. If the memory "transactions" would congest the cHT links due to high bandwidth requirement for snooping messages, an FSB would have already chocked to death.
4. Claiming Opterons above 4 sockets is poor is inaccurate. With the original cHT, bisection bandwidth doubles from 4S to 8S, while average diameter increases only 25% (12.8GB/s vs. 25.6GB/s, 1.33hops vs. 1.71hops). Surely, for applications that have lots of inter-process communication, no 8S would perform well unless say it has a 4GHz broadcast bus with <20cycle latency (very Intellish, isn't it?).

Reply to abinstein

Quote :

we havent even seen any benches from barcelona. IMO it is too early to guess at what its going to be like. I suspect it will flop like 4x4 did. they kept 4x4 all secret up until the release also and it bombed. i would think that if barcelona was so good they would be showing off some early benches to piss off intel and stem the tide of people buying new systems right now, so they can wait for barcelona. but then again what do i know



QFX is not a flop. All of you idiots were actually thinking AMD was trying to compete with C2Q. It wasn't. It was a show of innovation and a way to differentiate FX and X4. The only previous difference was an unlocked multiplier.

How could they expect 4 cores to overpower 4 cores that are clock for clock faster? It still may end up my next upgrade if AMD raises the RAM to 8GB.

Barcelona is a 90% new core. The specs have impressed everyone that saw them. Even more info has come out since the first analysis last year. Who are you?

Barcelona is a BEAST. PERIOD! The only way to beat K8 is to have more available sockets. Itanium goes up to 64 and Power goes to 64. They are the leaders of TPC-C.

I think Barcelona at 16 sockets (64 cores) will actually crack at least the Top 20, maybe even the Top 10. It depends on how good their L3 logic is as that and unganging should make that happen. At the minimum L3 will allow eight 1 hop NUMA nodes rather than the 4 possible now.

lol fanboy

dont mock him, just give him a hug and hope he goes away :o

Reply to tamalero

"Surely, for applications that have lots of inter-process communication, no 8S would perform well unless say it has a 4GHz broadcast bus with"

...not without some NUMA-awareness built in to the code along with NUMA-optimized mutual exclusion primitives...but who am I to know?

Reply to pdxkevinc
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