Last message on previous page: I appreciate that jimmy, I really do. Yes, its possible they tweaked the cpus in that test, but then itd be the most devious thing Ive seen lately, worse than fudging drivers. Not that I really consider it worse, but in AMDs position, itd be far more worse for them.
According to AMD, theyve improved their Branch Prediction, the TLB and shortened the pipeline 7%, which gives a again, according to them, 3% IPC improvement, add in the cache and thats their IPC improvements.
The thermal diode was somehow changed, dont know how, and thats how theyre getting rid of their cold bug. The link I posted to, itll eventually show how people can disable their Th. diode on their i7's, if someones into extreme ocing, so the i7 will get over 5Ghz.
I just think the industry needs this more than anything at this point. If the total impression keeps coming from Intel, and only Intel, stagnation is bound to come, and not for the lack of trying on Intels part, but more in the 2 heads are better than 1 mindset. If this all pans out, and AMD makes even a semi comeback, itll open up new doors of choices, that alone helps prevent stagnation. If its a somewhat different approach to ocing, that also adds to the mix. Ocing and AMD have been out of it, even the K8's werent that great of ocers, especially on a consistant basis, so to have AMD do this now would tuly be phenominal (yes pun intended) and be good for the industry. That would make me happy, not just for myself, but all of us. Im going by more is better, and this would be more
------------------------------I went drifting, thru the capitols of tin, where men cant walk and cant freely talk, and sons turn their fathers in
Reply to jaydeejohn
I appreciate that jimmy, I really do. Yes, its possible they tweaked the cpus in that test, but then itd be the most devious thing Ive seen lately, worse than fudging drivers. Not that I really consider it worse, but in AMDs position, itd be far more worse for them.
According to AMD, theyve improved their Branch Prediction, the TLB and shortened the pipeline 7%, which gives a again, according to them, 3% IPC improvement, add in the cache and thats their IPC improvements.
The thermal diode was somehow changed, dont know how, and thats how theyre getting rid of their cold bug. The link I posted to, itll eventually show how people can disable their Th. diode on their i7's, if someones into extreme ocing, so the i7 will get over 5Ghz.
I just think the industry needs this more than anything at this point. If the total impression keeps coming from Intel, and only Intel, stagnation is bound to come, and not for the lack of trying on Intels part, but more in the 2 heads are better than 1 mindset. If this all pans out, and AMD makes even a semi comeback, itll open up new doors of choices, that alone helps prevent stagnation. If its a somewhat different approach to ocing, that also adds to the mix. Ocing and AMD have been out of it, even the K8's werent that great of ocers, especially on a consistant basis, so to have AMD do this now would tuly be phenominal (yes pun intended) and be good for the industry. That would make me happy, not just for myself, but all of us. Im going by more is better, and this would be more
If they shortened the pipeline aka removed a stage, the entire machine needs to be reworked to incorporate the new pipeline. Again you are talking out your ass, its a pity I am the only one thats saying anything about it, but retail silicon will be the final judge.
Oh so where are those 45nm switching speeds you still fail to bring to the table to back up your clocking claims?
I mistated it. They shortened the channel lengths. My bad, didnt catch it, TY. As for the switching speeds, I havnt found them, and to my knowledge, no one has them, not yet anyways. Guess I was a lil tired when I typed that
------------------------------I went drifting, thru the capitols of tin, where men cant walk and cant freely talk, and sons turn their fathers in
Reply to jaydeejohn
But seriously I hear you jdj, it would be nice to see a semi-sort-of competitive in a certain way phenom II come out. BUt I guess we gotta wait till it's out on the shelves, btw when is the "AMD" release date for it?
Hi Guys!
Let's take a little look back, to the days when AMD sided with IBM and adopted SoI technology:
1. Intel "bulk" CMOS processing was faster in transistor switching, but bleeding electricity like a cut throat. (remember P4 Prescott? - It's problem wasn't IPC or long pipeline, its problem was, when you hit abowe 2 GHz, it was leaking more than 70% of the energy as heat. That's why, they were used as servers in cold countries: double their work as space heaters also.)
2. SoI hit the wall with 65 nm process. The insulator was too thin for that scale, so it started to bleed energy. By that time, intel refined its CMOS process and tweaked the silicon chemistry to reduce the leak. - It was good, but not "that" good. That's why, stock C2D chips were never released above 3.2 GHz.
3. intel found that, with 65 nm, it can't continue following Moore's law anymore. But going 45 nm with CMOS was just crazy. It would have leaked 95% of energy at substantial speeds likt 2+GHz. So, HKMG was proposed and used.
4. HKMG "might" work for SoI or might not, we don't know yet. - depends on the material used. Thing is, SoI is better situated for 45 nm than CMOS without HKMG. you just need to make sure that your insulator is still insulating while keeping it as thin as it should be.
5. If you look at the wafer processing technologies, SoI can be made in a variety ways, allowing to use different insulators. Maybe AMD used a different insulator layer than SO2, we don't know yet.
6. If their insulator layer is "that" good (we don't know yet, we need to see the real silicon) they might not need HKMG at all, with the given process type.
7. AMD always started with an inferior product and improved it with "steppings" over the time. It's been the same since K7 times. Barcy was unlucky because C2D was already here and K7, K8 were extremely lucky because at their introduction, intel was still ramming the wall with netburst. (It took them 3 years to give up netburst and refine their IPC, until they had some better performing silicon than available)
8. 45 nm and *maybe* 32 nm is the end-of-road for CMOS. intel has to find something to work behind that. - The same thing applies AMD too.
9. In an iteration of i7, we might see netburst "resurrect", as now intel has the silicon to sustain 4+ GHz.
10. Does this post has anything to do with this thread? Don't know.
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