Intel Atom S ''Centerton'' Specs Leaked
Intel's Atom S processor has made a first appearance in processor specification tables.
Better known as Intel's microserver with the "Centerton" brand, Atom S processors appear to be available initially in three dual-core versions. The CPUs will integrate a dual-die structure with two 32 nm Saltwell cores with HyperThreading capability and clock speeds of 1.6 and 2.0 GHz.
The 1.6 GHz version will be offered as S1220 and S1240 versions, whereas the S1240 consumes 6.1 watts and the S1200 is rated at 8.1 watts. The 2 GHz model checks in at 8.5 watts. For Atom processors, these are rather generous power budgets, which are likely due to greater feature integration such as an integrated memory controller. CPU World note that, while the Centerton Atoms will need external discrete controllers, "they will not require Platform and I/O controller hub chips".
Centerton will be Intel's first move into the micro server market, which appear to have special appeal in cloud scenarios and run applications that do not need the massive performance of a Xeon processor and virtualization makes little sense. Centerton servers with up to two processors per server unit could be used especially in data analytics, storage and networking applications.
How? What do you mean?
Sorry, I meant the whole many low-power core server idea. TSX makes that significantly more efficient by reducing locking overhead.
It can be extremely useful. Just remember a server is a glorified PC that is meant to do a certain task very well. It can even do multiple tasks well, but it really depends on what you're using that server for to determine whether or not it'll offer significant boosts with HT or not.
While I appreciate the small thermal envelope, will these allow a higher density and higher performance per watt than a low power Xeon? Unless these can perform at 60% of the performance of the LC3518 Xeon, or until you can pack 8-16 of these into a blade then I don't see the point in a server environment.
Wouldn't it be easier to say... downclock an existing Ivy Bridge to much lower performance?
Say... 1GhZ per core, and do the same to the IGP and automatically lower the TDP to really low levels?
Maybe they can even throw out some of the 'features' that no one really uses and limit cache.
Anything to get the power envelope down to under 10W and use that in smartphones?
Tablets can get away with the same, or a bit larger power envelope.
Of course... none of that would even approach electronics made from a combination of synthetic diamonds and graphene (which would in smartphone form probably come close to the power a supercomputer at currently low power envelope).
Sigh... usage of silicon (inferior material).
while you can downclock an ivy bridge chip to save power, you eill nrver get it down to those levels, it has too many transisters and even at a very low clock speed, there is a minimum voltage tha the CPU can handle before becoming unstable. It just isn't designed for really low power usage.
Here is VERY in depth write up on it:
http://www.anandtech.com/show/6290/making-sense-of-intel-haswell-transactional-synchronization-extensions
Of course you can do it, but its less optimal than it can be. Die sizes will be too big, lowering margins(or increasing price), for one thing, and you need to lower the clock drastically to achieve such power use. That's besides the real world issues that Razor512 nicely explained.
Optimizing for a specific segment(when everything else is equal) always results in a better product. That is true for everything in life. You can't expect someone to do everything best for example.
I was actually thinking just a mashup of Celeron and Centrino. (Possibly because I didn't know they were too different things, i.e. confused the words, during a time when I was less entrenched in this stuff.) Hehehe...