Intel expected to triumphantly roll out "P5" at Fall IDF

San Francisco (CA) - If no surprises emerge from tomorrow's first day of theFall 2005 Intel Developers' Forum, Intel may still command the headlines with its anticipated announcement from newly appointed CEO Paul Otellini, of the next-generation Pentium architecture.

But the story of the week may very well become the triumph of Intel's Israel Design Center (IDC), whose more moderate approach to processor architecture has won that team several architectural victories of late - not only over arch-rival AMD, but also over Intel's own NetBurst architecture, which may very well follow the path Itanium has carved toward Intel's back burner.

"The rule of thumb in 'NetBurst land,'" Nathan Brookwood, principal analyst with the Insight64 consultancy, told Tom's Hardware Guide this afternoon, "was just throw clock frequency at the problem, and you'll get more performance almost without thinking. And it turns out we've run into the end of that era. The Israelis saw that coming."

With all the recent innovations in multicore CPU packaging, microarchitecture - the design of processor engine components - has recently assumed a secondary role in public conversation. Lately, the talk has been about what Brookwood characterizes as, "How many cores can you fit on the head of a pin?" As a result, what's happening inside each individual core hasn't been a front-burner topic. So if you were to judge tomorrow's likely IDF news from a multicore vantage point alone, you might overlook an upheaval going on beneath the core-level: The so-called NetBurst architecture which was the key feature of Pentium 4 when it was introduced in 2000 , is being phased out.

NetBurst had originally introduced Intel's first 20-stage execution pipeline, and proceeded to grow the pipeline from there, having shipped a P4 with a 31-stage pipeline, according to Brookwood, and having cancelled a product that would have included a 40-stage pipeline. Longer pipelines were originally introduced, according to Intel, to enable greater pre-assessment and optimization of machine code prior to execution.

"A very long pipeline turns out to be extremely inefficient," said Brookwood. "Therefore, although you felt good because you had a 3 GHz processor, in reality, it wasn't delivering any more performance than a 2 GHz processor with shorter pipelines. But it used a lot more power and generated a lot more heat."

The Israeli team's alternative was Pentium M, introduced in March 2003. As Brookwood confirmed, Intel conducted some convincing tests indicating Pentium M performance on a par with Pentium 4 in everyday, general-purpose applications - even though the P4 was expected to yield as much as four times the performance, and even though Pentium M units feature as small as 10-stage pipelines.

"So from moving from the NetBurst core to a new core based on the Israeli techniques," added Brookwood, "I think Intel will end up with a core that scales better with frequency." With lower power consumption, you can put two or four of the new cores on a single chip, and still preserve what he called "reasonable thermal characteristics."

The new architecture will also mark the first time that desktop and server CPU architectures were derived from a mobile platform. As Brookwood said, the Pentium III architecture was modified once to create the "Mobile" edition, and then modified a second time to create the first Xeon processors. But the Israeli design team was first commissioned five years ago to develop a mobile processor architecture that could meet what were then considered the extreme thermal conditions of notebook and laptop systems. The solution to the mobile thermal problem became the solution to the desktop and server thermal problem a few years later. "This represents the triumph of the power-efficient design methodologies that came out of Israel," said Brookwood, "moving into Intel's mainstream desktop, and server lines, as well as next-generation mobile processors."

Tomorrow's announcements are expected to indicate that the so-called Merom processor architecture - first code-named in 2004 - will serve as the basis for the Conroe desktop CPU architecture and the Woodcrest server CPU architecture.

Oftentimes, smart companies publish bad news on the heels of an otherwise good-news day. So if rumors put forth in the Inquirer this afternoon are correct that HP plans to cancel its planned orders for Itanium-based systems - in the wake of HP's already having cancelled its collaboration with Intel on Itanium's design - then this news could conceivably come during IDF.

While unable to confirm such rumors himself, Insight 64's Nathan Brookwood speculated, "If HP were to turn down Montecito...that would, I think, cause a great deal of reassessment in almost all parts of the industry that touch Itanium."

Other announcements expected no later than Wednesday include whether Intel has stepped up its plans to proceed toward 45 nm lithography - thus bending the curve of Moore's Law up just slightly; the possibility of a new, lowerwatt age dual-core Xeon processor; and a possible hardware deal - mentioned on CNBC late this afternoon - between Intel and Blackberry producer Research In Motion, Ltd.

Tom's Hardware Guide has a team in San Francisco to cover the events of Fall 2005 Intel Developers' Forum as they happen. Stay in touch with us for breaking news all this week, including your first look at the new Pentiums.

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