Report: Specifications of Intel 100-Series Chipsets

News
By Niels Broekhuijsen
published

We're getting a pretty good picture of what the next generation of Intel hardware will look like.

Chinese website VR-Zone reported a number of details regarding the 100-Series chipsets from Intel. This series of chipsets is expected to succeed the current 9-series, and promises some important changes.

A refresher: Intel's next processors will be Broadwell, based on the same architecture as the existing Haswell processors, but with a die shrink down to 14 nm. These processors will drop into the existing 9-Series motherboards. The Broadwell processors are expected to debut sometime before the end of this year, and they are expected to live a rather short life, giving way to the Skylake processors sometime during the second quarter of 2015. The current generation of Haswell processors will have lived an awfully long life.

The details VR-Zone reported concern the 100-Series of chipsets from Intel. The Z170 parts will succeed the Z97 platform, and the H170 chipset will succeed the H97 chipset. Meanwhile, H81 goes straight to H110, and B85, Q85 and Q87 will be succeeded by the B150, Q150, and Q170 chipsets, respectively. We’re not exactly sure why these are referred to as the 100-Series chipsets, rather than the 10-Series.

Beyond nomenclature, there are important changes here. For starters, and perhaps most interestingly, the Z170 chipset will have 20 PCI-Express Gen 3.0 lanes. This is much more than what’s on the existing Z97 chipset, which has eight PCI-Express Gen 2.0 lanes. Note, these are PCI-Express lanes that go through the chipset, in addition to what the CPU is wired to. The H170 chipset will have 16 PCI-Express Gen 3.0 lanes, while the lowest-end H110 will just have six PCI-Express Gen 2.0 lanes. The H110 will also have to make do without any SATA-Express functionality, which includes M.2. The Z170, H170 and Q170 will have Intel RST (Rapid Storage Technology) over its M.2 and SATA-Express ports.

Skylake processors are expected to have both DDR3 and DDR4 memory controllers aboard, along with on-die eDRAM for the Intel HD Graphics.

All but the H110 chipsets are expected to arrive Q2 2015, while the H110 will come out during Q3 2015. We anticipate official words to be chanted about the 100-Series chipsets, along with the Skylake and Broadwell processors at IDF in September.

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Niels Broekhuijsen
Niels Broekhuijsen

Niels Broekhuijsen is a Contributing Writer for Tom's Hardware US. He reviews cases, water cooling and pc builds.

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16 Comments Comment from the forums
  • InvalidError
    Intel finally ditches DMI2.0 so they can ramp up chipset connectivity across the board; finally something genuinely new on the Intel chipset front.

    BTW, I seriously doubt Skylake has "both" DDR3 and DDR4 controller: since there are practically no significant functional differences other than the trivial lower voltage, higher frequency and twice as many addressable banks per chip, Intel most likely simply extended their DDR3 controller to cover DDR4's operational range and accommodate those extra banks.
    Reply
  • CaedenV
    Finally looks like something that could potentially be a clear upgrade from my Sandy Bridge setup! Processors still are not significantly faster, but all of the added and newer connectivity is going to be difficult to say no to.

    I am very curious to see what all the PCIe is going to be used for. 16 lanes for a 1x16 or 2x8 graphics setup only leaves 4 lanes available for SSDs and thunderbolt devices. That really is not a whole lot more connectivity made available.

    Also, weren't we expecting PCIe4 to make an appearance with Skylake? I mean PCIe3 still have some legs on it for a graphical platform, but with more and more uses for PCIe you would imagine they would want to double the bandwidth again so that you can run more devices on a single lane rather than eating up 2-4 lanes a peace.
    Reply
  • Ninjawithagun
    Finally, a reason to upgrade?? Say it isn't so! Can't wait until next year....W00T!
    Reply
  • jasonelmore
    would have liked to see native usb 3.1 but with all those lanes i guess external controllers can get the job done.
    Reply
  • SirKnobsworth
    Intel finally ditches DMI2.0 so they can ramp up chipset connectivity across the board; finally something genuinely new on the Intel chipset front.

    It would certainly be difficult to drive 20 PCIe 3.0 lanes off the current 20 Gbps interface. I wonder how much it will be upgraded...

    I am very curious to see what all the PCIe is going to be used for. 16 lanes for a 1x16 or 2x8 graphics setup only leaves 4 lanes available for SSDs and thunderbolt devices. That really is not a whole lot more connectivity made available.

    As the article states, those 20 lanes are in addition to the 16 primary lanes from the CPU which are the ones you want to use for graphics.

    Also, weren't we expecting PCIe4 to make an appearance with Skylake? I mean PCIe3 still have some legs on it for a graphical platform, but with more and more uses for PCIe you would imagine they would want to double the bandwidth again so that you can run more devices on a single lane rather than eating up 2-4 lanes a peace.

    According to rumors they dropped the PCIe 4.0 plans somewhere in the pipeline. It kinda makes sense if they're pushing a 2015 release date considering that the specification isn't even finished yet. It should come around in Cannonlake, but only for the CPU lanes, not on the chipset.
    Reply
  • InvalidError
    13726268 said:
    It would certainly be difficult to drive 20 PCIe 3.0 lanes off the current 20 Gbps interface. I wonder how much it will be upgraded...
    They are apparently bumping the bit rate from 5Gbps/pair to 8Gbps/pair, which seems pretty slow considering the number of wired interfaces about to hit 20Gbps per pair. I was expecting a bump to at least 10Gbps per lane and maybe a bump from four lanes to five on top of that.

    I guess they are only going for something like 8x8Gbps: enough to make most of that connectivity useful as long as you use it intermittently like a normal end-user usually would and not like something Intel would want you to buy a multi-socket server solution for just for the extra IO capacity.
    Reply
  • f-14
    i find your lack of reading & comprehension skills disturbing, be glad i am not lord vader!

    "20 PCI-Express Gen 3.0 lanes. This is much more than what’s on the existing Z97 chipset, which has eight PCI-Express Gen 2.0 lanes. Note, these are PCI-Express lanes that go through the chipset, in addition to what the CPU is wired to."

    Finally looks like something that could potentially be a clear upgrade from my Sandy Bridge setup! Processors still are not significantly faster, but all of the added and newer connectivity is going to be difficult to say no to.

    I am very curious to see what all the PCIe is going to be used for. 16 lanes for a 1x16 or 2x8 graphics setup only leaves 4 lanes available for SSDs and thunderbolt devices. That really is not a whole lot more connectivity made available.

    Also, weren't we expecting PCIe4 to make an appearance with Skylake? I mean PCIe3 still have some legs on it for a graphical platform, but with more and more uses for PCIe you would imagine they would want to double the bandwidth again so that you can run more devices on a single lane rather than eating up 2-4 lanes a peace.
    Reply
  • kristi_metal
    I was expecting a increase in the number of CPU PCI-X lanes. We will have only 16 lanes, it means Intel keeps the separation between mainstream cpus and High end desktops, wich is sad.
    But at least, the chipset will have support for more connectivity and i am thinking of Sata Express for SSDs.
    Reply
  • Haravikk
    I'm a bit sketchy on some of this article's details; it says the Broadwell lifecycle will be very short, but isn't still pretty badly delayed? As I understood it, the desktop parts won't arrive till July 2015, so I very much doubt that Skylake is arriving in the second quarter, as there'd be no point in releasing Broadwell in that case. Also, has it been confirmed that Broadwell is socket 1150 compatible? Will it work with 8-series chipsets such as Q87?
    Reply
  • InvalidError
    13728917 said:
    i find your lack of reading & comprehension skills disturbing, be glad i am not lord vader!
    Yes, I did read all that extra connectivity right. What I'm saying is I do not think Intel upgraded the DMI anywhere near as much to match; merely enough so that it should not become an imminent bottleneck under average desktop use.

    With such a gross mismatch between DMI3.0 and the apparent connectivity on 100-series chipsets, there obviously is something else going on. Notice how the number of ports on any of the 5+Gbps interfaces are listed as "Up to N" ? I would not be surprised if the "Up to 20 lanes" for PCIe 3.0 includes a bunch more flex-IO lanes that can also be configured for either USB or SATA like Intel did with the 9x series.

    A combined total of 20 lanes worth of 3rd-gen connectivity does not sound so impressive anymore. The relatively modest bump in DMI3.0 bandwidth makes much more sense in this context.
    Reply