Page 1:Steamroller, GCN, HSA, 28 nm: Oh My!
Page 2:Meet The Compute Core
Page 3:A More Capable GPU: GCN Surfaces In Kaveri
Page 4:Enabling HSA On The Kaveri APU
Page 5:Test Hardware And Software
Page 6:Gaming: BioShock Infinite And Grid 2
Page 7:Gaming: The Elder Scrolls V: Skyrim And World Of Warcraft
Page 8:Dual Graphics: Does Kaveri Fix CrossFire's Problems?
Page 9:Results: Synthetics
Page 10:Results: Content Creation
Page 11:Results: Adobe CC
Page 12:Results: Productivity
Page 13:Results: Compression Apps
Page 14:Results: Media Encoding
Page 15:Results: Power Consumption And Efficiency
Page 16:Hoping The Best Is Yet To Come
Meet The Compute Core
Send In The Marketers
Here’s the part of the discussion where our more technical readers may let out a collective groan. Last generation, AMD referred to its x86 and graphics shaders independently. A10-6800K had four cores (actually, two Piledriver modules with four distinct integer clusters) and 384 shaders.
This time around, the company takes the fundamental graphics building block—the Compute Unit—which is replicated over and over to give us GCN-based GPUs like Hawaii with up to 2816 shaders, and dubs it a Compute Core. By definition, a Compute Core is HSA-enabled, programmable, and capable of running at least one process in its own context and virtual memory space, independent of other cores.
Of course, this gives AMD the ability to sum its CPU and GPU resources, yielding Kaveri-based APUs with eight and 12 compute cores, all with access to the same unified coherent memory. That’s compelling nomenclature when your competition is selling dual- and quad-core mainstream processors. Fortunately, the company’s legal department insists on a specific breakdown of CPU and GPU resources any time core count is used to describe a Kaveri-based APU.
AMD (validly) posits that it wants the technical community to think of up to 12 threads running concurrently, which is why it talks about Kaveri as a 12-core device. The APU does, in fact, address parallelism in a new and interesting way. We simply want to see the company use its messaging for good. At a time when AMD talks about CPUs in terms of their highest Turbo Core frequencies and rates high-end GPUs for clock rates they simply cannot sustain, the mainstream customers most likely to buy an APU aren’t going to understand the advanced implications of its nomenclature.
A New x86 Architecture: The First Steamroller CPU
At least most folks seem comfortable with the definition of AMD’s module-based approach to x86 cores, right? Kaveri represents the first outing for the Steamroller architecture, succeeding the Piledriver design at the heart of AMD’s Richland APUs. Although some of those previous-gen parts sported one module (or two cores), the just-introduced Kaveri models include two. AMD calls this a four-core configuration, though we know each module exposes two integer clusters and a shared floating-point unit.
Back when AMD introduced the Bulldozer architecture, we immediately took note of the big step back in per-cycle performance. Piledriver helped a little, but IPC remained painfully low compared to Intel’s Sandy Bridge, Ivy Bridge, and Haswell architectures. Steamroller was designed to help make up some of the difference, and engineers claim instruction throughput is up as much as 20%. Unfortunately, manufacturing decisions temper that gain.
The changes made to Steamroller predominantly improve efficiencies at the front-end of the pipe to minimize stalls and, according to AMD, get single-threaded performance back up to more competitive levels. The L1 instruction cache, previously 64 KB and two-way set associative, is now 96 KB and three-way set associative, reducing misses by 30%. AMD’s engineers similarly went after mispredicted branches by increasing the L2 branch target buffer from 5000 to 10,000 entries and augmenting the branch predictor itself. Instruction scheduling is made 5 to 10% more efficient through a jump to 48 entries (from 40). And company reps say that both integer clusters can access the microcode ROM simultaneously now, where they couldn’t before. Steamroller can issue two stores at once; the Piledriver architecture would only do one. Finally, the load/store units in each integer cluster feature ~20%-larger queues, further benefiting efficiency.
To test AMD’s claims, I dialed in a Core i5-4670K, A10-6800K, and A10-7850K to exactly 4 GHz, then ran our single-threaded iTunes and LAME benchmarks.
In iTunes, Steamroller gets exactly zero benefit. The Haswell-based Core i5 is naturally quite a bit faster. LAME actually reflects a tiny gain, but again, Intel’s architecture enjoys a commanding lead.
Frustrated at the lack of single-core speed-up, I decided to add our threaded 3ds Max 2013 render project. Only then, after spinning up both Steamroller modules, does the architecture demonstrate significantly better results. At 4 GHz, the A10-7850K is 22% faster than the A10-6800K. Some of that is eroded in practice by the Richland-based APU’s higher shipping clocks. However, it does appear that improvements made to Steamroller show up selectively, depending on the workload.
- Steamroller, GCN, HSA, 28 nm: Oh My!
- Meet The Compute Core
- A More Capable GPU: GCN Surfaces In Kaveri
- Enabling HSA On The Kaveri APU
- Test Hardware And Software
- Gaming: BioShock Infinite And Grid 2
- Gaming: The Elder Scrolls V: Skyrim And World Of Warcraft
- Dual Graphics: Does Kaveri Fix CrossFire's Problems?
- Results: Synthetics
- Results: Content Creation
- Results: Adobe CC
- Results: Productivity
- Results: Compression Apps
- Results: Media Encoding
- Results: Power Consumption And Efficiency
- Hoping The Best Is Yet To Come