ATI was nice enough to drop by the US lab to give us a first hand look at the Rage Fury MAXX. The project is also called 'Aurora', which is Latin and means 'the golden woman'. After a brief demonstration of the Rage Fury Pro and the Rage MAXX, we were allowed to test our benchmark suite with beta drivers on a beta graphics board. Unfortunately we can't share the benchmark scores just yet (due to the status of the card/driver). Keep an eye out for our full review of this board sometime in December.

The Fury MAXX is basically two Rage Pros on a single card. Each chip has dedicated 32 MBs of memory to use. While in 2D modes, only one chip is actually active leaving the additional chip (and it's dedicated 32 MBs) idle. When switched into 3D mode, both chips are active and all 64 MBs of memory are in use. ATI has taken a new route to using a graphics chips in tandem. Lets take a look at what the competition was doing and what ATI has done.

SLI (Scan Line Interleaving by 3Dfx) was awesome when it first came out but proved to a very brute-force way of using two chips. Each would draw the same screen but the odd and even lines were divided between the chips. The big problem with this is that each card has to store the same data as the other which is a waste of memory. Image quality was also degraded, as the scan lines of the image were somewhat 'jaggy' when compared to a single card solution. The biggest draw back of this SLI-technology was the fact that the polygons of the whole scene had to be rendered by each of the two rendering devices, thus only the fill rate was doubled, but the triangle rate stayed the same.

Look at the slide of ATi's Rage 128 Pro presentation that demonstrates the SLI-problem.

The next attempt at improving this idea was done by MetaByte using a process called PGC (Parallel Graphics Configuration). In this process the screen was split in half so that each chip could have it's half of the screen to work on. In most cases this returned a decent performance increase and it would also double the triangle rate, but still wasn't the best solution. At times one chip would be idle waiting for the other chip while it was trying to complete it's scene and this lead to degraded performance. On top of this, there was a partition between the two halves that had to be covered by blurring of the partitioned area to hide it. PGC was no bad idea, but unfortunately it wasn't good enough for any card maker. Thus MetaByte had to abandon this project finally.

Look at the slide of ATi's Rage 128 Pro presentation that demonstrates the PGC-problem.