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Intelligent Power Capability

IDF Spring 2006: Will Intel's Core Architecture Close the Technology Gap?
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Decreasing the energy level per instruction is one thing, but of course there are certain things that can be done in order to provide better power management and efficiency. Intel combines several measures that start at a manufacturing level: The 65-nm process provides a good basis for efficient ICs. Clock gating and sleep transistors make sure that all units as well as single transistors that are not needed remain shut down. Enhanced SpeedStep still reduces the clock speed when the system is idle or under a low load, but it is also capable of controlling each core separately. Voltage can also be different in different blocks of the processor.

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