2x 2 MB L2 Cache And FSB1066
The new Extreme Edition has two physical cores and a total of 2x 2 MB L2 cache.
Many people will argue that placing two separate dies into a processor package would not make a real dual core. While the upcoming processor micro architecture (slated for late 2006) will implement two cores and a shared L2 cache onto one die, the current twin-core products are assembled by marrying two Cedar Mill cores. These feature a 2 MB L2 cache and add up to as much as 4 MB L2 of cache for the Pentium D 900 and the Pentium Extreme Edition 900 series.
We believe that a real dual core on one physical die is the better solution - whereas Intel's double core approach is a business decision only. Inter-core communication requires using the limited Pentium D Front Side Bus bandwidth, while a "real" dual core could communicate via a faster path. However, this does not seem to be much of a deal right now, as the benchmark section below shows.
This is the 'old' 90 nm part...
... and this is the new 65 nm boy. Clearly, it comes with many more capacitors.
