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After an unfortunate series of untimely delays, the folks behind PCI Express 3.0 believe they've worked out the kinks that have kept next-generation connectivity from achieving backwards compatibility with PCIe 2.0. We take a look at the tech to come.
Moore's Law states that the amount of transistors which can be placed on a chip will double every two years. This has often been misinterpreted as a statement that processor speed will double every two years. It’s a misinterpretation that the computer-buying general public has turned into an expectation of exponentially-scaling PC performance.
However, as you’ve undoubtedly noticed, shipping processors have been stuck between 3 GHz and 4 GHz for about six years now. So, the computer industry has had to find other ways to make data move faster. One of the most important of those ways has been maintaining balance between platform components using PCI Express, the open standard technology that enables high-speed graphics cards, expansion cards, and other onboard computer components. It’s at least arguable that PCI Express is as important to scalable performance as multi-core processors. Although dual-core, quad-core, and hexa-core CPUs can only be adequately used by applications optimized for threading, every program installed on your machine can and will touch components attached via PCI Express in some way.
Many industry observers originally expected motherboards and chipsets based on next-generation PCI Express 3.0 to appear in the first quarter of 2010. Unfortunately, problems with backward compatibility delayed the launch of PCI Express 3.0, and as we enter the second half of this year, we’ve been left waiting for official word on the new standard's release.
Finally, following a conference call with PCI-SIG (the Special Interest Group that oversees the PCI and PCI Express standards), we at last have some answers.