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                    <title><![CDATA[ Latest from Tom's Hardware in Euv ]]></title>
                <link>https://www.tomshardware.com/tag/euv</link>
        <description><![CDATA[ All the latest euv content from the Tom's Hardware team ]]></description>
                                    <lastBuildDate>Tue, 24 Mar 2026 16:38:01 +0000</lastBuildDate>
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                                                            <title><![CDATA[ SK hynix places record $8 billion order for ASML EUV lithography machines — should pay for up to 30 EUV machines over two years, serving HBM and advanced DRAM production ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/sk-hynix-places-record-8-billion-order-for-asml-euv-lithography-machines</link>
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                            <![CDATA[ SK hynix disclosed in a regulatory filing on Tuesday that it will purchase 11.9 trillion won ($7.9 billion) worth of EUV lithography equipment from ASML. ]]>
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                                                                        <pubDate>Tue, 24 Mar 2026 16:38:01 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/NzktnSTcWDJPvdfKLwMi9F-1280-80.jpg">
                                                            <media:credit><![CDATA[Getty / Bloomberg]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK hynix]]></media:description>                                                            <media:text><![CDATA[SK hynix]]></media:text>
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                                                            <title><![CDATA[ IBM and Lam's new partnership paves the way toward sub-1nm logic using High-NA EUV — Albany lab to pioneer dry resist process integration  ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/ibm-and-lam-team-up-on-high-na-euv</link>
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                            <![CDATA[ Under the new agreement, the focus will shift to validating full process flows for nanosheet and nanostack device architectures and backside power delivery. ]]>
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                                                                        <pubDate>Thu, 12 Mar 2026 17:14:55 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/MbJuoNWEqCE8C6u4onRCcA-1280-80.jpg">
                                                            <media:credit><![CDATA[Getty Images / SOPA Images]]></media:credit>
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                                                            <title><![CDATA[ China's top chip execs claim ASML alternative 'small, fragmented, and weak' — Chinese industry titans call for national effort to invest in advanced chipmaking tools ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/chinas-top-chip-execs-admit-fragmentation-is-undermining-the-countrys-asml-alternative</link>
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                            <![CDATA[ China's most senior semiconductor executives issued a public call this week for a consolidated national effort to build a domestic alternative to Dutch lithography giant ASML. ]]>
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                                                                        <pubDate>Thu, 05 Mar 2026 18:09:39 +0000</pubDate>                                                                                                                                <updated>Thu, 05 Mar 2026 18:15:47 +0000</updated>
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                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/iiBPT3tVuXkSdD4xCKSR9m-1280-80.png">
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                                                            <title><![CDATA[ Imec's new post-exposure bake method speeds up EUV chipmaking tools, boosting production for the most advanced chips — 20% gain in photoresist improvement from increased oxygen concentration ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/imecs-new-post-exposure-bake-method-speeds-up-euv-chipmaking-tools-boosting-production-for-the-most-advanced-chips-20-percent-gain-in-photoresist-improvement-from-increased-oxygen-concentration</link>
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                            <![CDATA[ Increased oxygen concentration during the EUV lithography post-exposure bake step can increase photoresist performance by 15% - 20%, according to Imec's findings. ]]>
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                                                                        <pubDate>Fri, 27 Feb 2026 11:37:39 +0000</pubDate>                                                                                                                                <updated>Fri, 27 Feb 2026 13:58:08 +0000</updated>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/qdjf7gmQx8hqLLbHXFrNwN-1280-80.jpg">
                                                            <media:credit><![CDATA[Imec]]></media:credit>
                                                                                                                                                                        <media:description><![CDATA[A photograph of the BEFORCE tool, short for ‘Bake and EUV system with FTIR&lt;br&gt;and Outgas measurement for Resist evaluation in Controlled Environment’.]]></media:description>                                                            <media:text><![CDATA[Imec]]></media:text>
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                                                            <title><![CDATA[ ASML makes breakthrough in EUV chipmaking tech, plans to increase speed by 50% by 2030 — new 1,000-watt light source fires three lasers at 100,000 tin droplets every second ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/asml-makes-breakthrough-in-euv-chipmaking-tech-plans-to-increase-speed-by-50-percent-by-2030-new-1-000-watt-light-source-fires-three-lasers-at-100-000-tin-droplets-every-second</link>
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                            <![CDATA[ ASML to use a new CO2 laser system and tin droplet generator to increase EUV light source performance to 1000W and lithography tool productivity to 330 wafers per hour in 2030 and beyond. ]]>
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                                                                        <pubDate>Tue, 24 Feb 2026 12:01:57 +0000</pubDate>                                                                                                                                <updated>Wed, 25 Feb 2026 10:24:40 +0000</updated>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/MqQcLuXtcS9FPhQiZeDavC-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
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                                                            <title><![CDATA[ ASML projects $71 billion in revenue by 2030, as demand for EUV lithography machines intensifies due to AI boom — China sales lag behind while company cashes in on high-end Twinscan systems ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/asml-projects-usd71-billion-in-revenue-by-2030-as-demand-for-euv-lithography-machines-intensifies-due-to-ai-boom-china-sales-lag-behind-while-company-cashes-in-on-high-end-twinscan-systems</link>
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                            <![CDATA[ ASML is on track to boost its annual sales to up to $71 billion by 2030 as demand for EUV tools set records. ]]>
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                                                                        <pubDate>Thu, 29 Jan 2026 12:39:22 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/EGXamcWxVuFiTc6pCbeE25-1280-80.jpg">
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                                                            <title><![CDATA[ Samsung's Taylor, Texas fab could herald a breakthrough for the chipmaker, company plans 2026 risk production — new production flows, pellicles for EUV patterning as site targets 50,000 WSPM ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/samsungs-taylor-texas-fab-could-herald-a-breakthrough-for-the-chipmaker-company-plans-2026-risk-production-new-production-flows-pellicles-for-euv-patterning-as-site-targets-50-000-wspm</link>
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                            <![CDATA[ Samsung's Fab in Taylor, Texas, set to start trial production sometimes in the second half of 2026 with mass production slated for 2027. With pellicles finally implemented for 2nm-class flows, Samsung could finally offer consistent yields and performance. ]]>
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                                                                        <pubDate>Thu, 29 Jan 2026 10:21:45 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/t4KWtBvu5fADMgmoo2MaKg-1280-80.jpg">
                                                            <media:credit><![CDATA[Samsung Semiconductor Global]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Samsung Taylor Texas fab]]></media:description>                                                            <media:text><![CDATA[Samsung Taylor Texas fab]]></media:text>
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                                                            <title><![CDATA[ TSMC's average wafer prices increased by over 15% each year since 2019, report suggests — gross profit margins increase by 3.3x in 2025 alone, facing no real challengers ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/tsmcs-average-wafer-prices-increased-by-over-15-percent-each-year-since-2019-report-suggests-gross-profit-margins-increase-by-3-3x-in-2025-alone-facing-no-real-challengers</link>
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                            <![CDATA[ EUV lithography era in chipmaking began in 2019 and there are no signs that this is going to stop as process technologies are getting more complex. However, there are fundamental reasons why TSMC's quotes are rising quicker than its costs and its customers are not leaving for other foundries. ]]>
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                                                                        <pubDate>Mon, 29 Dec 2025 15:37:33 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ccriH99hinz37Jq6RzYJFb-1280-80.jpg">
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                                                            <title><![CDATA[ China's reverse-engineered Frankenstein EUV chipmaking tool hasn't produced a single chip — sanctions-busting experiment is still years away from becoming operational ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/chinas-reverse-engineered-frankenstein-euv-chipmaking-tool-hasnt-produced-a-single-chip-sanctions-busting-experiment-is-still-years-away-from-becoming-operational</link>
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                            <![CDATA[ A reported attempt by a covert Chinese lab to reverse-engineer an EUV lithography scanner underscores that, despite access to scattered components, replicating ASML's EUV tools is effectively impossible without recreating the company's entire global supply chain, optics ecosystem, and proprietary software built over decades. ]]>
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                                                                        <pubDate>Wed, 24 Dec 2025 14:20:22 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/VeUsd9vM4WBszDumWSs7gJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
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                                                            <title><![CDATA[ Chinese fabs are reportedly upgrading older ASML DUV lithography chipmaking machines — secondary channels and independent engineers used to soup up Twinscan NXT series ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/china-is-squeezing-more-life-out-of-asmls-older-duv-tools-as-chip-controls-tighten</link>
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                            <![CDATA[ Chinese fabs are quietly extending the useful life and performance of older ASML deep ultraviolet lithography systems by upgrading key subsystems, as Beijing pushes to sustain advanced chip output. ]]>
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                                                                        <pubDate>Mon, 22 Dec 2025 17:51:28 +0000</pubDate>                                                                                                                                <updated>Tue, 23 Dec 2025 12:52:40 +0000</updated>
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                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/iiBPT3tVuXkSdD4xCKSR9m-1280-80.png">
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                                                            <title><![CDATA[ China may have reverse engineered EUV lithography tool in covert lab, report claims — employees given fake IDs to avoid secret project being detected, prototypes expected in 2028 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/china-may-have-reverse-engineered-euv-lithography-tool-in-covert-lab-report-claims-employees-given-fake-ids-to-avoid-secret-project-being-detected-prototypes-expected-in-2028</link>
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                            <![CDATA[ China has reportedly built and begun testing a secret EUV lithography prototype using ASML-style laser-produced plasma technology. Yet, despite generating 13.5-nm light, the system remains unable to make chips and appears to be years away from achieving a complete, production-ready EUV manufacturing capability. ]]>
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                                                                        <pubDate>Thu, 18 Dec 2025 11:40:45 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/PQuTVKz3fP2hiK4DF7jvVJ-1280-80.jpg">
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                                                            <title><![CDATA[ Intel installs industry's first commercial High-NA EUV lithography tool — ASML Twinscan EXE:5200B sets the stage for 14A ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/intel-installs-industrys-first-commercial-high-na-euv-lithography-tool-asml-twinscan-exe-5200b-sets-the-stage-for-14a</link>
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                            <![CDATA[ Intel has installed and qualified ASML's TWINSCAN EXE:5200B, the first High-NA EUV lithography tool designed for commercial production, reiterating Intel's plans to use High-NA EUV patterning for 14A process technology and onwards. ]]>
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                                                                        <pubDate>Wed, 17 Dec 2025 12:25:00 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
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                                                            <title><![CDATA[ New 1.4nm nanoimprint lithography template could reduce the need for EUV steps in advanced process nodes — questions linger as no foundry has yet committed to nanoimprint lithography for high-volume manufacturing ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/japans-dnp-targets-2027-mass-production-of-1-4nm-nanoimprint-templates</link>
                                                                            <description>
                            <![CDATA[ Japan’s Dai Nippon Printing (DNP) claims to have developed a nanoimprint lithography template capable of patterning logic with a feature size of 1.4nm, with plans for mass production in 2027. ]]>
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                                                                        <pubDate>Tue, 16 Dec 2025 16:00:40 +0000</pubDate>                                                                                                                                <updated>Tue, 16 Dec 2025 16:02:01 +0000</updated>
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                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/th4HJKPGpabJdyos3QchNR-1280-80.png">
                                                            <media:credit><![CDATA[Dai Nippon Printing Co., Ltd. ]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[A template for nanoimprinting. ]]></media:description>                                                            <media:text><![CDATA[A template for nanoimprinting. ]]></media:text>
                                <media:title type="plain"><![CDATA[A template for nanoimprinting. ]]></media:title>
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                                                            <title><![CDATA[ Chinese scientists discover method to cut defects by 99% with DUV chipmaking equipment, but it destroys EUV pattern fidelity — analyzing photoresist clustering with cryo-ET at 105°C  ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/chinese-scientists-discover-method-to-cut-defects-by-99-percent-with-duv-chipmaking-equipment-but-it-destroys-euv-pattern-fidelity-analyzing-photoresist-clustering-with-cryo-et-at-105-c</link>
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                            <![CDATA[ Chinese researchers have visualized how photoresist polymers cluster during development using cryogenic electron tomography and found that slightly raising post-exposure bake temperature could reduce defect density, but the finding has limited practical impact since this temperature is already typical for DUV processes and unsuitable for EUV lithography, where it would harm resolution and yield. ]]>
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                                                                        <pubDate>Mon, 10 Nov 2025 19:55:18 +0000</pubDate>                                                                                                                                <updated>Mon, 10 Nov 2025 19:55:22 +0000</updated>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/RDRDxfSMpnNVf6QfdZd63b-1280-80.png">
                                                            <media:credit><![CDATA[GlobalFoundries]]></media:credit>
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                                                            <title><![CDATA[  European think tank suggests punitive DUV machine export ban following China's latest round of rare earth export controls  ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/eu-considers-duv-export-ban</link>
                                                                            <description>
                            <![CDATA[ A European think tank suggests retaliatory trade measures against China, and the trigger appears to be Beijing’s threat to restrict exports of gallium and germanium, two raw materials used in everything from EVs to satellites. ]]>
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                                                                        <pubDate>Thu, 23 Oct 2025 12:45:15 +0000</pubDate>                                                                                                                                <updated>Thu, 23 Oct 2025 15:12:15 +0000</updated>
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                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
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                                                            <title><![CDATA[ TSMC reduces peak power consumption of EUV tools by 44% — company to save 190 million kilowatt-hours of electricity by 2030 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/tsmc-reduces-peak-power-consumption-of-euv-tools-by-44-percent-company-to-save-190-million-kilowatt-hours-of-electricity-by-2030</link>
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                            <![CDATA[ TSMC, which is responsible for about 9% of Taiwan's electricity use, has launched a global EUV Dynamic Energy Saving Program that reduces EUV tool power consumption by 8% — aiming to save 190 million kWh and 101 kilotons of CO₂ by 2030. ]]>
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                                                                        <pubDate>Wed, 01 Oct 2025 17:54:32 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/MqQcLuXtcS9FPhQiZeDavC-1280-80.jpg">
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                                                            <title><![CDATA[ China bets on DUV as EUV blockade reshapes chipmaking — but it won't dethrone ASML's advanced lithography, for now ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/china-bets-on-duv-as-euv-blockade-reshapes-chipmaking</link>
                                                                            <description>
                            <![CDATA[ U.S. pressure has cut China off from ASML’s EUV tools, forcing SMIC and peers to stretch DUV and build local scanners. It may be costly now, but it could be key to the country's road to self-reliance in semiconductor manufacturing. ]]>
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                                                                        <pubDate>Mon, 22 Sep 2025 15:34:28 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ lukejamesalden@gmail.com (Luke James) ]]></author>                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
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                                                            <title><![CDATA[ 'Beyond EUV' chipmaking tech pushes Soft X-Ray lithography closer to challenging Hyper-NA EUV — 'B-EUV' uses new resist chemistry to make smaller chips ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/beyond-euv-chipmaking-tech-pushes-soft-x-ray-lithography-closer-to-challenging-hyper-na-euv-b-euv-uses-new-resist-chemistry-to-make-smaller-chips</link>
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                            <![CDATA[ Researchers at Johns Hopkins University have developed a new resist chemistry and deposition method optimized for 6.5 nm B-EUV light, marking a key step toward future Soft X-ray lithography. However, major challenges like light sources and tool infrastructure remain unresolved. ]]>
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                                                                        <pubDate>Wed, 17 Sep 2025 11:38:04 +0000</pubDate>                                                                                                                                <updated>Wed, 17 Sep 2025 20:56:59 +0000</updated>
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                                                    <category><![CDATA[Tech Industry]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/vnqdtRupVqWHAik43ZWctH-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
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                                                            <title><![CDATA[ How TSMC managed to increase efficiency of ASML's EUV tools: System-level optimizations and in-house pellicles —chipmaker boosted EUV-driven wafer production by 30x over six years while reducing power consumption by 24% ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/how-tsmc-managed-to-increase-efficiency-of-asmls-euv-tools-system-level-optimizations-and-in-house-pellicles-chipmaker-boosted-euv-driven-wafer-production-by-30x-over-six-years-while-reducing-power-consumption-by-24-percent</link>
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                            <![CDATA[ TSMC has dramatically boosted EUV scanner throughput, pellicle performance, and energy efficiency through deep in-house innovations. ]]>
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                                                                        <pubDate>Wed, 17 Sep 2025 11:10:06 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/jxkTQmMET8rduWfUZgafWM-1280-80.jpg">
                                                            <media:credit><![CDATA[Taiwan Semiconductor Manufacturing Co., Ltd.]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[TSMC Lobby]]></media:description>                                                            <media:text><![CDATA[TSMC Lobby]]></media:text>
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                                                            <title><![CDATA[ ASML and SK hynix assemble industry-first 'commercial' High-NA EUV system at fab in South Korea ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/asml-and-sk-hynix-assemble-industry-first-commercial-high-na-euv-system-at-fab-in-south-korea</link>
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                            <![CDATA[ SK hynix is the first memory maker to assemble ASML's High-NA EUV lithography system NXE:5200B at its M16 fab in Icheon to use it for R&D of next-generation process technologies before transitioning to full High-NA-based production later this decade. ]]>
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                                                                        <pubDate>Wed, 03 Sep 2025 09:58:25 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
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                                                            <title><![CDATA[ China-based firm delivers its first chipmaking tool that stamps nanoscale processor designs onto wafers — Prinano's nanoimprint lithography tool uses quartz molds engraved with circuits ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/china-based-firm-delivers-its-first-chipmaking-tool-that-stamps-nanoscale-chip-designs-onto-wafers-prinanos-nanoimprint-lithography-tool-uses-quartz-molds-engraved-with-circuits</link>
                                                                            <description>
                            <![CDATA[ China's Prinano Technology has shipped its first domestically developed semiconductor-grade step-and-repeat nanoimprint lithography system that offers sub-10 nm single-step patterning for applications like memory, photonics, and advanced packaging. ]]>
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                                                                        <pubDate>Fri, 15 Aug 2025 16:52:00 +0000</pubDate>                                                                                                                                <updated>Fri, 15 Aug 2025 16:59:42 +0000</updated>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ApSKFpQCfh726LpLJTFnaK-1280-80.jpg">
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                                                            <title><![CDATA[ Micron samples ground-breaking EUV-based memory — new DRAM process slashes power consumption by 20% and boosts performance by 15% ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-samples-ground-breaking-euv-based-memory-new-dram-process-slashes-power-consumption-by-20-percent-and-boosts-performance-by-15-percent</link>
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                            <![CDATA[ Micron has begun sampling LPDDR5X chips made with its new 1γ process that relies on EUV patterning, marking a major technology transition that improves performance, power efficiency, and bit density across its DRAM portfolio. ]]>
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                                                                        <pubDate>Thu, 26 Jun 2025 16:02:59 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ncBURJMeiru4ME55B6NCEJ-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
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                                                            <title><![CDATA[ Plans to shrink particle accelerators by 1,000x could speed chipmaking by 15X - Inversion Semiconductor proposes 'tabletop' particle accelerators with petawatt lasers ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/plans-to-shrink-particle-accelerators-by-1000x-could-speed-chipmaking-by-15x-inversion-semiconductor-proposes-tabletop-particle-accelerators-with-petawatt-lasers</link>
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                            <![CDATA[ Inversion Semiconductor, a 2024 startup backed by Y Combinator, aims to develop a compact, LWFA-based light source that 10 times more powerful than ASML's current EUV light sources while also targeting even shorter wavelengths. ]]>
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                                                                        <pubDate>Mon, 09 Jun 2025 17:09:56 +0000</pubDate>                                                                                                                                <updated>Tue, 09 Sep 2025 18:27:54 +0000</updated>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/f5P7a7qwfopDaA4MsgPPoa-1280-80.jpg">
                                                            <media:credit><![CDATA[Inversion Lithography]]></media:credit>
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                                                            <title><![CDATA[ Intel has championed High-NA EUV chipmaking tools, but costs and other limitations could delay industry-wide adoption: Report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/intel-has-championed-high-na-euv-chipmaking-tools-but-costs-and-other-limitations-could-delay-industry-wide-adoption-report</link>
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                            <![CDATA[ Intel has taken an early lead in High-NA EUV lithography, but widespread adoption remains constrained by high tool costs, limited exposure field size, and potential need for substantial ecosystem upgrades. ]]>
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                                                                        <pubDate>Wed, 16 Apr 2025 16:36:03 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:43:31 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
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                                                            <title><![CDATA[ Pat Gelsinger turns to particle accelerators for a new way to make chips, joins xLight ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/pat-gelsinger-turns-to-particle-accelerators-for-a-new-way-to-make-chips-joins-xlight</link>
                                                                            <description>
                            <![CDATA[ Pat Gelsinger is back in the semiconductor game with xLight, a company that plans to make an EUV light source using a collider. ]]>
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                                                                        <pubDate>Sun, 13 Apr 2025 11:55:00 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:44:55 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/i6bqqMRXrXHn47tyUEnXw7-1280-80.jpg">
                                                            <media:credit><![CDATA[xLight]]></media:credit>
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                                                            <title><![CDATA[ ASML teams up with Imec for sub-2nm process technologies with High-NA EUV chipmaking tools ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/asml-teams-up-with-imec-for-sub-2nm-process-technologies-with-high-na-euv-chipmaking-tools</link>
                                                                            <description>
                            <![CDATA[ ASML to install its High-NA EUV lithography tools in Imec's pilot production line to give research and development personnel access to leading-edge equipment. ]]>
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                                                                        <pubDate>Wed, 12 Mar 2025 11:05:27 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:41:56 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/fdxw9P4zVFbAmcs3MtwjDE-1280-80.jpg">
                                                            <media:credit><![CDATA[Imec]]></media:credit>
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                                                            <title><![CDATA[ Micron unveils DDR5-9200 memory: 1γ process technology with EUV ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-unveils-ddr5-9200-memory-1g-process-technology-with-euv</link>
                                                                            <description>
                            <![CDATA[ Micron's 1γ fabrication technology with EUV, new HKMG, and BEOL promises to increase performance while cutting power consumption for DRAM. ]]>
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                                                                        <pubDate>Tue, 25 Feb 2025 18:57:21 +0000</pubDate>                                                                                                                                <updated>Fri, 14 Mar 2025 14:14:56 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/vnqdtRupVqWHAik43ZWctH-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
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                                                            <title><![CDATA[ Intel has processed 30,000 wafers with High-NA EUV chipmaking tool ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/intel-has-processed-30-000-wafers-with-high-na-euv-chipmaking-tool</link>
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                            <![CDATA[ Intel says ASML's High-NA EUV tools have produced 30,000 wafers in a single quarter. ]]>
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                                                                        <pubDate>Tue, 25 Feb 2025 17:21:36 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:53:44 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/PQuTVKz3fP2hiK4DF7jvVJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML EUV machine]]></media:description>                                                            <media:text><![CDATA[ASML EUV machine]]></media:text>
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                                                            <title><![CDATA[ Rapidus to reportedly install 10 EUV chipmaking tools at its fab in Japan ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/rapidus-to-reportedly-install-10-euv-litho-tools-into-its-fab-in-japan</link>
                                                                            <description>
                            <![CDATA[ Rapidus's IIM-1 and IIM-2 will feature 10 EUV lithography systems. ]]>
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                                                                        <pubDate>Thu, 30 Jan 2025 11:52:22 +0000</pubDate>                                                                                                                                <updated>Thu, 30 Jan 2025 11:52:55 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/VeUsd9vM4WBszDumWSs7gJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML EUV machine]]></media:description>                                                            <media:text><![CDATA[ASML EUV machine]]></media:text>
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                                                            <title><![CDATA[ Fujifilm to double spending on chip materials as U.S., Japan and South Korea up chip production ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/fujifilm-to-double-spending-on-chip-materials-as-u-s-japan-and-south-korea-up-chip-production</link>
                                                                            <description>
                            <![CDATA[ Fujifilm, one of a few makers of EUV photoresists, will expand capacities in the U.S., Japan, and South Korea as Intel, TSMC, Samsung, and SK hynix ramp up production. ]]>
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                                                                        <pubDate>Sun, 26 Jan 2025 18:10:58 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:43:38 +0000</updated>
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                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/RDRDxfSMpnNVf6QfdZd63b-1280-80.png">
                                                            <media:credit><![CDATA[GlobalFoundries]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[GlobalFoundries]]></media:description>                                                            <media:text><![CDATA[GlobalFoundries]]></media:text>
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                                                            <title><![CDATA[ American lab is developing a BAT laser that could enable 'beyond EUV' lithography, provide 10X power efficiency boost ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/american-lab-is-developing-a-bat-laser-that-could-enable-beyond-euv-lithography-provide-10x-power-efficiency-boost</link>
                                                                            <description>
                            <![CDATA[ Petawatt-class thulium lasers could replace CO2 lasers in lithography machines down the road. ]]>
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                                                                        <pubDate>Sun, 05 Jan 2025 14:00:45 +0000</pubDate>                                                                                                                                <updated>Sun, 05 Jan 2025 16:24:56 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/uNfbwnmHxf6Ve2h6mtiBaE-1280-80.jpg">
                                                            <media:credit><![CDATA[Lawrence Livermore National Laboratory]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Lawrence Livermore National Laboratory]]></media:description>                                                            <media:text><![CDATA[Lawrence Livermore National Laboratory]]></media:text>
                                <media:title type="plain"><![CDATA[Lawrence Livermore National Laboratory]]></media:title>
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                                                            <title><![CDATA[ ASML CEO says China is 10 to 15 years behind in chipmaking capabilities ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/asml-ceo-says-china-is-10-to-15-years-behind-in-chipmaking-capabilities</link>
                                                                            <description>
                            <![CDATA[ Without EUV, Chinese semiconductor industry is over a decade behind Taiwan, U.S. ]]>
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                                                                        <pubDate>Wed, 25 Dec 2024 14:52:06 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:43:44 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
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                                                            <title><![CDATA[ ASML reportedly cancels orders for the Lego EUV machine set — the kit is only available to ASML employees [Updated] ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/asml-reportedly-cancels-orders-for-the-lego-euv-machine-set-from-non-asml-emails-the-kit-is-only-available-to-asml-employees</link>
                                                                            <description>
                            <![CDATA[ ASML offered Lego versions of its NA-EUV machines on the ASML store but has since limited it to orders from valid ASML email addresses only. ]]>
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                                                                        <pubDate>Sun, 22 Dec 2024 13:00:00 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 13:01:44 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ editors@tomshardware.com (Jowi Morales) ]]></author>                    <dc:creator><![CDATA[ Jowi Morales ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/odzELSwDLuXjWXMk9GNeeJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML Twinscan EXE:5000 Lego Set]]></media:description>                                                            <media:text><![CDATA[ASML Twinscan EXE:5000 Lego Set]]></media:text>
                                <media:title type="plain"><![CDATA[ASML Twinscan EXE:5000 Lego Set]]></media:title>
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                                                            <title><![CDATA[ Rapidus is first Japanese company to install ASML's cutting-edge EUV machine — chipmaking tool for 2nm chips expected to be operational in early 2025 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/rapidus-is-first-japanese-company-to-install-asmls-cutting-edge-euv-machine-chipmaking-tool-for-2nm-chips-expected-to-be-operational-this-year</link>
                                                                            <description>
                            <![CDATA[ Rapidus gets ASML's Twinscan NXE:3800E, almost completes its installation. ]]>
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                                                                        <pubDate>Thu, 19 Dec 2024 15:18:56 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 10:10:38 +0000</updated>
                                                                                                                                            <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/GVfXyCp9tPctfscUnQmFTB-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML]]></media:description>                                                            <media:text><![CDATA[ASML]]></media:text>
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                                                            <title><![CDATA[ Russia plans EUV chipmaking tools that it says will be cheaper and easier to build than ASML's — country outlines new roadmap to smaller chips ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/russia-plans-euv-chipmaking-tools-that-it-says-will-be-cheaper-and-easier-to-build-than-asmls-country-outlines-new-roadmap-to-smaller-chips</link>
                                                                            <description>
                            <![CDATA[ Russia to develop lithography systems that could compete against ASML's Twinscan NXE EUV systems. ]]>
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                                                                        <pubDate>Wed, 18 Dec 2024 12:34:46 +0000</pubDate>                                                                                                                                <updated>Wed, 18 Dec 2024 12:48:48 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/8a57BmBK6jv2XVhhgbFj3Y-1280-80.jpg">
                                                            <media:credit><![CDATA[Intel]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Intel]]></media:description>                                                            <media:text><![CDATA[Intel]]></media:text>
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                                                            <title><![CDATA[ ASML made a $230 Lego kit version of its $380 million semiconductor tool — world's first High-NA EUV machine immortalized in small form for your mantle ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/asml-made-a-usd230-lego-kit-version-of-its-usd380-million-semiconductor-tool-worlds-first-high-na-euv-machine-immortalized-in-small-form-for-your-mantle</link>
                                                                            <description>
                            <![CDATA[ ASML has added the TWINSCAN EXE:5000 Lego set to its growing portfolio of gifts. ]]>
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                                                                        <pubDate>Sun, 01 Dec 2024 15:11:30 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:44:29 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                                    <dc:creator><![CDATA[ Mark Tyson ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ADb4ttFWLkqmvuGmWG5Ug7-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML lego gifts]]></media:description>                                                            <media:text><![CDATA[ASML lego gifts]]></media:text>
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                                                            <title><![CDATA[ TSMC rumored to receive High NA EUV machines from ASML this year ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/tsmc-rumored-to-receive-high-na-euv-machines-from-asml-this-year</link>
                                                                            <description>
                            <![CDATA[ TSMC is set to receive its first shipment of ASML's High NA EUV machine later this year. ]]>
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                                                                        <pubDate>Sun, 03 Nov 2024 14:37:06 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 09:48:01 +0000</updated>
                                                                                                                                            <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ editors@tomshardware.com (Jowi Morales) ]]></author>                    <dc:creator><![CDATA[ Jowi Morales ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML]]></media:description>                                                            <media:text><![CDATA[ASML]]></media:text>
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                                                            <title><![CDATA[ New York State to get new $825 million semiconductor R&D facility ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/new-york-state-to-get-new-usd825-million-semiconductor-r-and-d-facility</link>
                                                                            <description>
                            <![CDATA[ The NSTC is getting a flagship facility in Albany, New York, that's dedicated to EUV research and development. ]]>
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                                                                        <pubDate>Thu, 31 Oct 2024 14:47:22 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 09:52:28 +0000</updated>
                                                                                                                                            <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ editors@tomshardware.com (Jowi Morales) ]]></author>                    <dc:creator><![CDATA[ Jowi Morales ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/GsbLsnHrbCZ8HCAoWLKLgV-1280-80.jpg">
                                                            <media:credit><![CDATA[NY CREATES]]></media:credit>
                                                                                                                                                                        <media:description><![CDATA[The Albany NanoTech Complex—a high-tech site boasting over 1.65 million square feet of space—is operated by the non-profit New York Center for Research, Economic Advancement, Technology, Engineering, and Science (NY CREATES). ]]></media:description>                                                            <media:text><![CDATA[Albany NanoTech Complex]]></media:text>
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                                                            <title><![CDATA[ Analyst firm raises alarm about EUV chipmaking tools — each consumes as much power as a small city, fabs to consume 54,000 Gigawatts by 2030 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/each-euv-chipmaking-tool-consumes-as-much-power-as-a-small-city-euv-fabs-to-consume-54-000-gigawatts-by-2030-more-than-singapore</link>
                                                                            <description>
                            <![CDATA[ Leading-edge semiconductor fabs to consume 54,000  Gigawatts a year by 2030, which is more than some countries consume today. ]]>
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                                                                        <pubDate>Thu, 31 Oct 2024 13:01:34 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 10:06:34 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/yQaGAkqxhQh83Cd9CuzDWg-1280-80.jpg">
                                                            <media:credit><![CDATA[TSMC]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[TSMC fab]]></media:description>                                                            <media:text><![CDATA[TSMC fab]]></media:text>
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                                                            <title><![CDATA[ Corning's Extreme ULE glass debuts for next-gen High-NA EUV chipmaking ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/corning-unveils-extreme-ule-glass-for-use-in-next-generation-microchip-production</link>
                                                                            <description>
                            <![CDATA[ Corning introduces new Extreme ULE glass for photomasks and mirrors to be used with next-generation EUV and High-NA EUV tools. ]]>
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                                                                        <pubDate>Wed, 02 Oct 2024 14:37:44 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/Vu6N9RDjut8Yy6FiGKNSCB-1280-80.png">
                                                            <media:credit><![CDATA[Intel]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Mask]]></media:description>                                                            <media:text><![CDATA[Mask]]></media:text>
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                                                            <title><![CDATA[ China's SMEE files patent for an EUV chipmaking tool — tool aims to break the shackles of ASML export restrictions ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/chinas-smee-files-patent-for-an-euv-chipmaking-tool-tool-aims-to-break-the-shackles-of-asml-export-restrictions</link>
                                                                            <description>
                            <![CDATA[ Shanghai Microelectronics Equipment patents key components of an EUV lithography tool. ]]>
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                                                                        <pubDate>Fri, 13 Sep 2024 14:45:27 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/VeUsd9vM4WBszDumWSs7gJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML EUV machine]]></media:description>                                                            <media:text><![CDATA[ASML EUV machine]]></media:text>
                                <media:title type="plain"><![CDATA[ASML EUV machine]]></media:title>
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                                                            <title><![CDATA[ TSMC's first High-NA EUV litho tool to begin installation this month say industry insiders ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/tsmcs-first-high-na-euv-litho-tool-to-begin-installation-this-month-according-to-industry-insiders</link>
                                                                            <description>
                            <![CDATA[ TSMC to start installing High-NA EUV system for R&D purposes this month. ]]>
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                                                                        <pubDate>Tue, 10 Sep 2024 12:19:10 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:55:33 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/pSy7xJedzqveFGvQJgoiTj-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML]]></media:description>                                                            <media:text><![CDATA[ASML]]></media:text>
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                                                            <title><![CDATA[ Intel to establish advanced chip R&D center in Japan — a collaborative venture with Tokyo's Advanced Industrial Science and Technology (AIST) ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/intel-to-establish-advanced-chip-randd-center-in-japan-a-collaborative-venture-with-tokyos-advanced-industrial-science-and-technology-aist</link>
                                                                            <description>
                            <![CDATA[ Intel and Japan's National Institute of Advanced Industrial Science and Technology to establish semiconductor R&D center to advance Japanese chip industry. ]]>
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                                                                        <pubDate>Tue, 03 Sep 2024 13:07:05 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:45:14 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/VeUsd9vM4WBszDumWSs7gJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML EUV machine]]></media:description>                                                            <media:text><![CDATA[ASML EUV machine]]></media:text>
                                <media:title type="plain"><![CDATA[ASML EUV machine]]></media:title>
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                                                            <title><![CDATA[ SK hynix says its 3D DRAM is half as expensive to produce — credits EUV chipmaking tools ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-says-its-3d-dram-is-half-as-expensive-to-produce-credits-euv-chipmaking-tools</link>
                                                                            <description>
                            <![CDATA[ SK hynix says adopting 4F2 structures and 3D transistors will increase the cost-efficiency of EUV lithography usage in DRAM production. ]]>
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                                                                        <pubDate>Fri, 16 Aug 2024 17:44:43 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 12:58:04 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix]]></media:description>                                                            <media:text><![CDATA[SK Hynix]]></media:text>
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                                                            <title><![CDATA[ Samsung may start installing its first High-NA EUV litho tool in late 2024 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/samsung-may-start-installing-its-first-high-na-euv-litho-tool-in-late-2024</link>
                                                                            <description>
                            <![CDATA[ Samsung will be about a year behind Intel in installing ASML's Twinscan EXE:5000 High-NA litho tool for development purposes. ]]>
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                                                                        <pubDate>Thu, 15 Aug 2024 15:40:40 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:45:33 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/fdxw9P4zVFbAmcs3MtwjDE-1280-80.jpg">
                                                            <media:credit><![CDATA[Imec]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Imec]]></media:description>                                                            <media:text><![CDATA[Imec]]></media:text>
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                                                            <title><![CDATA[ Japanese scientists develop simplified EUV scanner that can make production of chips considerably cheaper ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/japanese-scientists-develop-simplified-euv-scanner-that-can-make-production-of-chips-considerably-cheaper</link>
                                                                            <description>
                            <![CDATA[ Professor Tsumoru Shintake of the Okinawa Institute of Science and Technology has proposed an all-new and greatly simplified EUV lithography tool that is cheaper than those developed and made by ASML. If the device hits mass production, it could reshape the chipmaking equipment industry. ]]>
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                                                                        <pubDate>Tue, 06 Aug 2024 12:20:39 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/VeUsd9vM4WBszDumWSs7gJ-1280-80.jpg">
                                                            <media:credit><![CDATA[ASML]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[ASML EUV machine]]></media:description>                                                            <media:text><![CDATA[ASML EUV machine]]></media:text>
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                                                            <title><![CDATA[ The U.S. has sanctioned 18 Chinese fabs, dozens remain in white zone ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/the-us-has-sanctioned-18-chinese-fabs-dozens-remain-in-in-white-zone</link>
                                                                            <description>
                            <![CDATA[ The U.S. government approves shipments of wafer fab equipment to many Chinese fabs, other are banned. Question is, can those tools be installed in banned fabs? ]]>
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                                                                        <pubDate>Wed, 31 Jul 2024 11:34:59 +0000</pubDate>                                                                                                                                <updated>Wed, 31 Jul 2024 13:14:19 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/5Mq4J9jfCyPqV9qsyhUWe8-1280-80.jpg">
                                                            <media:credit><![CDATA[SMIC]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SMIC]]></media:description>                                                            <media:text><![CDATA[SMIC]]></media:text>
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                                                            <title><![CDATA[ Tokyo Electron's new tool can reduce the necessity for EUV double patterning and improve yield ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/tokyo-electrons-new-tool-can-reduce-the-necessity-for-euv-double-patterning-and-improve-yield</link>
                                                                            <description>
                            <![CDATA[ Tokyo Electron unveils the Acrevia tool, which can improve patterning with gas cluster beam technology. ]]>
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                                                                        <pubDate>Tue, 09 Jul 2024 15:31:25 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 12:58:05 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/N2eYhi6qQSjkTELBVHvRc7-1280-80.jpg">
                                                            <media:credit><![CDATA[Tokyo Electron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Tokyo Electron]]></media:description>                                                            <media:text><![CDATA[Tokyo Electron]]></media:text>
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                                                            <title><![CDATA[ Micron is the last memory maker to join the EUV party — company aims for EUV DRAM mass production in 2025 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-pushes-dram-tech-with-euv-lithography-aims-for-mass-production-in-2025</link>
                                                                            <description>
                            <![CDATA[ Micron reiterates its plans to use EUV for high-volume DRAM production next year as it starts pilot production on a 1-gamma node. ]]>
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                                                                        <pubDate>Thu, 27 Jun 2024 11:58:43 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 13:02:00 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/XToWvWNEZrbQtmixi33Qan-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
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                                                            <title><![CDATA[ Intel CEO says China must make its own chips if sanctions become too restrictive, points to EUV as key cutoff point ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/cpus/intel-ceo-says-china-must-make-its-own-chips-if-sanctions-are-too-restrictive-points-to-euv-as-key-cutoff-point</link>
                                                                            <description>
                            <![CDATA[ Intel CEO Pat Gelsinger told Tom's Hardware during a question and answer session at Computex 2024 that China must make its own processors if US sanctions on the latest chips become too restrictive. ]]>
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                                                                        <pubDate>Wed, 05 Jun 2024 00:59:50 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 10:11:44 +0000</updated>
                                                                                                                                            <category><![CDATA[CPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ palcorn@outlook.com (Paul Alcorn) ]]></author>                    <dc:creator><![CDATA[ Paul Alcorn ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/zfcQaiL5B6nySyrnn89ppg-1280-80.jpg">
                                                            <media:credit><![CDATA[Tom&#039;s Hardware]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Pat Gelsinger]]></media:description>                                                            <media:text><![CDATA[Pat Gelsinger]]></media:text>
                                <media:title type="plain"><![CDATA[Pat Gelsinger]]></media:title>
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