<?xml version="1.0" encoding="UTF-8"?>
<rss version="2.0"
     xmlns:content="http://purl.org/rss/1.0/modules/content/"
     xmlns:dc="https://purl.org/dc/elements/1.1/"
     xmlns:dcterms="http://purl.org/dc/terms/"
     xmlns:media="http://search.yahoo.com/mrss/"
     xmlns:atom="http://www.w3.org/2005/Atom"
>
    <channel>
                    <atom:link href="https://www.tomshardware.com/feeds/tag/hbm4" rel="self" type="application/rss+xml" />
                            <title><![CDATA[ Latest from Tom's Hardware in Hbm4 ]]></title>
                <link>https://www.tomshardware.com/tag/hbm4</link>
        <description><![CDATA[ All the latest hbm4 content from the Tom's Hardware team ]]></description>
                                    <lastBuildDate>Fri, 24 Apr 2026 13:10:34 +0000</lastBuildDate>
                            <language>en</language>
                                <item>
                                                            <title><![CDATA[ Union rally causes Samsung fab production to plummet by 58% during night shift as workers demand up to $400,000 bonuses — updated figures show over 40,000 people attended rally for better pay and bonuses ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/big-tech/union-rally-causes-samsung-fab-production-to-plummet-by-58-percent-during-night-shift-as-workers-demand-up-to-usd400-000-bonuses-updated-figures-show-over-40-000-people-attended-rally-for-better-pay-and-bonuses</link>
                                                                            <description>
                            <![CDATA[ Samsung's memory fab and contract chip foundry production for a single night-shift fell by up to 58% after a one-day strike. The union is gearing up for an extended 18-day labor action if company management refuses to meet their demands when it comes to pay and bonuses. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">xNzyrEZgFer8J4qRXBWgUA</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/DPNfrQbh2gPkNpAuCmtSJ7-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Fri, 24 Apr 2026 13:10:34 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Big Tech]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ editors@tomshardware.com (Jowi Morales) ]]></author>                    <dc:creator><![CDATA[ Jowi Morales ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/DPNfrQbh2gPkNpAuCmtSJ7-1280-80.jpg">
                                                            <media:credit><![CDATA[Getty / Bloomberg]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Samsung logo]]></media:description>                                                            <media:text><![CDATA[Samsung logo]]></media:text>
                                <media:title type="plain"><![CDATA[Samsung logo]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/DPNfrQbh2gPkNpAuCmtSJ7-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ AMD and Samsung ink memory supply memorandum for EPYC and Instinct products — unprecedented deal also includes scope for foundry partnership ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/amd-and-samsung-ink-memory-supply-memorandum-for-epyc-and-instinct-products-unprecedented-deal-also-includes-scope-for-foundry-partnership</link>
                                                                            <description>
                            <![CDATA[ Samsung to remain primary HBM memory supplier for AMD's AI accelerators as the companies look into possible foundry relationship. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">WyPGL7EA59uXTZMj3wHmaT</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/SUTR9jxWe8aiYRjXPCPnVj-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Thu, 19 Mar 2026 11:18:47 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/SUTR9jxWe8aiYRjXPCPnVj-1280-80.jpg">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/SUTR9jxWe8aiYRjXPCPnVj-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron enters high-volume production of HBM4 for Nvidia Vera Rubin - 2.3x bandwidth improvement and 20% boost in power efficiency ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-enters-high-volume-production-of-hbm4-for-nvidia-vera-rubin</link>
                                                                            <description>
                            <![CDATA[ The HBM4 36GB 12H stack runs at over 11 Gb/s pin speeds, delivering bandwidth greater than 2.8 TB/s. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">KApPvpjabBQrSxs2MNA4gU</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/vD8rzmDbiAqw5idpPhDpZ5-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Mon, 16 Mar 2026 22:47:35 +0000</pubDate>                                                                                                                                <updated>Mon, 16 Mar 2026 22:48:51 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/vD8rzmDbiAqw5idpPhDpZ5-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron&#039;s HBM4]]></media:description>                                                            <media:text><![CDATA[Micron&#039;s HBM4]]></media:text>
                                <media:title type="plain"><![CDATA[Micron&#039;s HBM4]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/vD8rzmDbiAqw5idpPhDpZ5-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Intel shows off leading-edge tech with massive AI processor test vehicle — huge chip features four logic tiles, 12 HBM4 stacks, and 8X reticle size ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/intel-shows-off-leading-edge-tech-with-massive-ai-processor-test-vehicle-huge-chip-features-four-logic-tiles-12-hbm4-stacks-and-8x-reticle-size</link>
                                                                            <description>
                            <![CDATA[ Intel demonstrates 8X reticle size prototype system-in-package that features four logic tiles, two I/O tiles, and 12 HBM4-class stacks. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">yNPePUCjoXYrYVGeSNHNjH</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/sc4jMRDcUQARDogxU6vbKM-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Fri, 30 Jan 2026 14:56:55 +0000</pubDate>                                                                                                                                <updated>Fri, 30 Jan 2026 19:13:30 +0000</updated>
                                                                                                                                            <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/sc4jMRDcUQARDogxU6vbKM-1280-80.jpg">
                                                            <media:credit><![CDATA[Intel]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Intel]]></media:description>                                                            <media:text><![CDATA[Intel]]></media:text>
                                <media:title type="plain"><![CDATA[Intel]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/sc4jMRDcUQARDogxU6vbKM-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix to spend $13 billion on the world's largest HBM memory assembly plant amid the worst shortage on record — South Korea facility to handle packaging and testing for AI memory campus ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-to-spend-usd13-billion-on-the-worlds-largest-hbm-memory-assembly-plant</link>
                                                                            <description>
                            <![CDATA[ SK hynix is investing $12.9 billion to build a campus-scale, HBM-only advanced packaging and test facility in Cheongju, South Korea, designed for the next generation of HBM memory and intended to ensure SK hynix's leadership in the booming market. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">Z6paCEzP8Qugm2RfyfG9YS</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/rXUooZyf8MGssFAtoZqAZY-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Wed, 14 Jan 2026 18:00:39 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/rXUooZyf8MGssFAtoZqAZY-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix]]></media:description>                                                            <media:text><![CDATA[SK Hynix]]></media:text>
                                <media:title type="plain"><![CDATA[SK Hynix]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/rXUooZyf8MGssFAtoZqAZY-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix shows 16-Hi HBM4 memory for AI accelerators — 48 GB at 10 GT/s over a 2,048 interface ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/sk-hynix-shows-16-hi-hbm4-memory-for-ai-accelerators-48-gb-at-10-gt-s-over-a-2-048-interface</link>
                                                                            <description>
                            <![CDATA[ SK Hynix demonstrates 48 GB HBM4 memory with a 2,048-bit  interface over at up to10 GT/s ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">GA3QWjACCraBanQnKhGnUT</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/csm3RRHbi8S4aPcXcP7Ui9-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Wed, 14 Jan 2026 11:40:24 +0000</pubDate>                                                                                                                                <updated>Wed, 14 Jan 2026 11:40:32 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/csm3RRHbi8S4aPcXcP7Ui9-1280-80.jpg">
                                                            <media:credit><![CDATA[Tom&#039;s Hardware]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[HBM4]]></media:description>                                                            <media:text><![CDATA[HBM4]]></media:text>
                                <media:title type="plain"><![CDATA[HBM4]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/csm3RRHbi8S4aPcXcP7Ui9-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Nvidia refutes reports of HBM4 mass production delay, production 'on track' for  the second half of 2025 — report suggested timeline shift to late Q126 due to revised spec ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/hbm4-mass-production-delayed-as-nvidia-pushes-memory-specs-higher</link>
                                                                            <description>
                            <![CDATA[ HBM4 memory is now expected to reach volume production no earlier than the end of Q1 2026 due to Nvidia's decision to revise its memory specs upward for its next-gen Rubin GPU platform. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">ETsm5F2GRVMfc7wmFzeyn5</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/WPsDAmkaFLUsYpETvNW3n6-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Fri, 09 Jan 2026 10:32:04 +0000</pubDate>                                                                                                                                <updated>Tue, 13 Jan 2026 14:51:30 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/WPsDAmkaFLUsYpETvNW3n6-1280-80.jpg">
                                                            <media:credit><![CDATA[SK hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK hynix HBM4 s&#039;mores]]></media:description>                                                            <media:text><![CDATA[SK hynix HBM4 s&#039;mores]]></media:text>
                                <media:title type="plain"><![CDATA[SK hynix HBM4 s&#039;mores]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/WPsDAmkaFLUsYpETvNW3n6-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix expands U.S. presence with new Bellevue, Seattle office in efforts to get closer to its largest customers — offices near Nvidia, Amazon, and Microsoft highlight co-designed HBM efforts ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-expands-us-footprint-with-seattle-area-office-near-nvidia-and-amazon</link>
                                                                            <description>
                            <![CDATA[ SK hynix is expanding its U.S. presence with a new office in the Seattle metropolitan area, placing the world’s leading HBM supplier within minutes of Nvidia, Amazon, and Microsoft. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">jTxPve5pQHqXJArrn8fZ78</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/w8pDnVdADakuWR4qK6Lksc-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Wed, 24 Dec 2025 17:56:35 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/w8pDnVdADakuWR4qK6Lksc-1280-80.jpg">
                                                            <media:credit><![CDATA[Getty Images / Jung Yeon-Je]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK hynix logo building ]]></media:description>                                                            <media:text><![CDATA[SK hynix logo building ]]></media:text>
                                <media:title type="plain"><![CDATA[SK hynix logo building ]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/w8pDnVdADakuWR4qK6Lksc-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Industry preps new 'cheap' HBM4 memory spec with narrow interface, but it isn't a GDDR killer — JEDEC's new SPHBM4 spec weds HBM4 performance and lower costs to enable higher capacity ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/industry-preps-cheap-hbm4-memory-spec-with-narrow-interface-but-it-isnt-a-gddr-killer-jedecs-new-sphbm4-spec-weds-hbm4-performance-and-lower-costs-to-enable-higher-capacity</link>
                                                                            <description>
                            <![CDATA[ JEDEC is nearing completion of SPHBM4, a standard that enables full HBM4 bandwidth over a 512-bit interface using a 4:1 serialization, reusing standard HBM DRAM dies and a base die. The tech promises to enable a 2.5D integration on organic substrates to support up to 64 GB per stack and more stacks than HBM4 and HBM4E. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">XS2B7xN5T4DtU2LqpCkPii</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/ncBURJMeiru4ME55B6NCEJ-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Sat, 13 Dec 2025 16:10:08 +0000</pubDate>                                                                                                                                <updated>Sat, 13 Dec 2025 16:19:57 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ncBURJMeiru4ME55B6NCEJ-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron]]></media:description>                                                            <media:text><![CDATA[Micron]]></media:text>
                                <media:title type="plain"><![CDATA[Micron]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/ncBURJMeiru4ME55B6NCEJ-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ HBM undergoes major architectural shakeup as TSMC and GUC detail HBM4, HBM4E and C-HBM4E — 3nm base dies to enable 2.5x performance boost with speeds of up to 12.8GT/s by 2027 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/hbm-undergoes-major-architectural-shakeup-as-tsmc-and-guc-detail-hbm4-hbm4e-and-c-hbm4e-3nm-base-dies-to-enable-2-5x-performance-boost-with-speeds-of-up-to-12-8gt-s-by-2027</link>
                                                                            <description>
                            <![CDATA[ HBM is undergoing its first major architectural overhaul in a decade, as HBM4, HBM4E, and C-HBM4E will introduce a 2048-bit interface, logic-node base dies, and optional custom memory logic inside base dies, enabling up to a 2.5X performance leap between 2025 and 2027. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">bATRmrR6B2yJ2N5CXy3K7Z</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/SGkyZ5MswpGGR4PqwZ98FG-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Tue, 02 Dec 2025 18:30:06 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/SGkyZ5MswpGGR4PqwZ98FG-1280-80.jpg">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix&#039;s HBM4]]></media:description>                                                            <media:text><![CDATA[SK Hynix&#039;s HBM4]]></media:text>
                                <media:title type="plain"><![CDATA[SK Hynix&#039;s HBM4]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/SGkyZ5MswpGGR4PqwZ98FG-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron teams up with TSMC to deliver HBM4E, targeted for 2027 — collaboration could enable further customization ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/micron-hands-tsmc-the-keys-to-hbm4e</link>
                                                                            <description>
                            <![CDATA[ Micron has confirmed it will partner with TSMC to manufacture the base logic die for its next-generation HBM4E memory, with production targeted for 2027. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">jdynyLH8KNSgif9hDmQX4Z</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/MYpnvZ25cLowwsBLgkKkmY-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Thu, 25 Sep 2025 16:26:10 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ lukejamesalden@gmail.com (Luke James) ]]></author>                    <dc:creator><![CDATA[ Luke James ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/MYpnvZ25cLowwsBLgkKkmY-1280-80.jpg">
                                                            <media:credit><![CDATA[Getty / SOPA Images]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron Logo]]></media:description>                                                            <media:text><![CDATA[Micron Logo]]></media:text>
                                <media:title type="plain"><![CDATA[Micron Logo]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/MYpnvZ25cLowwsBLgkKkmY-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix completes development of next-gen HBM4 — 2,048-bit interface and 10 GT/s speeds promised for next-gen AI accelerators ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-completes-development-of-hbm4-2-048-bit-interface-and-10-gt-s-speeds-promised</link>
                                                                            <description>
                            <![CDATA[ SK hynix has finalized development of its HBM4 memory stacks with a 2,048-bit interface and 10 GT/s speed, 25% above JEDEC specs. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">k2RampADmEuZCQ4SpiWsCL</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/fTViop6mMkxqfusddorhQG-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Fri, 12 Sep 2025 13:22:18 +0000</pubDate>                                                                                                                                <updated>Fri, 12 Sep 2025 13:33:18 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/fTViop6mMkxqfusddorhQG-1280-80.jpg">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix&#039;s HBM4]]></media:description>                                                            <media:text><![CDATA[SK Hynix&#039;s HBM4]]></media:text>
                                <media:title type="plain"><![CDATA[SK Hynix&#039;s HBM4]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/fTViop6mMkxqfusddorhQG-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix wants you to buy s’more HBM4 to satisfy your high-tech cravings — company's X account compares cutting-edge stacked memory to summer treat ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/sk-hynix-wants-you-to-buy-smore-hbm4-to-satisfy-your-high-tech-cravings-companys-x-account-compares-cutting-edge-stacked-memory-to-summer-treat</link>
                                                                            <description>
                            <![CDATA[ SK hynix has taken to Twitter/X to compare its delicately stacked HBM4 to some deliciously layered s’mores. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">452zPf5XaYuB6JgwogXLn8</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/WPsDAmkaFLUsYpETvNW3n6-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Mon, 11 Aug 2025 18:00:24 +0000</pubDate>                                                                                                                                <updated>Mon, 11 Aug 2025 21:20:40 +0000</updated>
                                                                                                                                            <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                                    <dc:creator><![CDATA[ Mark Tyson ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/WPsDAmkaFLUsYpETvNW3n6-1280-80.jpg">
                                                            <media:credit><![CDATA[SK hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK hynix HBM4 s&#039;mores]]></media:description>                                                            <media:text><![CDATA[SK hynix HBM4 s&#039;mores]]></media:text>
                                <media:title type="plain"><![CDATA[SK hynix HBM4 s&#039;mores]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/WPsDAmkaFLUsYpETvNW3n6-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ HBM roadmaps for Micron, Samsung, and SK hynix: To HBM4 and beyond ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/semiconductors/hbm-roadmaps-for-micron-samsung-and-sk-hynix-to-hbm4-and-beyond</link>
                                                                            <description>
                            <![CDATA[ We've compiled a full roadmap of HBM memory for SK hynix, Micron, and Samsung, including HBM3, HBM3E, HBM4, and HBM4E. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">uzAz722AJNo6mkUwkK78DH</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Wed, 06 Aug 2025 12:50:00 +0000</pubDate>                                                                                                                                <updated>Fri, 15 Aug 2025 15:54:47 +0000</updated>
                                                                                                                                            <category><![CDATA[Semiconductors]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                    <category><![CDATA[Manufacturing]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png">
                                                            <media:credit><![CDATA[null]]></media:credit>
                                                                                                                                                                                                                                                                                                                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ HBM development roadmap revealed: HBM8 with a 16,384-bit interface and embedded NAND in 2038 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/hbm-development-roadmap-revealed-hbm8-with-a-16-384-bit-interface-and-embedded-nand-in-2038</link>
                                                                            <description>
                            <![CDATA[ KAIST has a roadmap projecting the evolution of high-bandwidth memory from HBM4 to HBM8 through 2038, detailing major gains in bandwidth, capacity, I/O width, power, and even system architecture. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">RFQU7d5rgxRyjpwqiQoBcJ</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Mon, 16 Jun 2025 11:02:14 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png">
                                                            <media:credit><![CDATA[null]]></media:credit>
                                                                                                                                                                                                                                                                                                                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron starts to ship samples of HBM4 memory to clients — 36 GB capacity and bandwidth of 2 TB/s ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-starts-to-ship-samples-of-hbm4-memory-to-clients-36-gb-capacity-and-bandwidth-of-2-tb-s</link>
                                                                            <description>
                            <![CDATA[ Micron has become the first DRAM vendor to begin sampling 36GB HBM4 memory with a 2048-bit interface and 2TB/s bandwidth. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">En9pNTKPXvE6rs9NRFkHs6</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/vD8rzmDbiAqw5idpPhDpZ5-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Thu, 12 Jun 2025 14:59:35 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/vD8rzmDbiAqw5idpPhDpZ5-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron&#039;s HBM4]]></media:description>                                                            <media:text><![CDATA[Micron&#039;s HBM4]]></media:text>
                                <media:title type="plain"><![CDATA[Micron&#039;s HBM4]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/vD8rzmDbiAqw5idpPhDpZ5-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Samsung to adopt hybrid bonding for HBM4 memory ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/samsung-to-adopt-hybrid-bonding-for-hbm4-memory</link>
                                                                            <description>
                            <![CDATA[ Samsung plans to adopt hybrid bonding for HBM4 to improve thermal and interface performance, potentially gaining a competitive edge over SK hynix, which may delay its use due to costs concerns. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">ufdmLKwmMGuAYRAsjBHfzN</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Tue, 13 May 2025 18:58:33 +0000</pubDate>                                                                                                                                <updated>Tue, 09 Sep 2025 18:27:54 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png">
                                                            <media:credit><![CDATA[null]]></media:credit>
                                                                                                                                                                                                                                                                                                                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ JEDEC finalizes HBM4 memory standard with major bandwidth and efficiency upgrades ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/ram/jedec-finalizes-hbm4-memory-standard-with-major-bandwidth-and-efficiency-upgrades</link>
                                                                            <description>
                            <![CDATA[ HBM4 offers faster data rates, more channels, and higher memory capacities, with features like Directed Refresh and flexible voltage options to boost performance and reliability. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">zfZnpF7hrnTSutoAB2tft7</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 17 Apr 2025 11:23:27 +0000</pubDate>                                                                                                                                <updated>Thu, 17 Apr 2025 14:18:36 +0000</updated>
                                                                                                                                            <category><![CDATA[RAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                                    <dc:creator><![CDATA[ Kunal Khullar ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png">
                                                            <media:credit><![CDATA[null]]></media:credit>
                                                                                                                                                                                                                                                                                                                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron unveils DDR5-9200 memory: 1γ process technology with EUV ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-unveils-ddr5-9200-memory-1g-process-technology-with-euv</link>
                                                                            <description>
                            <![CDATA[ Micron's 1γ fabrication technology with EUV, new HKMG, and BEOL promises to increase performance while cutting power consumption for DRAM. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">nGswJ7MhxqK9CrXMXmrLzD</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/vnqdtRupVqWHAik43ZWctH-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Tue, 25 Feb 2025 18:57:21 +0000</pubDate>                                                                                                                                <updated>Fri, 14 Mar 2025 14:14:56 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/vnqdtRupVqWHAik43ZWctH-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron]]></media:description>                                                            <media:text><![CDATA[Micron]]></media:text>
                                <media:title type="plain"><![CDATA[Micron]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/vnqdtRupVqWHAik43ZWctH-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SanDisk's new High Bandwidth Flash memory enables 4TB of VRAM on GPUs, matches HBM bandwidth at higher capacity ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sandisks-new-hbf-memory-enables-up-to-4tb-of-vram-on-gpus-matches-hbm-bandwidth-at-higher-capacity</link>
                                                                            <description>
                            <![CDATA[ SanDisk talks high bandwidth flash memory that promises to wed HBM bandwidth with 3D NAND capacity. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">yi3qxRWkzYV7r8i72antcb</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/32ax3i7i4sgLXwvXnC8uNg-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Thu, 13 Feb 2025 12:16:56 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 13:01:54 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/32ax3i7i4sgLXwvXnC8uNg-1280-80.jpg">
                                                            <media:credit><![CDATA[SanDisk]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SanDisk&#039;s HBF memory concept]]></media:description>                                                            <media:text><![CDATA[SanDisk&#039;s HBF memory concept]]></media:text>
                                <media:title type="plain"><![CDATA[SanDisk&#039;s HBF memory concept]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/32ax3i7i4sgLXwvXnC8uNg-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix posts record revenues and profits as AI industry drives surge in HBM3 and HBM3E demand ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-posts-record-revenues-and-profits-as-ai-industry-drives-surge-in-hbm3-and-hbm3e-demand</link>
                                                                            <description>
                            <![CDATA[ Sales of AI memory solutions, including HBM3 and eSSDs, drove SK hynix's revenues and profits to record levels. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">NcTfjFtFPyWWCx9uzm9nR8</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/35oc94EpnniQ3v4gXpJVUm-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 23 Jan 2025 13:45:00 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/35oc94EpnniQ3v4gXpJVUm-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix]]></media:description>                                                            <media:text><![CDATA[SK Hynix]]></media:text>
                                <media:title type="plain"><![CDATA[SK Hynix]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/35oc94EpnniQ3v4gXpJVUm-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron invests $7 billion in HBM assembly facility amid AI boom ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/micron-invests-usd7-billion-in-hbm-assembly-facility-amid-ai-boom</link>
                                                                            <description>
                            <![CDATA[ Micron to expand HBM3E and HBM4 output when its HBM assembly facility in Singapore start operations in 2026. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">BLfWxvQwWJqEZv2TBDKse3</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Wed, 08 Jan 2025 17:38:14 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron&#039;s HBM3E memory stack]]></media:description>                                                            <media:text><![CDATA[Micron&#039;s HBM3E memory stack]]></media:text>
                                <media:title type="plain"><![CDATA[Micron&#039;s HBM3E memory stack]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ TSMC 'Super Carrier' CoWoS interposer gets bigger, enabling massive AI chips to reach 9-reticle sizes with 12 HBM4 stacks ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/tsmc-super-carrier-cowos-interposer-gets-bigger-enabling-massive-ai-chips-to-reach-9-reticle-sizes-with-12-hbm4-stacks</link>
                                                                            <description>
                            <![CDATA[ TSMC's CoWoS gets even bigger with 9-reticle size packages due in 2027. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">AR45Ma9LzevjrkXA8HUULV</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/5v5TynY3T6qoQvHBybftxE-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Wed, 27 Nov 2024 12:07:34 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:45:21 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/5v5TynY3T6qoQvHBybftxE-1280-80.jpg">
                                                            <media:credit><![CDATA[TSMC]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[TSMC CoWoS]]></media:description>                                                            <media:text><![CDATA[TSMC CoWoS]]></media:text>
                                <media:title type="plain"><![CDATA[TSMC CoWoS]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/5v5TynY3T6qoQvHBybftxE-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Nvidia asked SK hynix to accelerate HBM4 chip delivery by six months, says report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/gpus/nvidia-asked-sk-hynix-to-accelerate-hbm4-chip-delivery-by-six-months-says-report</link>
                                                                            <description>
                            <![CDATA[ SK hynix to deliver HBM4 memory to Nvidia about half of a year ahead of planned schedule. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">NkAeQrP3WT6puXkbUmgHH</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Tue, 05 Nov 2024 12:00:00 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 10:06:51 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png">
                                                            <media:credit><![CDATA[null]]></media:credit>
                                                                                                                                                                                                                                                                                                                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/GJFEiCgnw2XZPCD76to9yT-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Samsung and SK hynix double down on HBM4 and CXL technologies to counter Chinese competition ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/samsung-and-sk-hynix-double-down-on-hbm4-and-cxl-technologies-to-counter-chinese-competition</link>
                                                                            <description>
                            <![CDATA[ Samsung showcased its advances in CXL technology at the recent Open Compute Project Global Summit, while SK hynix plans to start mass production of HBM4 in the second half of 2025. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">yphYWrkL5nm55AjzG9ZJ4m</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CAXVbb6vUWoUuw6WZRbVYU-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Mon, 21 Oct 2024 15:55:42 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:55:47 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ editors@tomshardware.com (Kunal Khullar) ]]></author>                    <dc:creator><![CDATA[ Kunal Khullar ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/CAXVbb6vUWoUuw6WZRbVYU-1280-80.jpg">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[A CXL-based memory expander by SK Hynix.]]></media:description>                                                            <media:text><![CDATA[A CXL-based memory expander by SK Hynix.]]></media:text>
                                <media:title type="plain"><![CDATA[A CXL-based memory expander by SK Hynix.]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CAXVbb6vUWoUuw6WZRbVYU-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Rambus announces HBM4 memory controller for AI GPUs — controller enables up to of 2.56 TB/s per HBM4 memory stack across a 2048-bit memory bus ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/rambus-announces-hbm4-memory-controller-for-ai-gpus-controller-enables-up-to-of-256-tbs-per-hbm4-memory-stack-across-a-2048-bit-memory-bus</link>
                                                                            <description>
                            <![CDATA[ Rambus's HBM4 controller has a lot of performance headroom, but will it ever be used? ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">aCjGLqsdnbjkv3EJgSJ9kA</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Tue, 10 Sep 2024 15:18:27 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 13:02:05 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Samsung to tape out first HBM4 devices later this year, sampling begins in 2025: Report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/samsung-to-tape-out-first-hbm4-devices-later-this-year-sampling-begins-in-2025-report</link>
                                                                            <description>
                            <![CDATA[ Samsung's HBM4 details leak: 10nm for DRAMs and 4nm for base dies. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">cpSEtmN3CVoQVuPGPHy8xc</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 22 Aug 2024 19:39:32 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix could get nearly $1 billion to support $3.87 billion advanced packaging facility in the U.S. ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-could-get-nearly-dollar1-billion-to-support-dollar387-billion-advanced-packaging-facility-in-the-us</link>
                                                                            <description>
                            <![CDATA[ SK hynix to get massive support from U.S. government to assemble HBM4 in the U.S. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">6Qyj8M8YE9w4khgBLDzYYP</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Wed, 07 Aug 2024 13:15:39 +0000</pubDate>                                                                                                                                                                                                                                <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix]]></media:description>                                                            <media:text><![CDATA[SK Hynix]]></media:text>
                                <media:title type="plain"><![CDATA[SK Hynix]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Preliminary HBM4 specs point to major performance uplift for GPUs — transfer speeds up to 6.4 GT/s across a 2048-bit interface ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/preliminary-hbm4-specs-point-to-major-performance-uplift-for-gpus</link>
                                                                            <description>
                            <![CDATA[ JEDEC publishes initial specifications for HBM4: up to 1.64 TB/s per stack, loads of configurations. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">RsHGZRpoU4868H4GuyqRRM</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Fri, 12 Jul 2024 17:39:23 +0000</pubDate>                                                                                                                                <updated>Fri, 12 Jul 2024 19:06:35 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Revolutionary Samsung tech that enables stacking HBM memory on CPU or GPU arrives this year — SAINT-D HBM scheduled for 2024 rollout, says report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/revolutionary-samsung-tech-that-enables-stacking-hbm-on-cpu-or-gpu-arrives-this-year-saint-d-hbm-scheduled-for-2024-rollout-says-report</link>
                                                                            <description>
                            <![CDATA[ Samsung paves the way for HBM4 integration with its SAINT-D interconnection and packaging technology. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">EVHctauRaCfDLioqojH7SD</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/jjNZ3ye3aTL4odrMndAc4d-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Mon, 17 Jun 2024 15:45:00 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 09:47:21 +0000</updated>
                                                                                                                                            <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/jjNZ3ye3aTL4odrMndAc4d-1280-80.png">
                                                            <media:credit><![CDATA[Samsung]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Samsung SAINT info]]></media:description>                                                            <media:text><![CDATA[Samsung SAINT info]]></media:text>
                                <media:title type="plain"><![CDATA[Samsung SAINT info]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/jjNZ3ye3aTL4odrMndAc4d-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ TSMC to build base dies for HBM4 memory on its 12nm and 5nm nodes ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/gpus/tsmc-to-build-base-dies-for-hbm4-memory-on-its-12nm-and-5nm-nodes</link>
                                                                            <description>
                            <![CDATA[ TSMC to use 12FFC+ and N5 process technologies to build base dies for HBM4. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">2aRx3s24ZXnNEBZcNyHAPg</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 16 May 2024 12:59:10 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:40:07 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix confirms it will bring next-gen HBM manufacturing to the US — $3.87 billion memory fab to be built in Indiana ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-confirms-it-will-bring-next-gen-hbm-manufacturing-to-the-us-dollar387-billion-memory-fab-to-be-built-in-indiana</link>
                                                                            <description>
                            <![CDATA[ SK hynix selects Indiana for its first HBM packaging fab in the USA. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">VXjVMPDVeLMLkujxhJuTMZ</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 04 Apr 2024 16:01:30 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:52:39 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK hynix]]></media:description>                                                            <media:text><![CDATA[SK hynix]]></media:text>
                                <media:title type="plain"><![CDATA[SK hynix]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK hynix reportedly planning for a $4 billion chip packaging facility in Indiana — for HBM and other exotic memory types ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/sk-hynix-reportedly-planning-for-a-dollar4-billion-chip-packaging-facility-in-indiana-for-hbm-and-other-exotic-memory-types</link>
                                                                            <description>
                            <![CDATA[ SK hynix plans to build a $4 billion chip packaging facility in Indiana, which could begin operations in 2029, according to a WSJ report. If the plant gets the green light, likely with tax incentives, it would focus on advanced packaging like that used for HBM3e and future HBM solutions. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">sc9ab5tgmgMH6rBzz2tNvV</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Tue, 26 Mar 2024 20:49:36 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:43:05 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK hynix]]></media:description>                                                            <media:text><![CDATA[SK hynix]]></media:text>
                                <media:title type="plain"><![CDATA[SK hynix]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/NFsR7zzEc8asPnVCkk2HuY-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Chinese foundry XMC aims to produce HBM memory ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/tech-industry/manufacturing/chinese-foundry-xmc-aims-to-produce-hbm-memory</link>
                                                                            <description>
                            <![CDATA[ Yangtze Memory may jump into the HBM memory business via its XMC foundry unit. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">vvPwNeCNYabAkJbGKgnqDZ</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/bZWaX5JszuErZeRgH4ULjY-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Sat, 16 Mar 2024 13:04:57 +0000</pubDate>                                                                                                                                <updated>Wed, 09 Apr 2025 13:01:59 +0000</updated>
                                                                                                                                            <category><![CDATA[Manufacturing]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/bZWaX5JszuErZeRgH4ULjY-1280-80.jpg">
                                                            <media:credit><![CDATA[XMC]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[XMC]]></media:description>                                                            <media:text><![CDATA[XMC]]></media:text>
                                <media:title type="plain"><![CDATA[XMC]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/bZWaX5JszuErZeRgH4ULjY-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ TSMC and SK Hynix team up for HBM4 co-production: Report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/tsmc-and-sk-hynix-team-up-for-hbm4-co-production-report</link>
                                                                            <description>
                            <![CDATA[ TSMC and SK Hynix reportedly join forces to build products for AI, including HBM4 memory. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">Dk9irc9nMkyRoFiQonHa96</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Fri, 09 Feb 2024 16:22:07 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:58:15 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK Hynix says new high bandwidth memory for GPUs on track for 2024 - HBM4 with 2048-bit interface and 1.5TB/s per stack is on the way ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/gpus/sk-hynix-says-new-high-bandwidth-memory-for-gpus-on-track-for-2024-hbm4-with-2048-bit-interface-and-15tbs-per-stack-is-on-the-way</link>
                                                                            <description>
                            <![CDATA[ HBM4 memory with a 2048-bit interface on track for production in 2026. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">zFyeSi9i6EJbTZNwpr6Wek</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Fri, 02 Feb 2024 16:31:42 +0000</pubDate>                                                                                                                                <updated>Fri, 02 Feb 2024 23:35:00 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ China's CXMT reportedly aims to make HBM memory for AI chips — exotic memory is a missing piece for China's chipmaking self-sufficiency ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/dram/chinas-cxmt-reportedly-aims-to-make-hbm-memory-for-ai-and-hpc-processors</link>
                                                                            <description>
                            <![CDATA[ CXMT to compete against Micron, Samsung, and SK Hynix for lucrative HBM memory market, says report. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">i6eP8pGLA2btBDBceB9foc</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Fri, 02 Feb 2024 12:23:21 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 09:51:03 +0000</updated>
                                                                                                                                            <category><![CDATA[DRAM]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ HBM4 memory to double speeds in 2026 — 2048-bit interface to revolutionize artificial intelligence and HPC markets: Report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/gpus/hbm4-memory-to-double-speeds-in-2026-2048-bit-interface-to-revolutionize-artificial-intelligence-and-hpc-markets-report</link>
                                                                            <description>
                            <![CDATA[ HBM4 to revolutionize memory market, says TrendForce. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">TBmffpKxExNrfJitSfHQ85</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Mon, 27 Nov 2023 17:50:27 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:44:06 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ SK Hynix and Nvidia reportedly working on a radical GPU redesign that 3D-stacks HBM memory directly on top of the processing cores ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/news/sk-hynix-plans-to-stack-hbm4-directly-on-logic-processors</link>
                                                                            <description>
                            <![CDATA[ SK Hynix hires logic production specialists to integrate HBM4 memory directly on logic. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">RBw5HvpuRjtRpQHCrGYdTB</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/35oc94EpnniQ3v4gXpJVUm-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Sun, 19 Nov 2023 20:26:32 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:41:59 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/35oc94EpnniQ3v4gXpJVUm-1280-80.png">
                                                            <media:credit><![CDATA[SK Hynix]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[SK Hynix]]></media:description>                                                            <media:text><![CDATA[SK Hynix]]></media:text>
                                <media:title type="plain"><![CDATA[SK Hynix]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/35oc94EpnniQ3v4gXpJVUm-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron Plans HBM4E in 2028, 256GB DDR5-12800 RAM Sticks in 2026 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/pc-components/ddr5/micron-plans-hbm4e-in-2028-256gb-ddr5-12800-ram-sticks-in-2026</link>
                                                                            <description>
                            <![CDATA[ Micron unveils 128GB RDIMM, shares conceptual roadmap till 2028. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">YgsydNAFbNHaTwxzXE2Y5X</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/jWsjmdRzZv4LxGz4HTh5XE-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Fri, 10 Nov 2023 11:39:57 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 12:55:30 +0000</updated>
                                                                                                                                            <category><![CDATA[DDR5]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                    <category><![CDATA[DRAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/jWsjmdRzZv4LxGz4HTh5XE-1280-80.png">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron]]></media:description>                                                            <media:text><![CDATA[Micron]]></media:text>
                                <media:title type="plain"><![CDATA[Micron]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/jWsjmdRzZv4LxGz4HTh5XE-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Samsung Expects HBM4 Memory to Arrive by 2025 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/news/samsung-expects-hbm4-memory-to-arrive-by-2025</link>
                                                                            <description>
                            <![CDATA[ Samsung starts talking about HBM4, next-generation memory for AI and HPC GPUs. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">jTvChdSVEzrv2Qoxj2BbF</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 12 Oct 2023 20:27:25 +0000</pubDate>                                                                                                                                <updated>Thu, 12 Oct 2023 20:35:30 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Japanese Government Ups Micron EUV Fab Subsidies to $1.29 Billion ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/news/japanese-government-ups-micron-euv-fab-subsidies-to-dollar129-billion</link>
                                                                            <description>
                            <![CDATA[ Japanese government increases subsidies for Micron's DRAM fab in Japan. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">6eNRkWvPcXNfatM4YBNWLS</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/ASvCa5F5sGr2mxLmNZp8Nd-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Fri, 29 Sep 2023 16:10:17 +0000</pubDate>                                                                                                                                <updated>Thu, 21 Aug 2025 08:42:24 +0000</updated>
                                                                                                                                            <category><![CDATA[Manufacturing]]></category>
                                                    <category><![CDATA[Tech Industry]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ASvCa5F5sGr2mxLmNZp8Nd-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron]]></media:description>                                                            <media:text><![CDATA[Micron]]></media:text>
                                <media:title type="plain"><![CDATA[Micron]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/ASvCa5F5sGr2mxLmNZp8Nd-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ HBM4 2048-Bit Memory Could Dramatically Increase Bandwidth: Report ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/news/hbm4-2048-bit-memory-interface-could-dramatically-increase-bandwidth-report</link>
                                                                            <description>
                            <![CDATA[ HBM4 expected to dramatically increase supported bandwidth by doubling interface width. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">Lt6QA8VJkd5ettvnvUQD43</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Wed, 13 Sep 2023 11:17:51 +0000</pubDate>                                                                                                                                <updated>Wed, 13 Sep 2023 11:43:09 +0000</updated>
                                                                                                                                            <category><![CDATA[GPUs]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png">
                                                            <media:credit><![CDATA[AMD]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[AMD]]></media:description>                                                            <media:text><![CDATA[AMD]]></media:text>
                                <media:title type="plain"><![CDATA[AMD]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/CxSPjnggWbijozZTnGSvgh-1280-80.png" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron Secures $320 Million in Japanese Subsidies, Might Bring EUV to Japan ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/news/micron-to-get-320-million-from-japanese-govt</link>
                                                                            <description>
                            <![CDATA[ Japanese government will help Micron to keep Hiroshima DRAM fab up to date. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">zDi9iKGN7E2oKuBJeHQUiT</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/ASvCa5F5sGr2mxLmNZp8Nd-1280-80.jpg" type="image/jpeg" length="0"></enclosure>
                                                                        <pubDate>Fri, 30 Sep 2022 19:47:38 +0000</pubDate>                                                                                                                                <updated>Wed, 05 Feb 2025 14:06:16 +0000</updated>
                                                                                                                                            <category><![CDATA[DDR5]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                    <category><![CDATA[DRAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/jpeg" url="https://cdn.mos.cms.futurecdn.net/ASvCa5F5sGr2mxLmNZp8Nd-1280-80.jpg">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron]]></media:description>                                                            <media:text><![CDATA[Micron]]></media:text>
                                <media:title type="plain"><![CDATA[Micron]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/ASvCa5F5sGr2mxLmNZp8Nd-1280-80.jpg" />
                                                                                        </item>
                                <item>
                                                            <title><![CDATA[ Micron's $15 Billion Memory Fab in Idaho to Come Online by 2030 ]]></title>
                                                                                                                                                                                                <link>https://www.tomshardware.com/news/micron-15-billion-memory-fab-in-idaho-coming-online-in-2030</link>
                                                                            <description>
                            <![CDATA[ Micron announces new leading-edge memory fab in Idaho, coming online by 2030. ]]>
                                                                                                            </description>
                                                                                                                                <guid isPermaLink="false">kAsa2YnGcMZKRy5EzupmBb</guid>
                                                                                                <enclosure url="https://cdn.mos.cms.futurecdn.net/KQsurpzdhz2hce3AcmttjS-1280-80.png" type="image/png" length="0"></enclosure>
                                                                        <pubDate>Thu, 01 Sep 2022 19:06:42 +0000</pubDate>                                                                                                                                <updated>Thu, 30 Jan 2025 16:45:44 +0000</updated>
                                                                                                                                            <category><![CDATA[DDR5]]></category>
                                                    <category><![CDATA[PC Components]]></category>
                                                    <category><![CDATA[RAM]]></category>
                                                    <category><![CDATA[DRAM]]></category>
                                                                                                <author><![CDATA[ ashilov@gmail.com (Anton Shilov) ]]></author>                    <dc:creator><![CDATA[ Anton Shilov ]]></dc:creator>                                                                                                    <media:content type="image/png" url="https://cdn.mos.cms.futurecdn.net/KQsurpzdhz2hce3AcmttjS-1280-80.png">
                                                            <media:credit><![CDATA[Micron]]></media:credit>
                                                                                                                                                                                                                                    <media:description><![CDATA[Micron]]></media:description>                                                            <media:text><![CDATA[Micron]]></media:text>
                                <media:title type="plain"><![CDATA[Micron]]></media:title>
                                                    </media:content>
                                                    <media:thumbnail url="https://cdn.mos.cms.futurecdn.net/KQsurpzdhz2hce3AcmttjS-1280-80.png" />
                                                                                        </item>
            </channel>
</rss>