Electricity supply in the U.S. is a limiting factor preventing AI data centers from coming online as quickly as possible. Because of this, many projects are turning to portable natural gas turbine generators to get the electricity they need and bypass long wait times to connect to the grid. This has driven demand for turbines, so Elon Musk said on X that SpaceX will bring turbine blade and vane casting in-house.

Musk was one of the first to deploy “portable” power generators to power a data center, allowing him to bring the Colossus data center in Memphis, Tennessee, online in record time. Note that these mobile generators aren’t small devices — they’re massive units about the size of one trailer and may also include another trailer or two of other necessary parts and accessories to run it (not including the tank needed for its fuel). OpenAI followed suit a few months later, announcing it will deploy turbines at the first Stargate data center to deliver additional power.

This sudden influx of demand has led to jet engine shortages for data center operators. Beyond the fact that engine manufacturers weren’t prepared for the AI boom, commercial aviation has already been suffering from its own shortages due to supply chain and engine design issues even before data center developers started buying up turbines.

Turbine blade and vane manufacturing is one of the biggest bottlenecks in jet engine production right now. The blades used in these engines are difficult to build, with one batch often requiring 60 to 90 weeks to produce from start to finish. That’s because these are specialized parts that are subjected to extreme forces and temperatures, especially in the core of the engine. Even if the engines that these blades will end up on are bolted to the ground or strapped to a trailer instead of hanging under the wing of an airliner, manufacturing them still requires the same level of care and precision.

Because of this, it seems that Musk wants to take things into his own hands by making SpaceX manufacture its own turbine blades. He says this move could cut deliveries by 18 months, allowing xAI to get brand-new turbine generators much faster instead of waiting behind a long queue expected to stretch into 2030.

SpaceX and Tesla aren’t abandoning solar power, but Musk says that “natural gas will still be needed to supplement and bootstrap solar for several years.” Because of this, it seems that he’s willing to invest in parts of turbine manufacturing as demand for turbine generators for data centers increases in the coming years. He has even reportedly quietly bought a portable gas and diesel turbine fleet for around a billion dollars, possibly to take advantage of this boom.

It’s unclear how Elon Musk intends to make turbine blades and vanes, especially given how complicated the process is. Nevertheless, he’s no stranger to tackling “impossible” problems, especially given his track record with Tesla and SpaceX.

Around 2015, a trio of Pakistani friends took it upon themselves to digitize a large number of out-of-print books in Urdu, many of them lithographs — they call it the Ibteda Digital Library. They did it for the love of the language, with no budget or support, but after 576,000 shutter counts on a D5300 camera, 326,000 on a D3300, and 526,000 dual-page photos, they have now had to call it quits after a decade. However, eventually one of the trio came up with a finely-tuned machine-learning process that may eventually be of help to similar projects worldwide. The project certainly stands in contrast to the current practice of large AI companies scanning rare books and destroying them to train AI chatbots.

The team didn't have any formal budget worth and bought all of the books out of their own pockets. They kicked off the efforts with a single Nikon D5300 camera, some LED bulbs, and a glass sheet taken from a photocopier to squeeze the books against. The process was manual in more ways than one: besides turning the pages by hand, the members spent copious amounts of time in Photoshop post-processing the results.

Getting an archival-quality digital copy of a page isn't as simple as taking a photograph with the best camera you can find. It requires maintaining consistent margins, text size, orientation, and using the same perspective correction across an entire book, among many other fine details. Rarely can the same procedure be used across more than a few publications — even given two otherwise identical books, book A may be much thicker than book B, meaning the spacing between the pages, and possibly the perspective, will be different.

Adding to the challenge, the bulk of the works were in Urdu script, likely Nastaliq. Urdu is the national language of Pakistan and also spoken across part of India, and in many worldwide communities. Its written form was originally an elegant flowing script, but people switched to using Roman characters with the advent of phones and the internet.

The script format means that layouts are almost always unique, and the corpus includes everything from printed books to centuries-old lithographs to handwritten notes. Plus, Urdu script uses a lot of dots, diacritics, and small symbols, meaning photography noise, dirt, and blemishes had to be visually distinguishable from actual writing. In other words, each book was its own corner case, and old lithographs in particular had copious amounts of margin notes.

All told, this meant that while photographing the books was tedious but reasonably fast, the post-processing was definitely not. After 576,000 shutter counts on the D5300 and 326,000 on the D3300 camera, there were over 526,000 dual-page photos left to handle after the team had to give up on the project in April 2026. Manually processing those was out of the question, so one of the researchers turned their eye to automation using OpenCV.

The first few attempts with standard computer-vision methods didn't work out, as a rule set that worked for a set of books completely failed for the next one. The author then understood they could use their own manually processed images to establish a source/target correspondence: in their own words, "finished pages became labels," giving birth to the idea of calculating the homography fit from the Photoshop files and using it for training a neural network.

The first challenge was matching the crop borders, easier said than done because "dense Urdu print repeats strokes, words, borders, and column patterns," meaning that marks from neighboring pages could throw off the measurements. Next up, visible area identification and gutter separation were made tricky by tables and deep gutter shadows. Cropping errors required a specific pass, as did blemish removal.

Interestingly enough, the researcher noticed that using a bigger model or more training samples actually reduced the accuracy of the results. The choice of crop margin (inset) for each book was unique, made to the editor's judgement. But since it had no discernible pattern, adding more books made the model's pattern recognition worse, not better.

The final process still needs ten calibration crops for a new book, but that's a pretty reasonable amount of manual labor to be able to process a book entirely. Finally, the books are hosted in a ZFS pool with BLAKE3 manifests.

The entire tale and all the technical details are explained in a lengthy blog post, and you can peruse the beautiful Urdu writings at the Ibteda Digital Library page at the Internet Archive. My Western eyes can't read any of it, but the poem translations are beautiful.

The U.S. military shot down three drones that were suspected of operating for Mexican cartels earlier this week. According to CBS News, the uncrewed aerial vehicles (UAVs) were destroyed by an “Army Multipurpose High Energy Laser System” operated by U.S. Northern Command (USNORTHCOM) between Tuesday evening and Wednesday morning.

"Cartel networks are increasingly employing unmanned aircraft systems to facilitate illicit human-smuggling and actively spy on our personnel and law enforcement partners," Maj. Gen. Curtis Taylor, commander of the southern border's Joint Task Force, said in a statement. "By integrating layered countermeasures alongside advanced directed-energy capabilities like this laser system, we have made it clear that we will not tolerate hostile surveillance." It’s unclear if the drones were shot down over American or Mexican airspace, but a military spokesperson told the outlet that they “were taken in coordination with all partners operating along the border.”

This isn’t the first time that a laser weapon has been used to defend American airspace. Back in February, the Pentagon used a similar system after it detected and shot down unknown aerial targets. This resulted in the emergency closure of a major airport, resulting in massive disruptions, and it also turned out that the targets were later reported to be just party balloons. Another incident involving the use of laser weapons happened a couple of weeks later, and it resulted in the shooting down of an actual drone this time. Unfortunately, the targeted drone turned out to be from the Customs and Border Protection unit, not a hostile one operated by the Mexican cartels. The military refused to release further details about the recent drone shoot-downs, citing operational security and ongoing operations, but they’ve hopefully hit the correct targets this time.

The U.S. isn’t alone in deploying drones for protecting its assets and territories. The UK has recently revealed that it’s deploying its DragonFire laser weapon on Royal Navy destroyers by 2027, while China has developed a backpack-sized man-portable anti-drone laser system that can hit targets up to 1,600 feet away. While these systems are expensive to acquire, they’re much cheaper to operate compared to traditional man-portable air defense systems or MANPADS, with each shot costing as little as $13 (versus the thousands to millions of dollars for missiles). This makes them more economically feasible for defending against drones, whose effective use in the battlefield has been made prominent by Ukrainians as they defended against the much larger Russian military. But even if you’re a civilian, you can get your own laser air defense system for around $1,000 and protect your home from flying bugs.

San Francisco defense startup Mara has secured $7 million in a pre-seed round to produce what it calls Spike, a portable counter-drone system housed inside a backpack. The complete system costs $30,000 to $100,000, depending on the number of Seekers included, but its 250g (~8.8 ounces) autonomous interceptors are designed to cost no more than the few-hundred-dollar FPV quadcopters they destroy. Those quadcopters, which carry munitions capable of destroying armored vehicles worth millions, are now reported to be the leading cause of Ukrainian combat casualties.

A single Spike launcher holds up to 48 of the Seeker interceptors and reloads in less than a minute, with each Seeker capable of engaging targets out to roughly one mile, per Mara's published specs. In an exclusive interview, CEO Daniel Kofman told the outlet Tectonic Defense how FPV crews operate on the frontline. "They launch from anywhere at anything, and they never attack one at a time. They always attack four to six at a time in waves, doing pincer strikes in rapid succession or simultaneously."

The system's Spotter targeting unit fuses electro-optical and acoustic sensors with an optional low-emission W-band radar, and Mara says it detects and tracks fiber-optic and fully autonomous drones in all weather, day or night. Radio-frequency jammers and RF-based detectors can't touch either drone type, since neither emits a control signal to find or break.

Kofman says that the Seekers are built to trade at a "one-to-one" or a "worst case, two-to-one" cost ratio against the drones they intercept, with Mara claiming that the interceptor costs 20 times less than the next-cheapest alternative. Fully autonomous, Mara claims the Seekers respond much faster than a human can react to a 100 mph quadcopter, though a human stays in the loop at all times to set rules of engagement and abort launches.

Mara’s system is substantially cheaper than systems like Lockheed Martin's reusable Morfius X-Rotor, which downs swarms with high-power microwaves, but close to the $1,000 3D-printed interceptors Ukraine builds against Shahed-type drones, though those target larger, slower threats than FPV quadcopters.

Mara joined NATO's DIANA accelerator 2026 cohort and holds cooperative research agreements with three unnamed U.S. defense organizations. The company is also running a civilian pilot at a South Korean commercial port. Ukrainian forces have operated Spotter near the front line, where the company says it tracked multiple FPV drones from 40km (~25 miles) back, and Mara has its first paid order from a European NATO partner for an undisclosed exercise.

Ground-mounted Spike units are due to be in customers' hands by the end of 2026, with vehicle-mounted and man-portable variants and scaled production planned for 2027.

The DataOne data center in Vineland, New Jersey, has faced a slew of complaints from the community since construction began in 2025. According to Stand.earth, the project has reportedly been operating several unpermitted gas turbines on site, spewing air pollution in the area near two local schools. Aside from that, the site has also faced allegations of constructing an unpermitted 1.5-million-gallon liquefied natural gas storage tank and of unacceptable noise levels at night, which affected residents within a half-mile radius of the data center.

Matt Williams, chairperson of the Sustain South Jersey group, told Tom’s Hardware that construction had already begun even before Nebius signed a multi-year agreement to “deliver dedicated capacity to Microsoft from its new data center in Vineland, New Jersey,” in October 2025. However, the residents only became aware that the project was a data center after the $19.4 billion deal to secure around 100,000 Nvidia GB300 GPUs for the tech giant was made public.

Vineland residents began seeing references to the data center in various government documents, prompting several questions to the city government. Because of this, the city called a town hall meeting last January 2026 — several months after construction on the data center had already begun, with DataOne CEO Charles-Antoine Beyney admitting that the meeting should have been initiated several months before.

A few weeks before the town hall, some people living within a half-mile radius of the site started complaining about noise from the development. While they couldn’t confirm the source of the noise, it was often described as a low hum, similar to that of a generator. A later investigation revealed that the site had 62 gas turbines deployed in the area, with at least 45 running at any given time. This is similar to what SpaceXAI has done in Memphis, Tennessee, where it deployed 69 unpermitted natural gas turbines to power its data centers. While the company has since promised to remove these polluting generators, it will do so only over a span of one year, as they’re being slowly replaced by a 1.2-GW on-site power plant.

There have also been concerns that the site’s stormwater management system does not comply with the state’s regulations. A third-party engineering review stated that if these issues are not fixed, they could result in on-site and off-site flooding, especially given the site’s massive 55-acre size. The experts also noted that the data center has “underestimated the annual groundwater recharge by at least 20 million gallons per year,” which could result in lower aquifer levels and reduce the amount of water available or the water quality for the people living in the area.

“The incident should shatter the illusion that Microsoft is a ‘good neighbor’ or in any way more responsible than the other Big Tech companies,” Stand.earth Senior Campaigner Nathan Taft said in the statement. “This investigation has revealed that far from ‘doing this work differently than other’ as it promised, Microsoft is drawing directly from Elon Musk’s xAI playbook of doing the damage first and asking for permission later.”

In an interview with Tom’s Hardware, Nathan said that even though Microsoft does not directly own or operate the Vineland data center, it stands to reason that the tech giant should do something about all these complaints, as it’s the one that has contracted Nebius for the computing power, which resulted in DataOne’s construction project. He compared this to a contractor making a mess on their client’s neighbor’s property. Even though a third-party provider — DataOne — was at fault for the issue, the fact that the people have already been complaining should give Nebius pause and compel Microsoft to do something.

DataOne’s actions in New Jersey directly contradict the promise Microsoft made back in January 2026, and residents are asking the tech giant to stand by its word. Although the concerns about air and noise pollution are technically not mentioned in the company’s “community-friendly” commitments, these issues still impact the quality of life of the people living around the DataOne data center. Aside from that, the unpermitted construction shows it does not adhere to the rules of Vineland. “The developers have been ‘act first, pay the fine, and ask for forgiveness later,’” says Mr. Williams.

The U.S. Navy successfully tested a sail-powered drone in live-fire exercises in the Pacific: the Saildrone Surveyor SD-3001 Unmanned Surface Vessel (USV), which was co-developed with Lockheed Martin to carry lethal combat technology. During the recent Rim of the Pacific (RIMPAC) 2026 exercises, the Saildrone launched two combat-proven Joint-Air-to-Ground Missiles (JAGM) in coordination with the USS Theodore Roosevelt (CVN-71) Carrier Strike Group. The Saildrone’s use in passive electronic warfare (EW) tasks was also verified during the exercises.

At RIMPAC, the USS Theodore Roosevelt (CVN-71) Carrier Strike Group had access to the Saildrone as a combat asset for the first time. Under the control of ARES, the sea drone successfully launched two lethal JAGM missiles. These missiles feature two independent guidance modes: a semi-active laser and millimeter-wave radar. Combining both, the JAGM can be effective in all weather, including low-visibility maritime environments.

The development of the Saildrone Surveyor SD-3001 USV with JAGM has been remarkably rapid. Work began on the collaborative project back in October 2025, with the partners hoping to “combine Saildrone unmanned surface vehicles with Lockheed Martin’s combat-proven effectors.” Both parts of the equation were operationally proven, yet getting everything working as intended within six months, and then taking part in a successful live-fire demo remains quite an achievement. The goal also required the integration of the USV into the Navy fleet environment so it would work with the Navy’s Adjunct Remote Engagement System (ARES). That’s what was demonstrated at RIMPAC this year.

Another useful function of the long-term, long-range autonomous Saildrone demonstrated at RIMPAC was its EW capability. The sail-sporting drone coordinated its sensors with an MH-60S helicopter to successfully detect, classify, and identify a surrogate threat during the exercises.

Lockheed Martin, Saildrone, and the U.S. Navy have more tests and trials planned for this seafaring USV. Saildrone notes that the “SD-3001 is now well on its way to its next mission.” Meanwhile, work alongside Lockheed Martin continues, with this demonstration claimed to have de-risked larger payload integrations planned for the larger Saildrone Spectre. The Spectre is expected to carry “significantly larger containerized capabilities including the Lockheed Martin Mk 70 launcher and SURTASS Towed Array.”

The Trump administration is considering a new AI export control that would close a loophole in current U.S. trade policy toward China, that being the PRC's access to advanced AI compute through remote servers in nearby countries, reports The Information. The rule, should it go into effect, would target remote access through Thailand and Singapore, which aren't subject to the same export controls as China. The Department of Commerce could share the rule with trade groups to gather feedback as early as September, according to the report.

The U.S. government has struggled to reckon with AI export controls since overturning the Biden-era AI Diffusion Rule in early 2025. The AI Diffusion Rule is still in effect, though the Commerce Department has said it won't enforce the rule in the interim. In March, the Commerce Department issued a statement about a tiered licensing structure for advanced AI chip exports. The rule was revoked a little over a week later due to pushback from the U.S. AI industry.

This mismatch of Biden-era rules and Trump-era proposals has created uncertainty about the administration's plans to curb exports to China. Meanwhile, Taiwan has taken action against alleged smugglers of Nvidia's most advanced AI chips to China. In July, one Nvidia employee was detained in Taiwan on suspicion of falsifying documents, and just days ago, the Taiwanese government indicted nine people in relation to Supermicro servers being smuggled to China.

Export controls are mainly governed by 2022-era rules, which restrict Chinese access not just to advanced AI chips, but also advanced semiconductor manufacturing tools, such as EUV lithography machines. Current U.S. House members have called on the Trump administration to enforce the export controls that Joe Biden introduced as the end of his term in early 2025.

According to The Information, one of the driving forces behind the proposed rule is Moonshot's Kimi K3 model. Director of the White House Office of Science and Technology Policy Michael Kratsios posted on X in July, alleging that Moonshot used distilled U.S. models to train Kimi K3 through Nvidia-equipped servers in Thailand.

If the Commerce Department moves forward with the rule, it's sure to face legal challenges. An attorney at the firm Baker McKenzie told The Information that it's "widely acknowledged" that the Commerce Department can't enforce a regulation on remote access. The department instead has, traditionally, regulated the transportation of physical goods.

Still, the Commerce Department could crack down on remote access through other avenues. Namely, through know-your-customer checks. The Biden administration put these checks into effect with the Foundry Due Diligence Rule in early 2025, shortly before Joe Biden left office, but the Trump administration has said it won't enforce the rule.

When you serve a barely regulated emerging market worth trillions of dollars, you have to gear up your presence in politics beyond what usual lobbying or government affairs can do. This is exactly what Nvidia is doing by establishing its employees' federal political action committee (PAC), which will fund politicians whose positions are favorable to Nvidia's interests, reports Bloomberg.

The Nvidia employees PAC — which was registered with the Federal Election Commission on Thursday — will receive voluntary contributions from eligible Nvidia employees, who can provide up to $5,000 per year. The PAC will be permitted to contribute to federal candidates from both parties as well as party committees that express positions which align well with Nvidia's own goals, particularly in the fields of AI regulations, export controls, education, infrastructure spending, and workforce policy, just to name a few.

Nvidia reportedly told employees eligible to participate that decisions Congress makes over the coming years could have substantial consequences for the AI industry and everyday use of the technology. The company also noted that policymakers have increasingly focused on its industry and that decisions made in Washington affect both Nvidia's business and its customers' ability to obtain and deploy its technologies.

Nvidia has already substantially expanded its political operation. The company has spent more than $2.5 million on federal lobbying this year, an increase compared with the same period last year, according to lobbying disclosures seen by Bloomberg. In June, Nvidia hired Bruce Andrews, who previously headed government affairs at Intel and served as deputy secretary at the U.S. Commerce Department in Obama's government, as chief external affairs officer. In addition, Nvidia has hired five external Washington lobbying and government-relations firms to advocate for the company on a range of issues, including AI and trade policy, among others. The company also donated $1 million to the Trump Vance Inaugural Committee in January 2025.

Nvidia needs a PAC because lobbying and campaign contributions serve different purposes. The company can spend corporate money to lobby lawmakers, but it generally cannot use corporate treasury funds to contribute directly to federal candidates. Meanwhile, a company-sponsored PAC has a legal mechanism to collect voluntary contributions from eligible employees and direct that money to candidates and party committees from either party.

Meanwhile, unlike individual campaign contributions, donations made by the PAC will be publicly disclosed and subject to spending limits that do not increase with inflation. Furthermore, corporate PACs face growing resistance from lawmakers, according to Bloomberg. More than 270 House and Senate candidates have pledged to reject corporate PAC contributions this election cycle, the highest number since End Citizens United began promoting the commitment in 2018, Bloomberg claims. However, it is unclear whether these 270 are serious major-party nominees or current members of Congress, or some of the thousands of declared congressional candidates.

Nvidia is hardly alone in increasing spending on its influence in Washington, as most high-tech companies, now joined by AI giants, tend to spend millions on government relations and lobbying. The establishment of the PAC just highlights Nvidia's growing dependence on policies set in Washington.

Security researchers have found three different backdoor-like implants hidden in firmware for routers manufactured by Shenzhen Zhibotong Electronics, better known as ZBT. The hardware is sold around the world under a bewildering array of brands, meaning you may not even realize you're using a ZBT router. The research, published by security firm VulnCheck, began with a Zbtlink AX3000 router. Researchers found that its firmware contained an implant that they dubbed ENDLESSDOORS, as it automatically phones home to a command-and-control server and can execute arbitrary commands as root.

ENDLESSDOORS is essentially a remote-control system embedded directly into the router's firmware. It starts automatically at boot and disguises itself as a normal Linux kernel process called kworker. The router periodically connects to a hard-coded server and announces itself. There's no meaningful authentication or encryption involved. Commands received from the server are passed directly to a shell running as root, and the implant can also establish an interactive root shell.

VulnCheck demonstrated the problem by impersonating the command server and taking control of its own test router. In other words, this isn't merely a theoretical vulnerability; if an attacker can hijack the connection to the implant's command server, they can obtain complete control of the router. The researchers found ENDLESSDOORS embedded in firmware for 20 ZBT models, including the Z8102AX, WG3526, WE826-T3-DSIM, and several other cellular routers. The same hardware is also sold under other names because ZBT manufactures routers for OEM and ODM customers. VulnCheck assigned the issue CVE-2026-66747, with a CVSS score of 9.3, but that wasn't the end of the investigation.

VulnCheck subsequently bought an $88 Deep Orange cellular router from a US seller on Amazon and discovered that it was actually a white-labeled ZBT-WE826-T2. Its 2019 firmware was too old to contain ENDLESSDOORS, but instead, it contained two other implants that the firm designated DARKLANTERN and SPEAKINGSTONE.

DARKLANTERN is the particularly straightforward one. Operating as the infosrvd service, it opens a listener on the WAN via UDP port 9992 and accepts commands directly from the Internet without authentication. An attacker only needs to send a fixed 19-byte info probe to force the router to reveal identifying information like its model, firmware version, MAC address, and uptime.

Researchers found that the backdoor's meager security mechanisms could be trivially bypassed: its command payload checksum relies on a static, hardcoded salt ("mqonu.com"), and its internal MAC address filter can be entirely circumvented simply by submitting a MAC field of all zeroes. This allows any remote attacker to easily forge a packet and execute arbitrary commands as root. VulnCheck scanned the Internet and found 203 exposed DARKLANTERN instances in 22 countries, spread across 16 router models.

Meanwhile, SPEAKINGSTONE works differently and is even more concerning. Rather than waiting for an attacker to connect to a listening port, it runs as the yunmgrd service and periodically beacons outbound to ZBT's command-and-control infrastructure over UDP port 10000. That makes it useful even when the router sits securely behind NAT or a firewall, as it relies on a custom format dubbed "zbtProtocol" to push full device fingerprints directly to the remote server. SPEAKINGSTONE is also considerably more capable than simply providing a remote shell. According to VulnCheck, its command protocol allows remote operators to execute arbitrary commands, steal WAN PPPoE credentials, rewrite a DNS hijack list, and establish a reverse SSH tunnel.

The researchers also discovered a backup command server domain embedded in the malware that nobody had registered, so naturally, they registered it themselves. VulnCheck set up a server capable of speaking SPEAKINGSTONE's protocol at the newly registered "www.findmyipaddr.com" and watched the infected routers start calling home.

By August 21st, 392 unique devices had connected to the sinkhole. Fully 390 of those 392 were located in China, with the vast majority using China Mobile's network. Most of those devices were the same router model running the same firmware, suggesting a large-scale carrier deployment rather than random consumer infections. VulnCheck describes this particular deployment as "domestic Chinese surveillance technology."

Now, that doesn't mean every ZBT router is a Chinese surveillance device. VulnCheck found ZBT hardware being sold under numerous independent brands worldwide, including Lippert Components, Wave WiFi, OneX in Australia, MoFI Network in Canada, Digineo in Germany, and more. Vulncheck explicitly notes that some of the firmware they examined did not contain the implants. The problem is that ZBT's OEM business makes the hardware's origin surprisingly difficult to identify. The same underlying platforms have appeared under brands including WiFlyer, Deep Orange, Cioswi, CroSkylink and KuWFi, among others.

So the really unsettling part isn't that VulnCheck found three vulnerabilities in an obscure router. It's that these aren't conventional vulnerabilities where someone accidentally forgot to bounds-check a buffer. These are pieces of software deliberately included in the router firmware that provide remote access to the device. We would normally call this malware, but ZBT has described ENDLESSDOORS as an after-sales technical-support mechanism.

VulnCheck's counterargument is pretty compelling; the firm says that whatever its intended purpose, the mechanisms don't securely authenticate the party controlling them. An attacker who can hijack the communications can potentially exercise the same privileges, and because ZBT hardware is frequently sold under other brands, simply not buying something with “ZBT” printed on the box isn't necessarily enough.

If you own one of the affected devices, of which you can find a list at VulnCheck's blog entries for the vulnerabilities (ENDLESSDOORS and the other two), the only real solution is to simply replace it, because the security holes were installed at the factory; it's not as if installing a different firmware version is going to restore trust. Even if your device isn't listed, for anyone running a cheap cellular router, travel router, RV router, or other piece of networking hardware from an obscure OEM, you need to keep in mind that the brand on the plastic probably isn't the company that wrote the firmware, and the fellow who wrote the firmware may not share your values with regard to freedom or privacy.

Nvidia on Friday denied a report by the Wall Street Journal claiming that the company had put some transactions under its recently introduced 'take or pay' AI Compute Partnership on hold, less than two months after unveiling the initiative in early July and days before detailing the effort in its earnings call. The transactions were reportedly paused as some partners were irritated with Nvidia's attempts to influence their operations and because it raised internal concerns about potential antitrust scrutiny.

"The new business model we introduced in July that opens up compute access to the fast-growing AI ecosystem is still in place and continues to evolve due to high demand," a spokesperson for Nvidia told Tom's Hardware.

The report itself does not establish that Nvidia has abandoned the AI Compute Partnership program under which the company committed to rent capacity of newly built AI data centers as well as their minimum revenue, but claims that it put some deals on hold. Meanwhile, Nvidia's denial indicates that the program continues to exist, but is evolving, which means changing.

Per the report, it looks like Nvidia attempted to control how its 'AI Compute Partners' rented their capacity. The company told some cloud providers participating in the program that they could lease its GPUs only to customers approved by Nvidia, according to the WSJ report. The company also preferred to spread available capacity across multiple smaller AI companies instead of allowing a single large customer to take most or all of it. Some cloud operators reportedly pushed back against these restrictions, arguing that they should retain control over which customers they serve. Perhaps, in turn, Nvidia put some of the deals on hold.

While Nvidia does not lend any money or directly finance AI data center buildouts (which essentially means circular financing), it provides demand commitments and guaranteed revenue levels, which perhaps raised internal concerns about potential antitrust scrutiny. As a result, Nvidia could be revising the terms of the deals it inks with partners.

$36 billion of commitments

Modern AI data centers cost billions of dollars that must be spent on the premises, infrastructure, and compute hardware well before an operator has secured enough customer contracts to finance the buildout. Meanwhile, banks or infrastructure investors want confidence that enough of the future facility capacity will actually be rented. Under the program, Nvidia intends to use its own demand commitment on a portion of the facility's capacity in exchange for a percentage of the facility's revenue if demand is strong. This makes financing AI data centers easier as from the lender's perspective, part of the project's revenue stream is effectively supported by Nvidia rather than depending entirely on the operator's ability to find customers.

"Nvidia provides a take-or-pay commitment on a portion of the facility's capacity, a minimum revenue guarantee that gives lenders the confidence to underwrite the project, and in exchange, we share in a portion of the NeoCloud's revenue earned above that floor," explained Colette Kress, chief financial officer of Nvidia, during the company's earnings call. "In this model, we get paid twice, once on the hardware sale, and again through the share of rental revenue, a highly recurring stream layered on top of a one-time equipment purchase."

While actual percentages and economic terms have not been disclosed, it should work pretty straightforwardly. Nvidia provides a take-or-pay commitment that it rents, say, 30% of the capacity of a newly built facility and a minimum revenue guarantee over a period of six years. If the demand is strong and the facility rents 80% of its capacity, well exceeding the minimum revenue guarantee, Nvidia does not need to absorb the guaranteed capacity, and because revenue exceeds the agreed floor, Nvidia receives a percentage of the excess revenue. If the demand is weak and the facility can only rent 20% of its capacity, running well below the guaranteed revenue level, Nvidia's take-or-pay obligation would require it to cover the difference between actual revenue and the contracted minimum according to the specific agreement. Alternatively, Nvidia could rent back unused compute capacity for its own needs and cover the difference between the actual and guaranteed revenue level.

While at least some participants were reportedly irritated with Nvidia's alleged control of tenants, the program has proven to be quite a success so far. As of late July, just weeks after formally announcing the program, Nvidia had committed $36 billion in these new agreements that run for six years.

"Our commitments, which are typically six years in duration, totaled $36 billion as of July 26, 2026," an Nvidia filing with the Securities and Exchange Commission reads.

Nvidia has not disclosed which portions of monetizable capacities it typically commits, so it is impossible to figure out the value of the hardware it intends to supply under the $36 billion commitments.

Micron Taiwan faces a potential strike as support for this labor action is increasing among its workers. Local media reports that a preliminary survey showed 80% of the people involved support such a move, with its labor union demanding that the current bonus system be replaced with a profit-sharing scheme, similar to what SK hynix employees receive. Micron, alongside Samsung and SK hynix, have been raking in a lot of cash because of the AI-driven memory chip shortage, and its workers want a piece of the action.

“Unions say peers offer far higher profit-based bonuses, with Samsung paying out 10.5% of profits and SK Hynix 10%,” Dan Nystedt said on X. “Formal mediation talks are expected to begin by mid-September at the latest, a mandatory requirement before an official strike vote can be held under Taiwan law.”

Earlier this year, Samsung narrowly avoided a strike after it agreed to a deal that gave its foundry workers bonuses that could go as high as $400,000 per employee. It seems that Micron Taiwan’s labor union is following suit, especially as the company’s last earnings call reported a revenue of $41.46 billion and a net income of $28.24 billion, with its Cloud Memory Business Unit, which provides high-bandwidth memory (HBM) to data center customers, accounting for more than 33% of the total revenue.

It’s unclear if Micron workers from other parts of the world will be affected by any deal made in Taiwan, but 60% of its global production capacity is centered around the island, with most of its HBM output coming from its facilities there. With the two sides beginning talks in September, we have yet to see what kind of deal they will reach. But given how lucrative the data center boom has been for the memory industry and the precedent set by workers at Samsung and SK hynix, it’s likely that they will have comparable demands.

While we’re unsure how much bonuses the workers in Taiwan will get, it’s likely that management will negotiate as production disruptions could mean massive losses for the company. Nevertheless, it would also raise complications for workers in other countries, as it could build jealousy and resentment among other workers who will not be part of the bargain, similar to what some Samsung workers are experiencing with the recently closed labor deal.

X’s Global Government Affairs team posted on its account that it identified a 200,000-strong bot farm operating on the platform, with 200 of them posting information designed to influence public perception. According to the team, the accounts are suspected to have been created by Chinese operators, and that they’re using the accounts to amplify the negative impacts of AI data centers, especially on electricity prices.

“We identified a bot farm of approximately 200,000 accounts. Within this farm, we found 200 accounts posting in a manner that could manipulate a legitimate debate about American AI and energy policy,” the team said in its post on the platform. “These posts contained claims that AI data centers are driving up household electricity prices and straining the grid. Others included AI-generated cartoons that depicted data-center operators enriching themselves at the public's expense.”

Some of the accounts shared by the team show names like Thomas Jackson, Patricia Robinson, Sandra Thompson, and Kenneth Flores, making it seem like they’re owned by Americans, and they’re sharing news stories from legitimate sources like The Southern Maryland Chronicle.

For example, some of their posts share the story of how PJM Interconnection hiked its prices by 76% due to AI data center demand. However, they add commentary, and sometimes even include AI-generated images designed to inflame the emotions of someone just scrolling through their feed. One narrative they’re pushing is that the costs of putting up data centers are being borne by ordinary people as big tech companies enrich themselves.

It’s unclear who sponsored or sanctioned the China-linked accounts on X, but there have been reports of China-linked operations designed to divide U.S. opinion on AI. However, the resistance against data centers isn’t all driven by Chinese propaganda, as billionaire investor Kevin O’Leary once claimed. In fact, a recent poll suggested that the biggest driver of data center protests is based on “object-level” local environmental and economic harms, especially as many other projects have shown the negative impacts they had on the community.

The concerns that many residents have about data center developments in their area are indeed valid and true, but so is the threat of foreign intervention in domestic American politics. This is no surprise, though, as nation-states have always used propaganda and information to advance their own interests. The internet, social media, and artificial intelligence have made this easier in recent years, though, so both platforms and people need to be more vigilant than ever.

Intel's confidence in its 14A (1.4nm-class) fabrication process is rising as defect density drops. The company's own design teams are at work developing products that will use the technology, while external customers are now asking about 14A volumes Intel can get them, according to David Zinsner, chief financial officer of Intel, who spoke at Deustche Bank's 2026 Technology Conference. The CFO went as far as saying that 14A is Intel's best process since 22nm technology from the 2010's. But while the comment is optimistic, there is a caveat.

"When you look at the defect density, 14A is tracking better than the target curve we had for 14A," Zinsner said at Deutsche Bank's 2026 Technology Conference. "It is also doing better than any of the previous nodes in terms of how quickly we are bringing down the defects. In fact, we have not seen this performance since 22nm, which is arguably one of the best nodes Intel has ever put out."

Intel intends to begin risk production of its own products on 14A fabrication process in the second half of 2027 and then initiate its high-volume manufacturing in 2028, so 14A is two years away from mass production. So, what Intel's CFO said at the conference is that at this point in 14A's development, its defect reduction trajectory looks at least as healthy as the trajectory of the company's exceptionally successful 22nm process at a comparable point in its development (i.e., in 2010). There are a couple of catches with such phrasing, though. Firstly, the defect density on 14A now is not necessarily equivalent to a defect density on 22nm two years away from mass production. Secondly, due to advances of wafer processing and inspection equipment, what Intel counts as a defect now may not be the same thing as what it counted as a defect 16 years ago. Furthermore, defect density itself does not directly equal product yield.

Intel's 22nm was the company's first manufacturing process to rely on FinFET transistors and at the time was the most advanced process technology in the world; the rest of the industry moved to FinFET devices only with their 14nm and 16nm-class nodes in 2014 and 2015. By contrast, 14A will use second-generation gate-all-around (GAA) RibbonFET transistors, second-generation backside power delivery called PowerDirect, and will be able to use High-NA EUV lithography due to extremely complex patterning. Keeping all of that in mind, Intel's claim that 14A defect density reduction is progressing unusually well this far ahead of HVM is certainly good news.

Meanwhile, comparing 14A to 22nm's successors should be quite comforting for Intel as 14nm mass production was delayed by a year due to insufficient yield, the first-generation 10nm node was a failure, 20A was cancelled, 18A defect density was high even as it hit HVM milestone, while the company did not share almost any information about the progress of its Intel 4 and Intel 3 nodes.

There are good signs for 14A though: external customers are already developing products for this node, whereas the interest from external customers is now practical rather than theoretical.

"We are now seeing demand from our internal customers on 14A [and] they are actually probably the most cynical bunch out of anybody," Zinsner said. "The fact that they are now designing products on 14A was a good confidence boost for us as well. Then, engagements with customers externally, from a foundry perspective has significantly increased. Lip-Bu and the team are now meeting on weekly basis with customers. They are moving away from just looking at data to thinking about 'how much capacity can I get?' 'what does that supply look like?' So, we are now at a point where we have conviction around customers on 14A externally as well."

Intel initiated mass production of its 22nm-based Ivy Bridge processors in late 2011 and early 2012 and released them commercially in late April 2012. The product was highly successful (though overclockers did not like it because of inefficient thermal interface material between the die and integrated heatspreader), and 22nm fabrication technology served the company for many years, first for CPUs in 2012 through 2016, then for other products. Intel's 14A also promises to be a long-lasting node for Intel.

Indiana Michigan Power, or I&M, which serves over half a million residential customers across the two states, said that it’s planning to cut rates for residential customers in Indiana. According to the company, it’s planning “one of the nation’s largest base rate reduction plans,” with the total bill reduction saving Hoosiers approximately $59 million in electric bills by 2027. This translates to about $100 per year for each home that uses around 1,000 kWh monthly. Aside from that, I&M wants to freeze rates for the next three years, offering its customers a measure of stability as data centers are forecasted to use 20% of U.S. power by 2035.

The plan is still under consideration by the Indiana Utility Regulatory Commission (IURC), with a decision expected by June 2027, with residents seeing savings by the summer of that year. This also isn’t the first time the state has seen electricity rate cuts in recent months. I&M has already reduced its rates twice in the first half of 2026, offering some users much-needed relief from rising electricity costs brought about by the massive demand from AI data centers.

PJM Interconnection, which operates the grid that I&M uses, has implemented “irreversible” price hikes of up to 76%, but it seems that I&M was able to isolate ratepayers from increased prices. It achieved this through load growth, allowing it to recoup its capital investments on grid upgrades more quickly, and the increased revenue brought by the massive consumption of large customers like data centers.

“As Indiana continues to experience unprecedented growth, we are taking action to help our customers benefit from that growth through lower costs, enhanced value and continued investments to strengthen our system,” said I&M president and chief operating officer Maryam S. Brown. “We are proud to join forces with state leaders to advance economic development and make energy more affordable – while continuing to provide system reliability upgrades.”

Indiana isn’t the first state to see reduced rates driven by increased rates or usage by larger customers. Oregon approved a 1.3% reduction in residential electricity prices in early July, as customers that used up 20 MW or more saw a 30% increase in their utility bills. Virginia, which plays host to a ton of data centers, is now following suit, with its regulators requiring firms to pay for dedicated upstream electrical infrastructure being built to serve their needs.

Moves like this should allow some Americans to see their bills go down a little bit and address one of the major concerns that they raise whenever a data center project is proposed in their neighborhood. However, several other issues like water supply impact and noise pollution must also be resolved to reduce the community’s resistance to these developments.

Stories of AI agents running amok and following instructions literally, creatively, or a surprising mix of both are becoming common. In the case of developer Sebastien Guillemot, Claude ran an exceedingly effective cleanup operation: The bot managed to free 700 GB of disk space, but it was in the form of Guillemot's entire data folder and one week's worth of work, and it occurred after the model was automatically downgraded due to security concerns.

The developer frequently uses AI agents, and became a bit annoyed that a lot of them didn't clean up after themselves, leaving copious amounts of junk behind in the /tmp directory. Proving the old adage that once you have a hammer, everything looks like a nail, Guillemot asked Claude Fable to write a script that would sandbox each agent under its own folder in /tmp and run a cleanup after they were done. The main problem, naturally, was not deleting files that were actually in use.

Fable suggested adding logic to detect running agents and delay deleting their slice of /tmp, but Guillemot then told the bot the resulting code was far too complicated. Perhaps because the script involved hard deletion of data, Fable took it upon itself to perform an adversarial review, meaning the agent ran a new copy of itself to safety-check its own findings. Anthropic's harness then deemed the script risky enough to downgrade the model to Opus 5 and then Opus 4.8.

Opus 4.8 proceeded to run the safety test, attempting to match the targets of the deletion command against /tmp and the user's home directory to ensure a deletion command wouldn't be run against them. They were correctly identified as dangerous. However, since this was a code test, and you need to clean up after a test, the cleanup step deleted the user's home directory — it reused the same variable name for both the test itself and cleanup.

Guillemot stopped the process, but not in time. Adding insult to injury, after the agent wiped Guillemot's work, it did in fact leave /tmp behind. Some users suggested a few tools like Termaxa and other workarounds for these situations, but the fact that these tools need to exist in the first place is somewhat ironic.

The fact that the harness dropped to a lower-end model due to safety concerns likely contributed to the problem, too. Given that Fable 5 outperforms Opus 4.8 in coding tasks, it might have caught the contradiction with the variable names in the test.

The developer got most of his data back thanks to collecting information from git, nix, session logs, and so forth. Yet there's some irony: all these agents running, and not one daily backup.

Yangtze Memory Technologies Co. (YMTC) told investors and stakeholders in recent IPO preparation meetings that it aims to become the world's largest NAND flash producer by the end of 2027, overtaking Samsung and SK hynix, according to a Financial Times report. The Wuhan-based company filed last week to raise 33 billion yuan ($4.9 billion) on the Shanghai Stock Exchange's STAR Market, with most of the proceeds earmarked for production line upgrades and R&D.

The target would require YMTC to nearly double its market share in 16 months. Counterpoint Research put the company at around 14% of global NAND shipments in the second quarter, level with Kioxia, against roughly 25% for market leader Samsung and 22% for SK hynix and its Solidigm subsidiary combined. Analysts currently rank YMTC third globally, and first in China, by both NAND revenue and shipment volume in the first quarter.

YMTC, which has been profitable only since 2024, reported first-quarter revenue of 47.04 billion yuan ($7 billion) and net profit of 33.38 billion yuan, more than double its net profit for all of 2025. Gross margin, which sat at 5.45% in 2023, reached 35.3% in 2025 and 76.77% in the first quarter of 2026, with fabs running at 98.02% capacity utilization. The cost to get there has been significant for YMTC, which has spent 96.39 billion yuan in capital outlays on long-term assets and 15.95 billion yuan in cumulative R&D spending over the reporting period, generating depreciation and amortization charges of 50.95 billion yuan that leave margins exposed if memory prices turn.

YMTC plans to issue between 1.98 billion and 2.43 billion A-shares, representing 10% to 12% of its post-offering capital, in a deal sponsored by CITIC Securities and CSC Financial. Of the proceeds, 20.8 billion yuan is allocated to mass production line upgrades and 12.2 billion yuan to advanced R&D. This implies a post-listing valuation of 275 to 330 billion yuan, though the Financial Times reported that the company is expected to trade well above that once its shares debut, and that pricing will likely be set conservatively under regulatory guidance.

The listing follows the template set by ChangXin Memory Technologies (CXMT), China's leading DRAM maker, which raised $8.6 billion in July in Asia's largest IPO this year and surged 466% on its first day of trading. By mid-August, CXMT had overtaken Tencent to become the most valuable company listed in China, and both firms are expanding output with new fabs in Shanghai and Wuhan.

That expansion is what worries investors elsewhere in the sector. Joanna Yang, a portfolio manager at Ninety One, told the FT: "For global investors, one question is how these Chinese companies' capacity expansion is going to impact the supply-demand dynamics for memory. This is a global product — it has global pricing."

YMTC has been on the U.S. Commerce Department's Entity List since December 2022, cut off from advanced American fab tools. Its filing to list as the world's third-largest NAND supplier, with 76% gross margins, shows where U.S. export controls work and where they don’t.

The sanctions regime was built to choke access to leading-edge lithography, and it has done so effectively for logic. NAND competitiveness, however, runs through a different channel, with layer counts, stacking architecture, and hybrid bonding determining bit density, and none of them depend on EUV. YMTC's fifth-generation NAND bonds two decks of 150 and 144 layers into a 294-layer device using its Xtacking architecture, and the company has been building production lines around homegrown Chinese tools to close off the remaining dependencies.

YMTC’s listing turns that position into a funding mechanism. Margins earned at the top of the memory cycle are already paying for domestic tool development, and the IPO adds a capital source that sits outside the reach of U.S. policy entirely: Shanghai's equity market, where CXMT's debut has already shown how much money is waiting for exactly this kind of company.

The Trump administration is weighing a second round of semiconductor tariffs that would extend duties beyond chips to products built with them, including laptops, gaming consoles, and data center servers, eight unnamed sources familiar with the talks told POLITICO in a report published today. Commerce Secretary Howard Lutnick favors a structure that would cap duty-free chip imports at a volume pegged to each company's committed U.S. production, four of the sources said, and Commerce officials have indicated in private talks that the exemptions attached to January's 25% tariff, which cover data centers, R&D, startups, and consumer devices, may not carry over. A phase-in period is under discussion, and the framework could still change substantially in the coming weeks.

Proclamation 11002, signed on January 14, imposed a 25% duty on a narrow set of advanced accelerators, with Nvidia's H200 and AMD's MI325X named in the accompanying White House fact sheet, and explicitly labeled the action Phase 1.

The same document directed Commerce to report to the president by July 1 on the market for semiconductors used in U.S. data centers, and a separate April 14 report from the USTR and Commerce covered tariff negotiations with Taiwan, South Korea, and Japan. The exemption categories now in question match those written into the January action and include U.S. data centers, research and development, startups, repairs, non-data-center consumer and industrial applications, and public sector uses.

Taiwan's January trade agreement applies zero tariffs on Taiwanese chips within 2.5 times a company's current U.S. manufacturing capacity while new plants are under construction, tightening to 1.5 times once they're built. TSMC has committed $265 billion to its Arizona site, the largest foreign direct investment in U.S. history, yet projects only around 30% of its most advanced capacity there at full build-out, according to POLITICO. Taiwan produces more than 90% of the world's leading-edge chips, and industry representatives argued in the talks that a quota keyed to current domestic capacity can't cover the volumes hyperscalers are buying during a record AI spending run.

Jonathan McHale, digital policy chief at the Computer and Communications Industry Association, whose members include Amazon, Google, and Meta, compared the data center buildout to "building the transcontinental railroad" and said added cost and unpredictability put that investment at risk.

Tech lobbyists have met with Lutnick and Bureau of Industry and Security undersecretary Jeffrey Kessler with growing frequency since the start of summer, per the report, but three of the sources said recent talks moved against the industry. One person involved put the domestic manufacturing build-out at more than five years, longer than any phase-in the administration has allowed on previous tariff rounds.

White House spokesperson Kush Desai defended the approach, saying reshoring chip manufacturing is a top priority for the president; the Commerce Department didn't respond to POLITICO's requests for comment.

Cerebras' SRAM-packed wafer-scale engines (WSEs) have carved out a niche in the AI model serving space for extremely low-latency, high-throughput inference, enabling services like OpenAI's ChatGPT-5.6 Sol Ultrafast tier. At Hot Chips 2026, the company revealed the next two generations of its wafer-scale accelerator roadmap. It also discussed the benefits of its new Nexus rack design for the CS-4 rack-scale accelerator and the performance of the three WS-3T wafer-scale engines contained within.

The integration of a huge coherent processor on a single massive slice of silicon is a unique feat in the industry. But that approach also comes with limitations. AI demands for memory are only increasing due to growing model sizes (the memory occupancy of which can be amortized across multiple inference sessions) and ever-lengthening contexts stored in large KV caches (which are also unique to each inference session).

Traditional GPU makers have addressed those pressures, in part by working with memory makers to stack HBM higher and by using more of it per accelerator to expand that precious resource in proximity to the processor. But on a wafer-scale design whose area is already 100% utilized by logic and memory, adding more of a particular resource requires giving up area that might have been used for some other purpose. Since silicon production will continue to take place on 300mm wafers for the foreseeable future, Cerebras must look in other directions to scale up the on-chip resources available to its processors.

Cerebras revealed that it will start expanding its wafer-scale engines into stacked designs with its CS-6 system’s WSE, currently two generations out on its roadmap. For the first time, Cerebras will attempt 3D stacking of DRAM on top of its logic and SRAM wafer, a move it claims will maintain the company's performance lead for inference while reducing the area required for the overall chip.

The goal of stacking wafer-scale logic and memory chips on top of one another is certainly ambitious, but it’s only one potentially important change in the CS-6 system. The concurrent reduction in area Cerebras foresees suggests the company might be able to increase the overall number of WSEs it produces, which could relax a crucial constraint as the company seeks to scale its business amid a world of ever-increasing wafer demand.

In the present, Cerebras is boosting the performance of its existing wafer-scale platform with its new CS-4 rack-scale system and its Nexus rack design. CS-4 incorporates three of the company's refreshed WS-3T wafers into self-contained "backpacks" that incorporate power delivery, scale-up networking, and liquid cooling infrastructure into a single pluggable module.

Cerebras notes that because these modules are self-contained, future wafer-scale engines built with this architecture can be swapped in without exchanging the entire rack in the process.

Cerebras chief system architect JP Fricker had choice words when describing the 5,000 cables that are used to connect the Rubin NVL72 NVLink scale-up domain within each of those racks, calling it "a mess" and contrasting it with the cleaner and less failure-prone design provided by the on-die interconnects and self-contained compute module design of the Nexus system.

The Nexus backpack design also disaggregates the I/O interfaces of the WSE from the rest of the backpack's components. Two I/O modules now connect to the edges of the wafer, providing RoCE v2 RDMA connections for interoperability with other systems, alongside a direct connection to other wafers in the rack. Because these modules are also interchangeable, they provide another potential route for future upgrades, independent of the core compute wafer.

The Nexus design situates up to 10 rack power delivery units for each backpack at the front side of the rack, each group of which can be configured for varying levels of redundancy in accordance with an operator’s needs. The rack also provides air cooling for the backpack components that need it.

Mounting the wafer-scale engines vertically in the backpack modules lets Cerebras do away with a PCB or substrate for the wafer to handle all its supporting infrastructure. Instead, the backpack connects the large copper busbar that delivers juice to the chip directly to its back side. This close contact is important, as it minimizes power losses that occur on the way to the chip, as happens with a BGA GPU chip mounted on a PCB module with all of its power delivery circuitry located around the die.

Cerebras translates the power saved this way directly into performance in the WS-3T. The company says the losses avoided by the Nexus backpack design allow it to deliver twice as much power to the wafer-scale engine as in past designs, which leads directly to increased clock speeds and up to twice the performance of the WS-3.

Using the same base silicon as the WS-3, each WS-3T delivers twice as many sparse FP16 petaFLOPS and twice as much memory bandwidth from its SRAM. But the WS3-T is still limited to 44GB of memory across the entire wafer, and three such wafers in a CS-4 rack only scale up to 132 GB, far less than the 20.7 TB of HBM in the Vera Rubin NVL72 system and the 31 TB of AMD’s Helios.

The company doesn’t publish dense PFLOPS figures for these engines, possibly because the dataflow architectural design of the chips is specifically built to derive advantage from sparsity in a way a traditional GPU usually isn’t.

In any event, to accommodate the larger models of today and tomorrow, Cerebras will need to scale up and out. But unlike other rack-scale systems that rely on Ethernet for scale-out, Cerebras can simply connect CS-4 systems together using the same wafer-to-wafer interconnect that connects wafer-scale engines together in the Nexus rack. The company claims 2.4 Tb/s of direct scale-up bandwidth per wafer within the rack for a total of 7.2 Tb/s of inter-chip bandwidth at 2 μs latencies.

Cerebras notes that with its architecture, only the model activations need to pass between wafer-scale engines, so the relatively low bandwidth of the direct wafer connection isn't the obstacle to scaling out the system that it might seem when evaluated against the hundreds of terabytes per second of scale-up bandwidth of a system like Vera Rubin NVL72 or AMD's Helios. (The on-die fabric of the WSE-3T boasts 53.4 PB/s of bandwidth, regardless.)

The CS-4 system architecture lays the groundwork for the next-generation CS-5 accelerator, which will use new WSE silicon in 2027. For smaller models, the company says the next-generation WSE will deliver up to 10,000 tokens per second per user, while larger frontier models from labs like DeepSeek or OpenAI could run at 5,000 tokens per second per user.

As Nvidia CEO Jensen Huang has said, AI agents are impatient, and the ability to provide such vast numbers of tokens per second using specialized accelerators like the CS-4 will likely continue to be an important niche for Cerebras to exploit alongside its partners at OpenAI and AMD going forward.

Glass-core substrates, the replacement for organic chip packaging that Intel promised in September 2023 with more than $1 billion behind it, are now in final qualification. However, the product is still not in a single commercial product. SKC, a material manufacturer and chemical affiliate of the SK Group, said on its July 27 earnings call that embedded glass substrate samples from its Absolics plant in Covington, Georgia, are undergoing package-level reliability evaluation in Taiwan, with results possible before year-end.

Samsung Electro-Mechanics formalized a 482.1 billion won ($310 million) glass-core joint venture with Sumitomo Chemical's Dongwoo Fine-Chem on July 2, targeting first production in the second half of 2027. Intel, which started the race, has shifted to licensing its patents and showing demo vehicles, with its own deployment now pointed at around 2030. However, and rather predictably, every timeline in the segment has slipped. Absolics originally planned mass production for the first half of 2024, and reported claims that AMD would adopt glass substrates for CPUs between 2025 and 2026 have come and gone unfulfilled.

Why glass?

The technical case for glass core substrates leans heavily on numbers Intel published a while back, such as 10 times the interconnect density of organic substrates and a 50% reduction in pattern distortion. Glass cores can be tuned to a thermal expansion coefficient of roughly 3 to 10 ppm per degree Celsius against silicon's 2.6, which cuts warpage by about half compared with organic cores, and rectangular panels in the emerging 510mm x 515mm format use more than 75% of their area for large die against roughly 50% for round 300mm wafers. Through-glass vias have been demonstrated at six microns in diameter with aspect ratios beyond 15:1 at ECTC 2025, and Georgia Tech has shown stacked glass running at 220 GHz with 0.3 dB of loss.

Glass also chips and cracks at the edges during drilling and dicing, and MIT Technology Review reported in March that early Absolics production runs broke hundreds of panels every couple of days during early testing days. Edge-coating work has cut measured edge stress from 95 MPa to 49 MPa, and low-temperature dielectrics that cure below 180°C have been developed to reduce thermal stress during build-up, but metallizing vias below 10 microns and holding nanometer-scale flatness across half-meter panels remain open manufacturing problems.

Intel's program

Intel demonstrated a working system booting Windows on a glass-core substrate in early 2025, and Rahul Manepalli, Intel's VP of module engineering, told MIT Technology Review that the benefits of glass cores are "undeniable" and that Intel wants "to be one of the first ones who do it." The commercial plan around that engineering has changed shape, however. DigiTimes reported in late July that Intel is in early-stage talks with Chinese cover-glass maker Lens Technology about a packaging partnership, but there has been no solid agreement made to date.

At NEPCON Japan in January, Intel Foundry showed its first thick-core glass substrate with two EMIB bridge dies embedded directly in the glass: a 78mm x 77mm package with two 800-micron-class glass layers, 10 redistribution layers on each side, and around 1,716 mm2 of silicon on top, roughly two full reticles, with no micro-cracking reported in testing.

There’s currently no production time to this, however, with TrendForce placing Intel’s commercialization somewhere around 2030, alongside co-packaged optics prototypes built on glass at its Rio Rancho, New Mexico site. Meanwhile, Amkor, Intel's packaging partner on the optics work, put commercialization within three years at an industry event in Seoul in April.

Korea aiming for 2027

Samsung Electro-Mechanics moved its glass program from advanced R&D into a business-execution unit in February and has been sampling from a pilot line at its Sejong plant since late 2024. The GLASEM joint venture announced on July 2 splits ownership: 66% to Samsung Electro-Mechanics and 34% to Dongwoo Fine-Chem, with site production in Pyeongtaek, and targets an operating plant in the second half of 2027, with the joint venture making the drilled and metallized glass core that feeds Samsung's substrate line. Korean industry reporting says samples have gone to AMD and Broadcom, and also puts Samsung's overall glass maturity at 40 out of 100, a gap between marketing dates and process readiness worth keeping in mind.

Absolics' $600 million plant in Covington, Georgia, backed by $75 million in CHIPS Act funding plus a further $100 million through the government's advanced packaging R&D program with Georgia Tech, has a Phase 1 capacity of 12,000 m² of substrate per year, enough for roughly two to three million H100-sized packages. The company produced mass-production samples in the first quarter, began customer qualification that reportedly includes AMD and AWS, and is targeting mass production by the end of 2026. LG Innotek runs a third Korean program from its Gumi plant, with prototypes delivered in 2024 and production targeted for 2027 to 2028.

TSMC and Japan

TSMC's CoPoS line in Chiayi, built around 310mm x 310mm rectangular panels, received tools in February, completed its pilot line around June, and is aiming for pilot production in 2027, with mass production in the second half of 2028. Equipment supplier SCHMID has described glass integration in that platform as under review, not committed, and TrendForce puts TSMC's commercial-scale glass-core production after 2030, meaning that the industry's biggest packaging operation is going panel-level first and glass later, if at all. TSMC revived glass substrate research a couple of years ago after earlier deprioritizing it, reportedly under pressure from Nvidia, whose accelerator packages are the main thing outgrowing current packaging.

Japan’s Dai Nippon Printing began phased operation of a TGV glass-core pilot line at its Kuki plant in Saitama in December 2025 on 510mm x 515mm panels, with sample shipments from early 2026 and full mass production targeted for fiscal 2028. Toppan's pilot line for glass cores and interposers at its Ishikawa plant was scheduled for commissioning in July, and Nippon Electric Glass has scaled its ceramic-reinforced GC Core panel to 515mm x 510mm at 1mm thickness. Rapidus is studying panel-level packaging on 600mm x 600mm glass as part of its 2nm program, with viability put at the late 2020s. China has its own entrants, led by display maker BOE, whose pilot line is sampling.

TrendForce estimates Nvidia's Rubin Ultra package at roughly 7,470 mm², about nine reticles' worth of silicon and memory, against around 2,739 mm² for Blackwell, and CoWoS interposer wafers cost on the order of $10,000 each, comparable to a processed 7nm wafer.

Organic substrates warp and lose dimensional stability at those sizes, and round interposer wafers waste a growing share of their area, which is what glass panels are meant to fix. SEMI's first dedicated market report on glass cores, published in May with Global Net, projects initial production around 2028 in select high-performance applications and a 67.2% compound annual growth rate from 2028 to 2040, while Yole puts the advanced IC substrate market at $31 billion by 2030 with glass cores among the drivers.

At the moment, no production design exists, and all customers that have been named or otherwise attached to the tech, including AMD, Broadcom, AWS, and Nvidia, come from wider industry reporting. Nothing has been confirmed officially. As for whether we might see more substantial progress next year, Absolics will need to publish some solid package-level reliability results by the end of this year, or a first officially named customer at any of the Korean manufacturers. We also need to hear from TSMC on whether glass cores will go into CoPoS or remain under review into the 2030s.

Nvidia expects sales of the Vera Rubin platform to account for around 20% of its data center revenue in the third quarter of its fiscal year 2027, which will make it the company's fastest-ramping data center product in history. As Nvidia projects its revenue to be around $108 billion in Q3 FY2027, sales of Vera Rubin hardware alone will total around $20 billion in just one quarter.

"We see Vera Rubin accounting for about 20% of data center revenue in Q3," said Colette Kress, chief financial officer at Nvidia, during the company's earnings conference call with financial analysts and investors. "Having already received purchase orders from every major hyperscaler, AI cloud, and system OEM, we expect Vera Rubin to mark the fastest product ramp in Nvidia's history."

Data center revenue has accounted for around 92% of Nvidia's quarterly sales in recent quarters, so as long as Nvidia meets its $108 billion earnings projection in Q3, its data center revenue will reach around $99.36 billion, meaning that sales of its Vera Rubin platform hardware will be around $19.872 billion.

Nvidia began to ramp up production of Vera Rubin components — that include Vera CPUs, Rubin GPUs, BlueField 4 DPUs, and other units — this spring and commenced first revenue shipments of actual VR200 NVL72 racks in August, with Microsoft being the first to deploy commercial systems (at least according to Satya Nadella).

Normally, companies ramp up production and sales of their data center platforms for several quarters. Ramping up a data center platform from effectively no production revenue in Q2 FY2027 to 20% of revenue ($20 billion in this case) in just one quarter is a record not only for Nvidia, but perhaps for the whole industry, given Nvidia's scale. However, there is a catch: actual unit shipments do not look truly breakthrough.

Exact volumes of Vera Rubin units that Nvidia plans to ship in the third quarter of its fiscal 2027 are unknown. However, if Nvidia ships only VR200 NVL72 rack-scale systems, depending on their actual price and configuration (estimated from $5 million to $7.8 million per unit), Nvidia will supply from roughly 2,550 to approximately 3,975 machines containing 91,700 – 143,100 Vera CPUs as well as 183,500 – 286,100 Rubin GPUs.

These numbers are, of course, very rough since the company will sell a boatload of MGX servers and even Vera CPUs and Rubin GPUs separately, meaning that actual unit shipment volumes of these key components will be higher. Nonetheless, we are still talking about hundreds of thousands, rather than millions, of CPUs and GPUs, which is not particularly many. Still, given the stellar prices of leading-edge AI hardware, even relatively limited volumes of these components can generate tens of billions of dollars in revenue.

Researchers from the University of Mary Washington in Virginia found that of the 31 localities with an existing, approved, or proposed data center, 25 of them have non-disclosure agreements (NDAs) that make it difficult, if not impossible, for their citizens to find information about these projects. According to NPR, these NDAs have left the questions of many residents unanswered, making them feel left out of the decision process and increasing their distrust of their leaders.

Many officials defended signing these secrecy agreements, saying that this is standard practice among tech companies, and that they could lose the potential business and revenue that data center projects could bring to their jurisdiction if they fail to sign the NDA. Louisiana Economic Development Secretary Susan Bourgeois even told the publications that NDAs are “fundamental for economic development” as they allow the state to compete with other states and territories for the data centers’ business. “The last thing that they want to have happened in the beginning of the discussion, or in any part of the discussion, is for their information that they’re sharing to be disclosed publicly. So, without NDAs, our work, frankly, just doesn’t happen,” the agency secretary said to NPR. She also added, “The irony is that we, we use NDAs not to be more cloaked, we use NDAs to be more forthcoming.”

NDAs aren’t only limited to Louisiana, as other towns across the U.S. have signed these secrecy agreements even before they started talks with potential data center projects in their regions. Some Wisconsin citizens raised a similar issue in early 2026, when at least four municipalities reportedly signed NDAs with Microsoft and Meta as they negotiated with the two companies. These confidentiality agreements are some of the things that drive the heated debate between elected officials and ordinary citizens, with the latter often feeling betrayed and sold out by the former when they belatedly find out that a data center will be put up in their community.

However, West Feliciana Parish proved that it could get a data center deal without keeping its details top secret. Parish President Kenny Havard said that economic development does not require NDAs. “I don’t think NDAs are necessary unless they’re going to bring you in a room and share some proprietary information. When you’re talking about land sales, tax incentives, those sorts of things that affect the citizens, it should be out in the open. It should be transparent,” Havard told the outlet. He also said, “We’re proud that we did it without having to sign NDAs. And I think it just shows that you can do these projects without keeping the people in the dark.”

The Environmental Protection Agency (EPA) has recently given two new chemicals approval for use within the U.S., but the non-profit organization Earthjustice is suing the agency for not doing its job. According to a lawsuit reported by The Guardian, these chemicals are photoacid generators used for semiconductor manufacturing, but they’re also quite toxic for humans. Exposure to them could allegedly lead to “sudden death,” as well as various health risks like cancer, eye corrosion, neurological damage, and reproductive harm. It is alleged that the approvals are "part of a broader pattern around data centers."

The current administration wants to bring semiconductor manufacturing back into the United States, with President Donald Trump issuing an executive order last year to fast-track the approval of chemicals needed for data centers. It’s unclear if these two chemicals are related to the order, but Atty. Jonathan Kalmuss-Katz, who works with Earthjustice, said that the EPA “does not know the level at which the chemicals are ‘acutely lethal’ or cause other serious health damage.” It also said that “the chemicals may present an ‘unreasonable risk’ to workers and the public.” Nevertheless, the agency allegedly approved them for import and use in the U.S. with minimal and non-protective restrictions.

“If a chemical may present an ‘unreasonable risk,’ then the Toxic Substances Control Act requires the EPA to ‘prohibit or limit the manufacture, processing, distribution in commerce, use, or disposal of such substance or to prohibit or limit any combination of such activities to the extent necessary to protect against an unreasonable risk,” Kalmuss-Katz told The Guardian. He also added, “This is turning the new chemical review process on its head. You have a situation where the EPA has failed at its most fundamental obligation when it comes to new chemicals, and that is to protect the public from unreasonable risk.” Aside from the health and environmental risks posed by the photoacid generators, these chemicals also appear to be PFAS or per- and polyfluoroalkyl substances. These are synthetic chemicals with unusually strong bonds that could last a long time, even if they’re exposed to the environment, which is why they’re often referred to as “forever chemicals.”

The semiconductor industry has long been known for its use of PFAS, and researchers are working hard to find ways to help clean up these chemicals used to make chips. So, the approval of new chemicals without rules and regulations that require them to be removed from discharges is potentially disastrous for the environment. This is the same concern that a lawsuit against Micron’s planned New York fab raises, which says that the approved wastewater and air permits that the company received could still allow these “forever chemicals” to leak into the Oneida River. Environmental groups acknowledge that domestic chip production requires the use of these potentially harmful chemicals, but the EPA must ensure that these do not find their way into the water system and that the people working with them are protected from exposure.

Nvidia has agreed to acquire Hugging Face for $12.9 billion, according to The Information, citing a person familiar with the deal. If the report is accurate and Nvidia indeed buys Hugging Face, the purchase could strengthen Nvidia's open-model strategy, provide another route to sell AI hardware, and help defend its hardware business as Anthropic, Google, OpenAI, and other major hyperscalers develop their own accelerators.

Nvidia sells hundreds of billions worth of AI hardware every year. Although the ubiquity of its CUDA software stack and leading performance of its hardware are the primary reasons why Nvidia's AI platforms are sold like hot cakes, another important factor is that many AI models were trained on Nvidia hardware and are optimized to run on it. Therefore, the more models trained on Nvidia hardware, the more products the company is going to sell eventually.

Hugging Face is an AI development platform best known for the Hugging Face Hub, a GitHub-like repository where researchers and developers publish, discover, download, and collaborate on AI models, datasets, and applications. Hugging Face also develops widely used software such as the Transformers library and provides tools and cloud services for training, optimizing, and deploying models on different types of AI hardware.

In addition to hosting models, datasets, and applications, Hugging Face provides software that helps developers optimize and deploy AI models on different CPUs, GPUs, and AI accelerators, while its Inference Endpoints service lets customers run models on managed infrastructure hosted by AWS, Google Cloud, and Microsoft Azure.

To make things simple, Inference Endpoints allows customers to select the provider, region, hardware type, and instance. What is important here is that the hardware used by Amazon, Google, and Microsoft is not all Nvidia. Hugging Face currently offers, depending on the provider, AWS Inferentia, AMD Instinct, Google TPU, Intel CPUs, and Nvidia accelerators, among other configurations.

OpenAI models, datasets, popular applications, and abilities to optimize and deploy AI models on different hardware make Hugging Face strategically important to Nvidia. On the one hand, the company can make the platform exclusively rely on its hardware, though this may face a backlash from the community, so this is something unlikely to happen in the short term (even assuming Nvidia is indeed set to buy Hugging Face). On the other hand, Nvidia wants open models to remain competitive with proprietary offerings from companies like Anthropic and OpenAI that may eventually get optimized for proprietary non-Nvidia hardware. Nvidia has been building its own Nemotron open models and has committed tens of billions of dollars to the effort. Furthermore, as Hugging Face grows, so is adoption of AI hardware in general and Nvidia hardware in particular.

Hugging Face is growing rapidly, but its revenue remains modest compared with the purchase price, according to The Information. The 10-year-old company recently reached approximately $150 million in annualized revenue, compared with about $100 million several months earlier, which puts Nvidia's price at roughly 80 times forward revenue, something that clearly highlights the strategic nature of the acquisition. Negotiations reportedly began after Hugging Face received acquisition interest elsewhere.

CEO and co-founder Clem Delangue said in June that paying subscribers doubled during the first half of 2026 and recently said the company was close to profitability. Demand has benefited from improving Chinese open models from Z.ai, Moonshot, and DeepSeek.

If Nvidia proceeds with the takeover, the transaction will be a part of Nvidia's increasingly aggressive investments across the AI ecosystem that spans from hardware to models to software. Last week, Nvidia agreed to pay $6 billion to license development technology from open-model developer Poolside and offered jobs to more than 100 employees. Nvidia also acquired Groq, Enfabrica, Essential AI, Illumex, and Kumo AI, just to name some.

OpenAI made quite a splash back in June, when it unveiled its 'Jalapeño' AI accelerator and revealed that the chip reached tape-out in just nine months. At the Hot Chips conference, OpenAI disclosed more details about the architecture of its Jalapeño inference processor as well as shared its target and real-world performance numbers. The company claims its NUMA-style spatial architecture enables Jalapeño to outperform Nvidia's GB200 and GB300 in low-latency inference and in terms of performance-per-watt, while a 2,048-processor system scales to 27 exaFLOPS and 32 PB/s of aggregate memory bandwidth.

A massive chip with massive scaling

OpenAI's Jalapeño is a massive AI inference accelerator co-developed with Broadcom, with 216 GB of HBM4 memory and up to 15.4 TB/s of bandwidth. The processor delivers up to 3.4 MXFP8 PFLOPS as well as up to 13.4 MXFP4 PFLOPS at 700W, which makes it suitable for inference, though the MXFP4 format may not be enough for training. The ASIC has a 700W power rating and operates at 1.70 GHz on silicon already running in OpenAI's labs, though OpenAI's engineers said at Hot Chips that the plan is to increase clocks up to 1.80 GHz, perhaps to get higher peak performance.

On the scalability side of matters, Jalapeño can scale to 128 accelerators in a local rack interconnected using Ethernet at 600 GB/s and to 2,048 ASICs in a 16-rack pod configuration at 200 GB/s per processor. The complete system offers 27 EFLOPS of MXFP4 performance, 432 TB of HBM4 memory, and 32 PB/s of aggregate memory bandwidth. For connectivity, OpenAI uses Broadcom Tomahawk 6 Ethernet switches and what it calls a 'half-flattened' two-level Clos topology that provides higher bandwidth for tensor-parallel traffic, lower bandwidth for expert-parallel communication, and prioritizes low latency for both. During the Q&A session, OpenAI confirmed that the scale-up network uses Ethernet with 200-Gb/s links. Jalapeño's physical hardware around the Broadcom-made chip is set to be made by Celestica.

On paper, Jalapeño's specifications look good, but they barely look impressive compared to Nvidia's Blackwell Ultra accelerators (10 FP8 PFLOPS, 20/15 sparse/dense NVFP4 PFLOPS). However, OpenAI argues that raw compute and memory bandwidth are not what makes its Jalapeño platform different.

The company says a 128-ASIC Jalapeño domain has more than 1 PB/s of aggregate HBM4 bandwidth, which is significantly higher compared to GB300 NVL72 (576 TB/s). A one-trillion-parameter model using FP4 weights requires about 0.5 TB. So, purely from a bandwidth perspective, the system could read the entire model more than 2,000 times per second. Meanwhile, actual inference performance comes nowhere near that theoretical ceiling, which is why hardware developers do not tend to add HBM bandwidth infinitely.

Smart data movement

Instead, Jalapeño uses what OpenAI describes as a memory-sliced, or NUMA-style, architecture. The chip has 64 core slices, and each of them is paired with its own HBM slice to guarantee predictable latency and bandwidth. OpenAI says this arrangement avoids conflicts associated with a unified memory subsystem and lets frequently used operands remain close to the compute resources that need them. OpenAI does not explain why it chose exactly 64 slices, which likely means it was a sweet spot for the current architecture.

To connect the 64 core slices, OpenAI uses a specialized high-bandwidth, low-latency collective network that moves data coupled to compute operations 'register-to-register, with zero conflicts' in a bid to eliminate several performance bottlenecks. In addition, Jalapeño has a separate general-purpose network-on-chip (NoC) that handles less common communication (e.g., remote/global memory accesses) and provides access to the external scale-up network.

The distinction between these fabrics is substantial. OpenAI describes the general NoC as deliberately more 'anemic than you would expect from a normal chip architecture' as it does not want performance-critical traffic to use it typically. By contrast, the ultra-fast collective network organizes data movement, so operands arrive in registers when needed rather than leaving compute engines and then waiting for memory, network traffic, or global synchronization, which creates internal performance bottlenecks.

In general, it looks like one network is optimized for speed and predictability for inter-core communications, whereas the other is optimized for general use cases. Trying to make one NoC do both would require a much more capable general network, consume more silicon/power, and reintroduce contention.

A different approach

OpenAI's Jalapeño is also designed for the very different types of work that happen during a single agentic inference request.

To explain how it works, let us compare OpenAI's and Nvidia's approaches. Nvidia's standard system-level decomposition is primarily two phases: prefill and decode. Prefill is generally compute-bound (which is why Nvidia tried to assign Rubin CPX with GDDR7 for this one), while decode is generally memory-bound (which is why Nvidia wants to keep GPUs with HBM for this). By contrast, OpenAI breaks the process into three phases: prefill (compute-bound), draft (latency-bound), and verification (bandwidth-bound).

In theory, OpenAI could have assigned each phase to a different type of specialized accelerator. However, the amount of prefill, drafting, and verification changes depending on the model, context length, token efficiency, and software algorithms. As a result, it is hard to predict the number of processors that must be deployed, so it's inevitable that some phases would sit idle. To that end, it makes more sense to develop one balanced ASIC that can do everything.

As a bonus, a universal inference accelerator does not need to move increasingly large KV cache to its peers, unlike highly specialized ASICs, which ultimately means less power consumed.

Chips develop chips

Despite Jalapeño's exceptionally short development cycle, OpenAI says that most of the processor was designed from scratch rather than assembled from existing Broadcom accelerator IP. OpenAI's Richard Ho said the compute die reuses some interface IP, but most of its Register Transfer Level (RTL) was newly written using XLS and Verilog. Meanwhile, development moved remarkably quickly: initial RTL work began in February 2025, the design taped out in November, first silicon arrived in May 2026, and OpenAI had Codex running on Jalapeño that same month.

One reason OpenAI was able to move so fast with its development was its extensive use of AI to assist and optimize the design. More than half of the core was written using the XLS hardware language and compiler infrastructure, while OpenAI's own AI models searched for ways to improve power, performance, and area (PPA). Compared with human 'baseline' designs, OpenAI reports improvements of 56% for a BF16 multiplier, 21% for an FP4 dot-product block, and 10% for an FP32 accumulator, along with 10% and 8% area reductions for the matrix and SIMD units. The company says that AI-assisted optimization even helped squeeze circuitry into a floorplan block that otherwise would not have fit, though OpenAI remains tight-lipped about what circuitry it was.

Jalapeño is OpenAI's first, but not the last, attempt to develop custom inference hardware. The company says its 2^nd Generation already well into development and heading toward tape out, while Richard Ho said during the presentation that Gen 3 is already 'operational,' even though his slide said 'planned.'

Programmability

Because Jalapeño features its unique spatial and sliced architecture, it is programmed differently from Nvidia's CUDA GPUs. OpenAI says Jalapeño can be programmed using a low-level programming environment in the open-source Triton ecosystem. Unlike the latest versions of CUDA, which ensure that its code runs on all Nvidia GPUs and aligns with the tensor-heavy execution model of Blackwell processors and their successors, Jalapeño gives software more explicit control over where data and computation are placed.

Each core has fast access to its local portion of HBM; these cores are interconnected using an ultra-fast network, so the software must be able to determine where tensors are physically located and how they are distributed across the chip. This makes programming the spatial architecture more complicated, so OpenAI also uses AI to find efficient data placement, scheduling, and communication patterns and to optimize kernels for the hardware.

Meanwhile, optimal mapping is architecture-dependent, so once OpenAI changes the number of cores, local-memory organization, collective-network topology/bandwidth, or compute resources in next generations of its accelerators, the old placement and scheduling may no longer be optimal and will require AI tools to perform hardware-specific optimizations again. By contrast, software written for Blackwell will work on Rubin and then Feynman without modifications.

But how good is OpenAI's software stack compared to CUDA? Apparently, good enough, based on performance results published by the company.

Performance

Instead of comparing peak performance numbers, OpenAI used SemiAnalysis' InferenceX benchmark to compare Jalapeño and Nvidia's GB200/GB300 across their complete latency-versus-throughput curves. The company measured how many tokens each system could deliver at comparable user-perceived latency and normalized the results by package power — 700W for Jalapeño, 1,200W for GB200, and 1,400W for GB300 — meaning that while Nvidia's hardware can lead in terms of absolute performance, OpenAI's accelerator leads in efficiency.

Compared to Nvidia GB200/GB300, Jalapeño delivers:

• Roughly 1.5X – 1.9X higher peak throughput per watt
• 1.7X – 3.6X lower end-to-end latency
• 2.1X – 4.1X lower minimum time between tokens (TBT)
• At Nvidia's minimum-TBT operating points, Jalapeño can deliver up to 104.3X higher throughput.
  
  This methodology particularly favors Jalapeño's strength at low latency, so the result is significantly inflated. The 104.3X figure means that at GB300's lowest-latency operating point, Jalapeño can maintain 104.3X higher throughput, not that Jalapeño is 104.3X faster overall.
• OpenAI also noted that its internal models show an even larger advantage for the Jalapeño platform and says applying multi-token prediction to Jalapeño can improve latency by another 3X to 5X at equivalent efficiency.

AI makes chips now

OpenAI used Hot Chips 2026 to fully detail Jalapeño, its first custom inference AI accelerator co-developed with Broadcom. The ASIC relies on a NUMA-style architecture built around 64 memory/core slices, carries 216 GB of HBM4 memory, and has compute performance of up 13.4 MXFP4 PFLOPS at 700W. Being aimed at AI data centers, Jalapeño scales from 128 accelerators per rack to 2,048 inference processor per pod and can provided up to 27 EFLOPS of MXFP4 compute, 432 TB of HBM4, and 32 PB/s of aggregate memory bandwidth per cluster.

While absolute performance of Jalapeño may fall short of what Nvidia's Blackwell or Rubin offer, the company argues that the main advantage of its AI inference accelerator platform is its performance-per-watt achievements as well low latency. OpenAI says its Jalapeño delivers roughly 1.5X – 1.9X higher peak peak-performance-per watt and 1.7X – 3.6X lower end-to-end latency than Nvidia GB200/GB300 in its InferenceX comparisons.

Perhaps the most impressive, or maybe even terrifying, though certainly not unexpected thing that OpenAI revealed is that AI played a major role in Jalapeño's unusually fast nine-month RTL-to-tapeout development cycle and also enabled the company to improve performance, power, and area, of the design. Jalapeño's successor is already heading toward tapeout and OpenAI's 3^rd Generation AI accelerator is already in development.

Game studio MiTale Ltd. is at Gamescom promoting a narrative-driven post-apocalyptic RPG dubbed C.L.A.Y. - The Last Redemption. You may well have heard the same or very similar descriptions of a new game before, but C.L.A.Y. stands out for its use of quantum computing techniques in the creation of game assets as well as for game narrative and procedural systems. MiTale worked with experts from IBM Quantum Computing and claims this is the “first commercial game on the market utilizing quantum computing in an immersive narrative experience.” Moreover, it reckons this is “the first step toward using real quantum hardware in games to accelerate complex tasks in a manner similar to a GPU,” which is rather bold.

The official game page on Steam (linked above) doesn’t mention quantum computing, but perhaps it hasn’t been updated with details from this Gamescom announcement, or kept up-to-date with the game development process. A little bit of investigation reveals that C.L.A.Y.’s development seems to have spanned at least six years so far. We’ve been emailed a fuller statement about MiTale’s exploration of quantum games, and there is some more public information about MiTale’s IBM Quantum collaborations on the game’s Gamescom 2026 press kit.

MiTale has been exploring quantum games since 2019. Its work in the games development field has included connecting quantum systems with familiar development environments, including Unity, Unreal Engine, Godot, and the Ink narrative system. However, it has a longer-term goal of integrating real quantum hardware into game development. It hopes to enhance the player-centered design this way, as well as to provide truly unique real-time adjusting experiences in every gaming session.

Back to C.L.A.Y., this game has leveraged IBM Quantum tech to help MiTale developers generate maps, characters, and graphic simulations. It also hints that using real quantum hardware in PCs could become the new normal, one day. Discrete or integrated quantum accelerators could “accelerate complex tasks in a manner similar to a GPU.” Certainly it wouldn’t be more of a waste of silicon than the NPUs in my current AMD Ryzen AI and Intel Core Ultra PC systems.

Often quantum computers are pitched as a hifalutin solution “to solve problems that affect all of humanity.” But their touted strengths in complex modeling, optimization, simulation, discovery, and ability to handle vast numbers of variables could also be applied to huge next-gen gaming universes.

Gaming on quantum computers? Quandoom has already been there.

Data centers are unpopular among U.S. citizens right now, with projects facing resistance and moratoriums across the nation. While we’ve seen over a hundred protests against the developments happen simultaneously, researcher Andy Masley wanted to answer one question: what is driving the pushback against these projects? Is it big tech? AI skepticism? Or maybe even China? But after reviewing data from multiple polls, his answer seems quite simple: the “object-level local environmental and economic harms” that have been widely reported in the media.

Multiple data center sites owned and operated by different hyperscalers have found themselves in hot water with the people surrounding them. The biggest issue that caught the attention of the public is the massive amounts of electricity that these developments use, requiring grid operators like PJM Interconnection to expand their infrastructure to service AI data center needs, which costs billions of dollars. Unfortunately, the capital expenditure for these upgrades has typically been passed on equally to all users, with ratepayers seeing price hikes of up to 76% on their utility bills.

It has gotten to the point that President Donald Trump had to make tech giants, AI hyperscalers, utility operators, and state governors sign a “ratepayer protection pledge” so that AI companies “pay their own way” when it comes to their electricity needs. But this move was too little, too late to halt increased electricity costs to the huge swathe of the American population that PJM Interconnection serves. Oregon is the only state, so far, to have passed a law that requires sites using 20MW or more to pay for their own share, with PGE, the state’s largest power provider, hiking data center bills by 30% while also cutting residential costs by 1.3%.

There have also been reports of two data centers in Georgia and another in Wyoming causing water issues in the surrounding neighborhoods. This includes low water pressure due to excessive consumption, a drop in quality with muddy water pouring out of taps, and water discharges that contaminated a city’s reclamation water supply. Aside from those, there are also problems with noise pollution, like the site that generates noise 24/7, as if “someone set up a vacuum, like in your living room,” and air pollution from mobile turbine generators and dedicated natural gas power plants.

All of these are “object-level” concerns, meaning these are specific issues that exist, have happened on other sites, and are directly observable by other people. However, Masley also points out that some of the coverage of these issues was either overblown or only showed the concerns of the residents, without putting them into the context of the actual project and comparing them with other existing data centers in other areas. Because of this, many people have become fearful that the issues found in other developments will automatically apply to the data center being proposed in their community.

Some data center developers also aren't helping to assuage fears. Some are pushing back against moratoriums and bans, and have begun suing local jurisdictions. One town in Pennsylvania listed 43 specific demands that the developer called “too difficult” and pulled out of negotiations before applying again, with the council calling the move an attempt at “approval by tantrum.”

It has become a tradition that every single quarter Nvidia reports record results that outpace all of its quarterly results before that. This Wednesday was no exception as the company posted revenue of $96.2 billion, which was up 106% year-over-year, due to rising demand for its AI hardware. But such results come at a cost, as the company has to invest massively in its future. In the second quarter of its fiscal 2027, Nvidia had to commit to procuring memory worth up to $160 billion, which includes its memory supply pact with SK hynix.

Nearly $100 billion revenue per quarter

For the second quarter of Nvidia's FY2027, which ended on July 26, 2026, the company's GAAP revenue hit a record $96.221 billion, up 18% quarter-over-quarter (QoQ) and 106% compared to the same quarter a year ago. Nvidia's net income totaled $59.688 billion, up 126% year-over-year (YoY), as its gross margin reached 75.0%. Sales of Nvidia's Compute & Networking hardware reached $88.299 billion, up 18% sequentially and 114% YoY, whereas sales of its graphics hardware hit $7.922 billion, up 12% sequentially and 46% year-over-year.

"AI has reached its inflection point," said Jensen Huang, founder and CEO of Nvidia. "AI is doing useful work. Its tokens are productive and profitable. Now, compute is revenue. And demand is accelerating. […] We have a golden age of new AI labs and startups, multiple frontier labs scaling in parallel, a thriving open-model ecosystem and physical AI coming online […]. The AI infrastructure buildout is at full steam. Vera Rubin, now in full production, was built to power exactly this moment."

Nvidia's results were driven by sales of its data center-grade AI hardware as various customers bought $89.023 billion worth of equipment, an increase of 18% sequentially and a rise of 117% compared to the same quarter a year ago. Hyperscalers purchased $48.710 billion worth of hardware from Nvidia (up 102% YoY and 13% QoQ), while revenue from AI Clouds, Industrial and Enterprise climbed to $40.313 billion (up 138% YoY and 25% QoQ), an indicator that while hyperscalers still purchase more equipment from Nvidia, the ACIE segment is growing faster. Sales of Nvidia's Edge Computing products were $7.198 billion (up 27% YoY and 13% QoQ), which means that sales of graphics products for PCs were strong despite shortages of GPUs and memory.

Commitments total $279 billion

Nvidia expects demand for its products to remain strong in the coming years. To meet that demand, the company increased its long-term purchase commitments from $119 billion in Q1 FY2027 to $279 billion in the second quarter. Typically, Nvidia's long-term supply commitments included pre-payments and commitments for wafer processing and advanced packaging at TSMC, as well as for HBM memory made by DRAM makers. This time around, Nvidia explicitly says that the bulk of the commitments are 'primarily related to the procurement of memory.'

Such huge commitments indicate that the company projects massive demand for its data center AI products in the coming years. During the conference call with financial analysts and investors, it indicated that its customer forecasts point to doubling demand next year, but Nvidia currently believes its supply chain can support about 70% growth.

"Even though our demand is much greater than 70%, our supply allows us to confidently deliver 70%," Huang said. "The unconstrained would be a lot, a lot higher. […] We have secured a lot of supply, but we just need a lot more."

To that end, the $279 billion supply commitment should be interpreted as not a precautionary inventory-building, but a strategic move to ensure shipment growth. Nvidia is effectively reserving memory and other capacity because it expects demand to exceed what the supply chain can deliver through at least the end of FY2028, as its management explicitly says supply will remain a bottleneck at least through FY2028.

$108 billion per quarter envisioned in Q3

For the third quarter of FY2027, Nvidia expects revenue of approximately $108 billion, ± 2%, with no data center compute revenue from China included in its outlook due to uncertainties with export and import licenses. The company projects a GAAP gross margin of around 74% and expects GAAP operating expenses of approximately $9.2 billion.

Groq's former chief architect stood on stage at Hot Chips 2026 and presented his former company's inference chip as Nvidia silicon. Igor Arsovski, now Nvidia's VP of hardware, presented the Groq 3 LPX rack's architecture and published the first third-party benchmark of the hardware: Artificial Analysis measured it at 3,431 output tokens per second on a 100K-context Gemma 4 31B reasoning workload, roughly four times the 870 tokens per second of the next-fastest public endpoint. Arsovski said the rack is already in production, built on the LP30 chip Nvidia obtained through its $20 billion Groq deal in December 2025, the same deal that pushed the Rubin CPX it replaced off Nvidia's roadmap.

SRAM without HBM

Artificial Analysis ran the comparison on a private, pre-release Gemma 4 31B endpoint served through Google Cloud, taking the median of 50 sequential client requests at a concurrency of one, while the public providers it measured against ran shared production serverless endpoints. Serving one request at a time produces the highest per-user token rate the hardware can post, and it's not directly comparable to the multi-tenant conditions the other endpoints run under.

Nvidia's on-stage demo showed a higher figure still, 10,996 tokens per second on the same 31B model, which Igor Arsovski, Nvidia's VP of hardware, flagged on stage as "self-reported" before telling the audience the aim was "third-party verified independent benchmarks that you guys can trust." Gemma 4 31B is also a dense model small enough to sit inside a single LPX rack, and the picture at trillion-parameter mixture-of-experts scale, where memory capacity becomes the main constraint, went unaddressed.

Each LP30 carries roughly 500MB of on-die SRAM and no HBM, so a full LPX rack of 256 chips holds 128GB of memory delivering 40 PB/s of aggregate bandwidth against 315 PFLOPS of FP8 compute, with 350 ns of chip-to-chip latency in a Vera Rubin-compatible, MGX liquid-cooled rack that scales past 1,000 LPUs.

Keeping model weights resident in SRAM rather than streaming them from HBM removes the memory-access latency that dominates single-token decode, and the design drops caches, branch prediction, and out-of-order execution in favor of a fully deterministic pipeline that the compiler schedules at clock-cycle granularity. The architecture descends directly from the Tensor Streaming Processor that Groq, founded by ex-Google TPU engineer Jonathan Ross, described in a 2020 ISCA paper titled Think Fast, the same title Arsovski and Raghavan reused at Hot Chips.

A Rubin GPU carries 288GB of HBM4, roughly 576 times the memory of a single LP30, so a 31-billion-parameter model at FP8 needs on the order of 62 LPUs to hold its weights, and a large mixture-of-experts model runs into four figures of chips across several racks. Capacity is the cost of the SRAM-only design, and it's why Nvidia is describing the LPU as for decode rather than as a general-purpose replacement for its GPUs.

Determinism lets the compiler predict power draw cycle by cycle, which Nvidia uses to pre-order current from the rack's regulators ahead of demand, cutting voltage droop by more than 60% and overshoot by more than 70% against an uncompensated load. The same per-block scheduling lets the hardware equalize heat instead of throttling to the hottest tile, which Arsovski put at roughly 10% to 11% additional performance under a fixed thermal limit. "By doing this, we can actually get more utilization of the chip under the same thermal limit, basically. So we can actually get, again, about 10 to 11% more performance under the same thermal limit. So this is another benefit of deterministic execution."

Across racks, Nvidia synchronizes chips to a single virtual clock in what it calls a plesiosynchronous network, with each chip acting as both processor and router so the fabric needs no adaptive routing or congestion sensing, and clock drift between chips is compensated at the chip-to-chip links. Asked during Q&A about the blast radius of a chip that fails mid-workload, Arsovski said users "would experience the exact same as any other hardware in the industry" and would "just checkpoint it or reconfigure the hardware."

Splitting inference with Rubin

Nvidia is pitching the LPX rack as a decode co-processor bolted onto Vera Rubin NVL72, with Rubin GPUs handling the compute-heavy prefill phase and building the KV cache while the LPUs generate output tokens. Nvidia showed three ways to divide the work: disaggregated prefill and decode; attention-FFN disaggregation, which keeps attention and its cache on GPU HBM while the LPU runs the feed-forward layers; and external-draft speculative decoding, where a small model on the LPU proposes tokens that the GPU verifies in parallel, with only draft tokens crossing the link.

An FPGA bridges the synchronous LPU domain and the asynchronous world of host I/O and GPU hand-offs, and Nvidia's Dynamo runtime, together with an LPU extension to CUDA, orchestrates the split. The company put the gains from these modes at roughly three-to-five-times over Rubin alone on a two-trillion-parameter workload with a 400K-token cached context, all Nvidia-measured.

Cerebras CS4

Cerebras used the same Hot Chips session to present its CS4 wafer-scale system, which chief system architect Jean-Philippe Fricker said runs up to 30 times faster than GPUs and doubles the token rate of the CS3 while carrying 10 times the token capacity. Each CS4 rack packs three wafer-scale engines into a new modular platform Cerebras calls Nexus, built around pluggable compute "backpacks" that separate power, compute, and I/O, and Fricker put its memory bandwidth at 43 PB/s, which he told the audience was "2,000 times higher memory bandwidth than Nvidia's next-generation Rubin chip." Cerebras also has a partner for the prefill side of the same problem: it agreed in July to pair AMD Helios GPUs for prefill with its wafer-scale engines for decode, the same division of labor Nvidia now builds in-house with Groq.

Nvidia pulled the Rubin CPX, its own GDDR7-based long-context accelerator, to focus on shipping the LPU this year, a decision VP Ian Buck laid out at GTC 2026. The $20 billion deal that produced the LP30 was structured as a non-exclusive IP license plus the hiring of Ross, president Sunny Madra, and most of Groq's engineers, a form that avoided a formal merger review. Arsovski opened the Hot Chips talk by calling it "a pinch me moment for the Groq team that's now integrated into the Nvidia group."

Senators Elizabeth Warren and Richard Blumenthal wrote to the FTC and to Nvidia in early 2026, arguing the arrangement acquired Groq "in all but name," and no formal, deal-specific investigation has been confirmed as of late August.

Full Nvidia Groq Hot Chips 2026 presentation

The U.S. Department of Justice and FBI revealed in a statement Wednesday that it had seized domains related to platforms that it claims were operated by China state-sponsored hackers. The press release says the Federal Reserve, Department of Energy, Department of Justice, Department of Health and Human Services, NIH, NASA, and U.S. Senate all experienced "computer intrusion activity."

The Justice Department says a state-sponsored group known as QTFY is responsible for the intrusion, which the U.S. government claims came to be through two pieces of malware: QTRouter and QScan. The release says the People's Republic of China (PRC) Ministry of State Security was among QTFY's paying customers.

According to the U.S. government, QScan "scans and automatically infects thousands of [IoT] devices worldwide." Those devices are then added to the QTRouter network. It's a botnet, but the Justice Department also calls it an "obfuscation layer" to mask the origin of malicious traffic. QTFY's system has been used to compromise U.S. critical infrastructure since 2018, according to the affidavit.

The group is said to be employed by the Nanjing Xinjiuwei Network Technology Company, which we were unable to find any information on.

As part of the action, the Justice Department seized three domains: qtproxy.xyz, qt-proxy.org, and qt-team.com. Those domains now show the seizure notice you can see below.

The investigation into the group began as early as 2019, when the FBI looked into a system intrusion at NASA related to the CVE-2019-11510, which was subsequently patched. The FBI traced the activity back to two Gmail accounts and a phone number with a +86 country code (the code for the PRC).

The group allegedly rented infrastructure from commercial platforms, leading to a series of abuse complaints to the emails by hosting provider Hostwinds. The FBI says the group obtained the three domains it seized between 2022 and 2024, registering them with domain registrar Namecheap and paying through PayPal.

Although the PRC routinely denies hacking activities in the U.S., Chinese officials reportedly acknowledged that the government was behind a series of attacks on U.S. infrastructure late last year. In 2024, 30-year-old wiretap systems deployed by the U.S. government in telecom and internet providers were reportedly compromised by Chinese attackers.

Lux Claridge, the teacher who was arrested in Emporia, Kansas, during an AI data center meeting for clapping, said that the city has dropped the charges against them. According to 404 Media, the Emporia assistant city attorney told Claridge’s lawyer that the case has been dismissed without prejudice in municipal court because of conflicts on the matter. Unfortunately, that doesn’t mean that they’re in the clear yet, as the case has been bumped to the County Attorney’s office for further review.

“Today, I was informed by my attorney that the city has dropped my charges and has passed my information along to the county,” Claridge told the publication. “As far as I know, I’m in the clear unless the county is feeling froggy.” This series of unfortunate events started when the teacher politely clapped five times after a speaker gave their comments against the proposed data center in the city. It seems that the city’s commissioners had warned against clapping and other reactions beforehand, saying that it was disruptive. So, when they clapped, someone from the crowd, presumably someone with authority, asked a police officer to take the next person who claps outside of the venue.

This was when several cops approached Claridge, who asked them to leave, but they stood firm, saying, “I have a right to speak.” When the authorities insisted that they go, they just said, “Drag me out,” after which the four officers cuffed the individual, physically lifted them, and hauled them off to the Lyon County Jail. They were finally let out after eight hours, after which they were charged with disorderly conduct and interfering with a law enforcement officer.

After this incident, the city canceled the public meetings set for August 5 and August 19, 2026, and moved them online. The city said that commissioners were receiving death threats from external sources and that it’s taking the measure to protect the safety of its officials and the public. However, it also didn’t allow public comments, which some are questioning, although it did tell citizens that they can phone in their concerns instead. Nevertheless, the city will return to in-person meetings soon, and it will also open public comments once more, with Claridge quoting Emporia mayor Becky Smith saying that she’s “willing to give us another shot to act like grown-ups.” Emporia is expected to put the data center ban to a vote in November via public ballot. However, it also said that even if the people approve the proposed ordinance, it can only take effect after it has been ruled that the petition is deemed legal in the first place.

For as much as we might discuss the performance of an individual CPU, GPU, or other chip in a rack-scale AI system, the ultimate constraint on the performance of those chips is the amount of power one can get to the building and into each of the racks that contain them. The management and allocation of that power is a major concern for maximum productivity from a data center installation going forward.

During Nvidia's Hot Chips presentation on the Rubin GPU, the company emphasized this hard limit on data center capacity and touted the amount of compute that Vera Rubin NVL72 systems can deliver within an example fixed facility power budget of 100MW.

Nvidia says that the use of all of Vera Rubin’s power management technologies, in tandem with its DSX MaxLPS (Land, Power, Shell) suite of design and site-level dynamic power management resources, will allow operators to provision installations of 40,000 of those next-gen chips GPUs (or about 40 Rubin DGX SuperPODs) within that 100MW budget, and expects that hardware to deliver up to 2 zettaFLOPS (ZFLOPS) for NVFP4 inference and up to 1.4 ZFLOPS for NVFP4 training.

Doing some back-of-the-napkin math for ourselves from publicly available Rubin specs, we feel safe in assuming that those performance figures are estimated, not measured. The maximum number of achievable FLOPS from real-life workloads is likely to be significantly lower for a host of reasons.

But the overall point still stands: getting the most compute out of precious power budgets when planning the AI data centers of the future is going to require more refined planning, monitoring, and facility management than simply applying the coarse measure of estimated peak power draw for every electrical component in the facility. And Nvidia has those building blocks ready for data center constructors in the form of its DSX toolkit.

According to a companion blog post that Nvidia shared, as data center operators provisioned their facilities in the past, many of the assumptions they made around power usage focused on those fixed, worst-case power peaks per rack, potentially leading to inflated power budgets that end up stranding power allocation in racks that will rarely, if ever, use all of it.

In just one example, if there was an application load differential between racks in a cluster such that one system would benefit from having more power sent its way in that moment, it couldn’t be re-routed under a static provisioning scheme. The less-utilized rack would use less of its allocated power budget, and the more heavily loaded one might still run into the limits of an overly conservative guard band.

The DSX MaxLPS approach is meant to overcome the limitations of static power provisioning by instead applying an intelligent, dynamic scheme that is continuously aware of power usage at the chip level, rack level, and groups-of-racks level. Where unused power is available due to workload characteristics or idle capacity, Nvidia's Dynamic Power Software control loop can find and redistribute that energy to systems where it's most needed in the moment, maximizing the number of systems that can be installed and performance per watt from the facility over time.

In Nvidia's measured example of current GB300 racks, within a 540kW power budget and with static provisioning, an operator might be able to install four 135kW systems by statically provisioning for peaks rather than measured values from workloads. But in practice, as much as 170kW of that power budget might sit unused due to differences in rack utilization.

For modern rack-scale systems like Nvidia’s NVL72s, that’s an entire rack and change that could safely be installed within the same power budget, and indeed, that’s just what the company’s example shows. And across those five systems, the amount of reserve power allocated for peaks can be much lower.

At the rack level, DSX MaxLPS offers further flexibility through workload-specific power profiles. Much like the quiet, balanced, and high-performance power modes that client PC users are familiar with, Nvidia has produced rack-level power profiles that can be assigned to systems performing example workloads like inference, training, and more general memory-bound or compute-bound tasks.

As we noted, Nvidia didn’t share measured Rubin power or performance-per-watt results, but it has characterized the benefits of MaxLPS for prior-generation systems running inference workloads to prove the concept.

For a Grace Blackwell GB300 system running DeepSeek-R1, Nvidia says the past fixed-peak regime would have assumed a 1400W GPU TGP and an estimated rack power of 136kW. Applying MaxLPS, however, the typical GPU TGP under this workload falls to 1000W, and the total rack power falls to 101kW, all without affecting delivered performance.

That less conservative envelope translates directly into higher performance per watt, larger numbers of racks that can be installed within the same facility, and ultimately more tokens that can produce revenue for the data center operator or its tenants.

Nvidia further notes that designing a data center with MaxLPS from the start grants an operator greater flexibility over the life of the installation. For example, if a site starts as a training-focused facility outfitted with cutting-edge hardware, each installed system is likely to need a greater share of the available site power for that more intense workload, and so an operator might not want to populate every available floor space for those racks from the get-go.

But later in the life cycle, as training shifts to new generations of hardware and older systems transition into inference roles, the power demands of each GPU and rack will fall, and so a facility with dynamic power provisioning would be able to free up capacity that can then be used to install more hardware within the same facility and to generate more profitable tokens.

Another major component of MaxLPS in data centers deploying Vera Rubin hardware is the use of higher liquid coolant temperatures for the exclusively liquid-cooled Rubin NVL72 racks. Those systems are designed to work with 45 °C inlet coolant temperatures, much higher than for past liquid-cooled systems. We learned more about this “dry cooling” approach during our visit to Nvidia’s Vera Rubin proving grounds earlier this year.

The use of this higher coolant temperature for Rubin installations is important because the mechanical chillers used to shed waste heat in non-evaporative systems also consume a large portion of the site power budget – as much as 40% for past installations, Nvidia says. As with static provisioning for servers, the company notes that those chillers have traditionally been sized for the worst-case scenario that a facility might face, even if they’re operating well below that capacity for much of the year.

Again, this approach strands power that could be dynamically reallocated to compute given the proper operating conditions and site-level monitoring and management. Those chillers might still need to run during the hottest parts of the year, but outside of those conditions, the higher coolant temperature generally enables more power to be put to productive use, improving a site’s power usage effectiveness (PUE) figure, all else equal.

Power for AI data centers, whether generated by public utilities or behind the meter using alternative power sources, is expected to remain one of the most critical constraints for those facilities for the foreseeable future, and we heard that concern from multiple presenters during Hot Chips.

Nvidia’s DSX MaxLPS approach looks ready to provide the building blocks needed for dynamic allocation of that resource to extract the maximum possible performance per watt from Rubin facilities, and it reflects a comprehensive concern for the interplay of power and achievable performance that only seems likely to grow in importance going forward.

A Nevada court has found a Las Vegas businessman guilty of 11 counts of wire fraud, two counts of mail fraud, and two counts of money laundering for defrauding over $24 million from hundreds of investors. According to the U.S. Attorney’s Office, Brent Kovar presented Profit Connect to investors as a crypto mining operation that used an artificial intelligence supercomputer for its operations. He promised a fixed rate of return that paid 15% to 30% APR and also came with a 100% money-back guarantee. However, it turned out that the “profits” that the earlier investors made only came from the influx of newer investors, and that the company wasn’t making any money.

Kovar victimized 400 investors, telling them that the company had cryptocurrency reserves worth hundreds of millions of dollars. In reality, it had zero holdings, couldn’t afford to pay investors their interest earnings, and had no way to return their cash despite the offered guarantee. “He used investor money to operate Profit Connect, to buy gifts for employees, to buy a house for himself, and to repay investors as if those repayments came from mining cryptocurrency and verifying cryptocurrency transactions,” the Department of Justice said in its press release.

Profit Connect operated from 2017 to 2021, which is around the same time that Bitcoin made its first major rally, with the cryptocurrency hitting a peak of over $19,000 in December of that year. This, combined with the buzzwords of “AI” and “supercomputer,” made it seem to investors that they were putting money in a groundbreaking new technology that would change the way we do finance. Unfortunately, the venture turned out to be a scam and defrauded investors out of their money with nothing to show for. It’s unclear if the funds that the investors lost will ever be recovered, but Kovar is facing a possibly lengthy jail time of a maximum of 280 years for his crimes.

Another scam rooted in cryptocurrency investment from 2017 saw retail investors lose $2 billion. BitConnect offered a similar guaranteed return on investment for anyone who put up cash on its platform until 2018, but instead of using the deposited money for trading, it was just siphoned off to the organization’s private digital wallet addresses. Even before this, another Ponzi-scheme scammer made off with $6 billion from her victims in China from 2014 until 2017 and converted it into 61,000 Bitcoin. While she has already been arrested, the seized cryptocurrency is still in limbo, so it’s unclear if and when her victims will get their money back.

d-Matrix presented Raptor, which it calls the first 3D DRAM accelerator for generative inference, at Hot Chips 2026 this week, showing a TSMC 4nm compute die bonded face-to-face at a 36-micron pitch on top of a custom-designed DRAM die that delivers 100 TB/s of bandwidth from 32GB per card.

Co-founder and CTO Sudeep Bhoja put the vertical interface's energy cost at 0.37 pJ/bit against roughly 2.4 pJ/bit for moving data into an HBM4 base die, calling it "a measured number" from working silicon, and the accompanying ISCA 2026 paper, written with the University of British Columbia, projects around 4.7 times higher throughput per card than HBM-based designs. Bhoja, however, didn't disclose who manufactures the DRAM die.

CEO Sid Sheth told CNBC in June that Raptor is slated to launch in 2027, but at Hot Chips the company gave no firm date or information on volume and pricing, and every performance figure shown, including 988 tokens per second per user on the 2.8-trillion-parameter Kimi K3 model at 1M-token context, is a d-Matrix projection built on early silicon.

The custom DRAM die

Raptor inverts the usual 3D stacking arrangement by putting the logic die on top and the DRAM underneath, so a cold plate sits directly on the compute silicon and the DRAM die doubles as the interposer, carrying PCIe and die-to-die signals down through its TSVs. "For the same amount of power, you can drive the bandwidth up," Bhoja said during the session, "and so we were able to drive the bandwidth up here to 100 terabytes per second."

The one-high stack achieves a power density of roughly 0.5W per square millimeter, which liquid cooling can handle, but the DRAM is designed for a junction temperature of 105°C, where retention collapses from a standard 32ms to 4ms, and the memory must refresh eight times more often. d-Matrix absorbed that penalty by shrinking each microbank to 1,366 rows and about 5.33MB, so a full refresh sweep costs only 1.37% of overall bandwidth.

The die carries 840 banks per chiplet, of which 72 (around 9%) are spares wired into a two-level mux chain the company calls bank chaining, letting any two failed banks anywhere on the die be switched out while channels stay symmetric. A [132,128] Reed-Solomon code on the logic die corrects two symbol errors per 128 bytes, with a CRC behind it. The interface has no PHY, no burst structure, and no sideband pins, so conventional data-bus inversion was impossible; d-Matrix instead compares each 128-byte flit to the previous one and stores a 1-bit inversion tag alongside the ECC metadata, recovering roughly 20% of the I/O power DBI would have saved. At full tilt, the vertical interface still burns 296W of the 422W per-package budget the ISCA paper discloses.

The bank geometry, spare-bank mux tree, refresh behavior, and interleaved ECC columns were all co-designed with the compute die. The 0.37 pJ/bit figure exists only because of that pairing, and no memory maker has anything like this die in its catalog.

Who's supplying it?

d-Matrix has named TSMC for the N4P logic die and Alchip as its ASIC design and 2.5D/3D packaging partner, but neither company operates a DRAM fab, and across the Hot Chips talk, the ISCA paper, and every public announcement since the Pavehawk 3DIMC test silicon came online last September, the firm has never identified who fabricates its custom DRAM. Only three companies make leading-edge DRAM at volume, and all three are allocating capacity to HBM4 lines that are effectively sold out through 2026.

J.P. Morgan estimates DRAM prices will have risen more than 400% between the start of 2024 and the end of 2026. In addition, analysts have recorded contract price increases of 90% to 95% in Q1 2026 alone, and SK hynix CEO Kwak Noh-jung told Reuters in July that "customer demand will remain higher than our supply capacity even beyond 2030."

Nvidia, the memory makers' largest and most leveraged customer, is reportedly testing Rubin Ultra configurations with as little as 192GB because it may not be able to source enough HBM4E. A startup with roughly $450 million raised, asking a memory maker to run a bespoke die with non-standard bank geometry on capacity that could otherwise print HBM, is negotiating from a far weaker position than that, and until the supplier is named, Raptor's 2027 volume plan rests entirely on an unknown, undisclosed dependency.

The die's 11.4 MB/mm² density is roughly half of HBM4's 21.9 to 26.3 MB/mm², Bhoja acknowledged during the Q&A: "A lot of the drop for us was also because we used a not-so-advanced DRAM. And so if we used a more mainline DRAM, just like the HBM4 guys are doing, we would be able to push that up almost all the way to the HBM4 numbers." The density penalty therefore tracks back to whatever foundry arrangement d-Matrix currently has.

32GB per card

Raptor's 32GB per card stands against 192GB to 288GB for HBM4-equipped accelerators, so d-Matrix sizes deployments at rack scale instead: 72 cards carry 2.3TB, enough to hold Kimi K3's weights at 4-bit precision with headroom for around 54 concurrent users at 1M context, by its own calculations. "Even with 32 gigabytes of memory capacity, we are able to solve SOTA models in a scale-up network, so no bits are wasted," Bhoja said.

KV cache growth works against that arithmetic over time, and co-presenter Aayush Ankit, who led Raptor's SoC architecture at d-Matrix before joining Meta's MTIA team, explained the failure mode while dismissing SRAM alternatives: "We are making this unit of compute blazingly fast. Communication becomes a bottleneck soon enough." Once models and context no longer fit a single rack, inference spills into the inter-card synchronization overhead that the vertical bandwidth was meant to eliminate, which the ISCA paper concedes.

Cerebras claimed 969 tokens per second on Llama 3.1 405B in November 2024, with third-party firm Artificial Analysis verifying the figure on live hardware, and that remains the closest published reference point for Raptor's numbers. d-Matrix's 988 tokens per second per user on a model seven times larger would be a step change if it holds water, but no third party has measured Raptor, and the comparison points in the ISCA paper are simulations anchored to early silicon characterization.

Asked by an Nvidia employee about multi-layer stacking plans, Bhoja said: "Our roadmap is still a work in progress, and we have a hard enough time trying to get one-high to work and work around all of the thermal issues of that." Samsung brought its own version of the idea to Hot Chips with zHBM, a concept that stacks HBM directly on the processor and carries a claimed 70% power-efficiency gain over an HBM4E setup, with no production timeline before HBM5. The problem for d-Matrix is that Samsung runs its own DRAM fabs; d-Matrix doesn't. Whether it can get wafers at volume remains to be seen.

Full d-Matrix Hot Chips 2026 presentation

While the unprecedented pace of development of artificial intelligence and its impact on human society is being discussed widely among academic circles, Bill Gates says that nations and governments are not doing enough to prepare their citizens for the upcoming upheaval this technology will deliver. The billionaire said in the GatesNotes blog that the world needs a plan to face the changes that AI will bring, proposing measures including reserving jobs for humans and taxing AI tokens. While other experts and academics equate it with other technologies like computers and the internet, Gates argues that people had decades to get used to the latter and incorporate it in processes and workflows, while the former is already widely available today.

Because of this, he pointed out that people today are facing risks brought about by AI, such as job loss, the use of the tool by bad actors, and the replacement of genuine human relationships, especially among children. Gates said that he will focus on other issues in later posts but dived into the issues of job security and income taxes in his commentary. He said that entry-level jobs have fallen significantly, making it harder for fresh graduates to gain experience and increase their skills. The former Microsoft chairperson acknowledged that society needs time to make adjustments but also pointed out that it might be too late for some unless there is some kind of intervention. “The people who need the most time are the ones who have the least — the accounting worker who’s replaced by a bot or the $20-an-hour worker who loses their job to a $10-an-hour robot,” Gates wrote.

Gates said that as AI and robots improve and replace humans in different tasks, some jobs should be marked as “Human Reserved.” He likened the term to nature reserves, places that people could have developed but didn’t “because the loss would be too great.” These jobs don’t have to be static positions that will stay the same for the rest of time but could be a slow evolution where AI tools are slowly introduced across years and decades. This is particularly important for industries whose practitioners would be displaced by AI and wouldn’t be able to pivot to other skills, citing a 55-year-old who has worked in construction their whole life and is not able to transition to the health industry as an example. He also mentioned that some jobs will never be fully taken over by AI as they require some form of human touch, like education and healthcare.

The billionaire philanthropist also noted that the reduction of human employees would also equate to a reduction in the individual income taxes that governments collect. The U.S. Treasury said that more than half of the federal revenue came from individual income taxes in 2025 and 2026, meaning falling employment would also make a huge impact on the government’s coffers. The current tax setup encourages executives to replace people with robots, which are often tax-deductible expenses. He instead suggested that the government should tax AI tokens and robots — aside from helping the federal balance sheet, it will also motivate businesses to prioritize hiring and keeping people instead of buying machines.

Artificial intelligence is indeed a technological marvel, but it also comes with several risks that must be addressed head-on. Bill Gates says that the debate around AI, its use, and its impact on us should be discussed widely among workers, students, community leaders, religious leaders, parents, educators, and more, not just the few who control it.

Developer Xusheng Li has uncovered some previously unknown functionality deep within Microsoft’s Paint and Photos apps. The findings concern GUID watermarks. While these programs clearly add Copilot logo watermarks to images where LLM image generation has played a part in the process, Li also uncovered an invisible watermark and the process behind embedding it. To be clear, both these watermarks are merely to identify/verify imagery where AI has had a role in the creation, so GUID should not be confused with the recent controversies over Microsoft’s GDID traceable device-specific telemetry.

Li says that simple curiosity spurred him to investigate the AI features of the Paint app in Windows 11. The image generation functionality being capable of calling a remote API was expected. However, the dev got more curious when four apparent model files were found in the app path for local processing. Specifically, one of the local files was an ONNX-like model, the other 3 were encrypted ONNX-like files…

With all four files unencrypted and open to probing, investigations led to watermarker.dll being uncovered. Initially, Li thought it was just for visible watermarking tooling, leaving a Copilot logo on the bottom right of the image. It calls the AddPerceptibleWatermark function to do this. However, with curiosity stoked by the DLL file’s larger-than-expected size, the dev decided to ask AI to analyze the file. The AI found there was also a function to embed an invisible watermark.

The invisible watermarking function is called WmkWriteWatermark. Microsoft’s embedding process basically insists on this invisible watermark in its Stable Diffusion image generation output. If WmkWriteWatermark fails for any reason, the generation process will result in an error.

Coalition for Content Provenance and Authenticity (C2PA) credentials

Li provides some further technical insight into the hidden watermark. Most strikingly, he asserts that the watermarking information mixes a server-issued GUID into the pixels. That isn’t the end of the identifying data bundling. “Paint does more than alter the pixels,” notes the dev. “It also attaches C2PA Content Credentials to the saved file. The code responsible for this lives in ProvenanceHelper.dll, backed by provenancesdk.dll.”

In conclusion, even on devices where local image generation occurs, the prompt is still sent to Microsoft servers for moderation, says Li. Moreover, the dev indicates this watermarking is mandatory, and if the process fails, Paint will abort the entire image generation process. In Photos, there is the same GUID mechanism in place when AI is used, but it will still return the image and just log an error if the watermarking process has issues.

It is thought that all this hidden processing “might be related to Article 50 of the EU AI Act, whose transparency rules took effect on August 2, 2026, and require AI-generated content to carry a detectable, machine-readable mark—but not a prompt-specific GUID.”

The U.S. government is looking to move a critical transparency step in the approval of data centers behind closed doors. The Environmental Protection Agency (EPA) has plans to remove a requirement that forces states to seek public feedback on applications for air pollution permits, as reported by The New York Times. The change, if it goes into effect, would apply to a subset of air pollution permits. However, the primary concern is around data centers, as local communities seek to delay, or outright ban, AI data center construction.

The latest proposal applies to permits for a "minor source" of air pollution, which includes landfills, laundromats, steel mills, and, of course, data centers. However, recent analysis of the expansion of AI data centers suggests that environmental impact is growing. The Harvard School of Public Health estimated that the Vantage data center in Loudoun County, Virginia, contributed between $53 million and $99 million in annual health damages, the largest estimate for any single facility ever.

In another example, the analysis conducted by researcher Michael Cork directly influenced a proposal in Fluvanna County, Virginia, to expand a fossil fuel plant. The expansion was ultimately denied based on the findings from the analysis that "shaped the public discussion leading up to the... vote."

The proposal from the EPA would remove, or at least create the opportunity for states to remove, the public discussion that shapes these decisions. The EPA's stance has been that these minor sources don't require federal oversight. However, there's a clear gap when a federal agency decides to stop enforcing federal rules and asks states to step in to make their own decisions.

The Attorneys General from 14 states and three cities signed an open letter opposing the change, writing, "despite the name, even 'minor' sources can pose significant health and environmental impacts." The letter suggests that removing the required publicization of permit applications and 30-day comment period "sidelines these fundamental transparency and democratic safeguards in the name of administrative expediency and relieving regulatory burdens, particularly for accelerating the buildout of data centers and other artificial intelligence (AI) infrastructure."

Although the EPA requires a public comment period after an air pollution permit application, the process has been circumvented in some cases.

In Gilroy, California, an Amazon data center began construction last month without the knowledge of many residents. A years-long approval process between the city and Amazon meant the public comment period had lapsed two years before construction began, leaving the public little time to react. In another case, residents of Festus, Missouri sued the city, arguing that it didn't give the public enough time to review a data center proposal before moving forward with it.

With the EPA's proposed change, responsibility for regulating data centers is placed on the states. Current environmental law allows states to impose stricter environmental standards than the federal minimum, provided the state does not fall below it. The EPA change would allow a state to eliminate the public comment period, since it's not required by federal law.

Currently, a public comment period is still required. The proposed change would go into effect within the next year.

A fake Israeli think tank credited migration-policy research to an Australian professor of food science, ran a "sovereignty index" that scored Russia above the countries criticizing its war, and filled its site with academic papers lifted from their real authors. OpenAI banned the cluster of ChatGPT accounts behind it on August 25, tracing the operation back to Russia, where operators used VPNs to reach models blocked in the country and drafted mostly English-language posts promoting the outlet across Substack, Telegram, X, Facebook, and LinkedIn. Of 36 articles OpenAI sampled from the International Burke Institute, as the outlet called itself, 34 were copied from real academics, some misattributed to figures including Francis Fukuyama and Noam Chomsky.

OpenAI says that the operators used ChatGPT to write the posts and replies that directed audiences towards the IBI website, which was registered in February last year, while the articles, the country reports, and the index itself weren't produced with OpenAI's models.

Instead of using ChatGPT to write the articles, the operators used the chatbot to strip any wording that might mark them as Russian speakers, yet the non-AI material carried obvious tells. One IBI article referred to Germany's traffic-light coalition as "the Svetofor coalition," a literal rendering of the Russian word for traffic light that no English or German writer would use. A profile that OpenAI tied to the operation described a U.S.-focused Telegram channel as offering "a totally unhackneyed perspective."

This is OpenAI's sixth public threat report since it began making disclosures in early 2024. Since then, its Intelligence & Investigations team says it has disrupted more than 40 malicious networks. Similar findings recur across all of them, with operators bolting AI onto existing workflows for efficiency and distribution, not content generation.

OpenAI placed this campaign at the lower end of Category Three on the Brookings Breakout Scale — a six-category model that measures the real-time impact and spread of disinformation campaigns — with individual posts drawing low view counts and the operation's Telegram channels running between 10,000 and 20,000 followers each.

OpenAI ran the same enforcement against China-linked clusters in June, when it banned accounts behind the "Data Center Bandwagon" campaign that amplified U.S. data center electricity backlash. The ban lands on operators who were already reaching OpenAI's models via VPN, since Russia is blocked from its services, for a campaign that barely reached anyone.

"The significance of the operation lies less in the audience it reached, however, than in the infrastructure it had built," said OpenAI. Anthropic's own AI-capability disclosures drew scrutiny in April, when its claim that Claude Mythos found thousands of severe zero-days proved to rest on 198 manual reviews.

About a month ago, techie Redditor Alternative-Panic69 (Panic) had the idea of acquiring a Radeon 7900 XT with 20 GB of VRAM for LLM use, a significant undertaking in their home country of India. They found one for $550, an excellent deal even by Western standards, and they were off to the races with Qwen and GLM in tow. Panic intended to use this card in a Lenovo M910Q desktop, but the machine wouldn't cooperate, so recently they turned to the next logical thing: a Lenovo Yoga laptop.

As Panic themselves put it, they took the "completely sane decision to perform surgery on [their] laptop." Armed with an ADT-Link PCIe external cable connector wired to the laptop's M.2 slot, a DeepCool PL750D power supply, and some quick bottom-panel removal, they managed to wire everything together in a manner that mostly worked.

With the M.2 slot now unavailable, the first challenge was having somewhere to boot from, a task accomplished by a USB SSD. Getting a picture with the main display hooked into the 7900 XT "worked beautifully", with Furmark doing 500 FPS at 1080p. This arrangement had to go, though, as the display framebuffer(s) were eating into precious VRAM necessary for the models, so the integrated graphics silicon was back to its original assignment.

Panic mused at how "[their] laptop was sitting there looking like it had been converted into a PCIe development board," but ended up having some harsh realizations about trying to wrangle fairly large LLMs (Qwen 35B A3B, GLM-4.7 Flash) exclusively on the GPU, all with a 128K-token context window.

Another Redditor pointed out that was a classical "pick two out of three" situation, and indeed that was the case, as Panic found that ultimately his laptop's memory (or lack thereof) proved to be a serious bottleneck. The large context window needed lots of associated data in RAM, and eventually the available DRAM was exhausted, and the laptop began using swap space, grinding performance to a halt, to the point where the GPU was "being idle, occasionally in bursts."

The story ends in somewhat predictable fashion: as interesting and visually striking this project was, they needed their laptop as an actual mobile device again, so they elected to buy the cheapest AM4 machine they could find to fit the Radeon 7900 XT and the power supply in. As Panic themselves said, "buying an old office tower would have been the sensible solution. I wasn't here to be sensible."

Just over one week after Nvidia agreed to backstop up to $105 billion in financing for its data centers, OpenAI arrived at Hot Chips on Tuesday with benchmarks claiming its first in-house chip beats Nvidia's GB300. Jalapeño, the inference ASIC OpenAI co-developed with Broadcom, delivered 1.5 times to 1.9 times more throughput per kilowatt and 1.7 times to 3.6 times lower end-to-end latency than Nvidia's GB200 and GB300 rack systems on SemiAnalysis's public InferenceX suite, with a 700W part going up against accelerators rated at 1,200W and 1,400W. OpenAI plans to begin deploying the chip in its own data centers later this year.

The tests covered three open models: GPT-OSS 120B, DeepSeek R1 670B, and Moonshot AI's 1-trillion-parameter Kimi K2.5, with OpenAI reporting its widest leads at low-latency operating points, where it claims 8.6 times to 104.3 times more throughput per kilowatt at the GB300's fastest previous time-between-tokens settings.

OpenAI normalized the results to each accelerator's published package TDP, though it said Jalapeño's measured sustained power stayed at or below 550W in testing. An appendix comparison using all-in utility power per accelerator, 1.18kW for Jalapeño against 2.55kW for the GB300, produces narrower gaps, as does pitting Jalapeño against a GB300 running multi-token prediction, where the peak efficiency lead shrinks to roughly 1.5 times.

Jalapeño wasn't tested against Vera Rubin, the Nvidia platform that's slated to power the first gigawatt of Nvidia systems OpenAI agreed to deploy in the second half of 2026. The chip also doesn't train models, the workload where Nvidia's hardware remains unchallenged. In addition, the major comparisons ran Jalapeño's single-token prediction against GB300 configurations doing the same, even though Nvidia deployments commonly use multi-token prediction in production. SemiAnalysis, which said it ran InferenceX with OpenAI engineers in the company's lab, described the part as "beating every Nvidia, AMD, and Google chip we have been able to test."

Each Jalapeño package, unveiled in June after a nine-month RTL-to-tapeout cycle, pairs its compute die with six HBM4 stacks, totaling 216 GiB at 15.4 TB/s. The GB300 carries 288GB of HBM3E at a 1,400W rating, so per watt of rated power, OpenAI's chip packs roughly 50% more memory. The company's Hot Chips presentation states that the main bottleneck its architecture targets is exposing aggregate HBM bandwidth, not adding more of it.

That memory is of course the tightest commodity in the semiconductor industry. Samsung, SK hynix, and Micron have sold their HBM capacity through 2027, a shortage so severe that Nvidia is reportedly testing cut-down Rubin Ultra configurations with as little as 192GB, and SK hynix CEO Kwak Noh-jung has warned that 2027 will be the worst year of the crunch. Micron told the same Hot Chips conference on August 23 that HBM consumes roughly three times the wafer area of DDR5 for equivalent capacity, a penalty that widens with each generation. Scaling Jalapeño across the 10GW deployment agreement that OpenAI signed with Broadcom last October would make the company a substantial new claimant to HBM4 supply, which Nvidia currently dominates through multi-year allocation deals with SK hynix.

A second-generation chip is approaching tapeout, expected within months, according to Bloomberg, and concept work on a third generation is underway. The first part reportedly uses a TSMC 3nm-class process, keeping OpenAI in the same wafer, memory, and advanced packaging queues as Blackwell and Rubin for the foreseeable future.

OpenAI is procuring those inputs while deepening its financial dependence on the company it just benchmarked. On August 17, Nvidia agreed to provide up to $105 billion in financing for an OpenAI-leased data center campus in Ohio. "Nvidia is a really good partner, and we continue to need a lot of Nvidia," Richard Ho, OpenAI's vice president of hardware, told Bloomberg in an interview following the announcement.

China is slowing or restricting shipments of materials based on germanium and quartz to Taiwan, which creates supply constraints for multiple industries on the island, according to Nikkei. Companies are reporting problems obtaining germanium- and quartz-based materials as well as permanent magnets from Chinese suppliers as customs procedures extend delivery times. In some cases, Taiwanese manufacturers lose orders while waiting for clearance.

China imposed export controls on germanium in 2023 and on quartz (SiO₂) in late 2024. At one point, China even restricted exports of gallium and germanium to the U.S., but later lifted the ban and imposed an export control regime. Under the regime, the exporter must disclose the customer and intended use by the end user, which enables Chinese authorities to essentially view, and to some degree, control the whole supply chain. China's Ministry of Commerce can approve, reject, or effectively delay the shipment while reviewing it, which is apparently what it does these days.

The Nikkei story strongly suggests that the delays are selective rather than a blanket slowdown of all germanium, quartz, and magnet exports to Taiwan. Germanium, quartz, and magnets can be used widely across many industries. Yet, the report specifically pins germanium and quartz to optics/photonics and semiconductor manufacturing, and permanent neodymium magnets to the aerospace industry that produces high-performance motors for robotics.

While the report does not determine exactly how granular the targeting is, Nikkei's sources specifically come from optical technology, semiconductor equipment, and aerospace companies. Another thing to note is that all of Nikkei's sources come from Taiwan, indicating that China targets select verticals of the island, not the same verticals globally.

In general, the situation looks less like 'no germanium/quartz/magnets for Taiwan' and more like selective friction applied through China's dual-use export-control regime. The particularly interesting part is that Beijing may not need a Taiwan-specific embargo: by examining the material, buyer, end user, and shipment, authorities can potentially slow strategically sensitive supply chains (think optical connectivity for data centers) while allowing less sensitive trade to continue.

Germanium

Germanium is widely used in infrared optics (Ge), silicon photonics (Ge), photodetectors (Ge), and optical fiber (GeO₂). China controls about 63% of the global germanium — both elemental and dioxide — supply, whereas all other countries — led by Belgium, Canada, and Japan — control 37% of the market, according to InvestInGermanium.com. The U.S. mostly gets germanium and germanium dioxide from Belgium and Canada, according to Introl.com. Meanwhile, Belgium and Japan also import germanium from China, which highlights that the world still largely depends on China when it comes to germanium supply.

While infrared optics is certainly a concern for state security as it is used for night-vision equipment, aerospace sensors, and military systems, it looks like China is more concerned about optical connectivity that is crucial for AI data centers.

In silicon photonics, germanium is mainly used to make photodetectors. Silicon cannot efficiently detect light at the ~1.3 µm and 1.55 µm wavelengths commonly used for optical communications, but germanium can. By integrating germanium with silicon waveguides, manufacturers can build high-speed Ge-on-Si photodiodes that convert optical signals into electrical ones. These detectors are used in optical transceivers and data-center interconnects and could play an important role in co-packaged optics (CPO).

Equally important, germanium dioxide is crucial for optical fiber manufacturing. Adding GeO₂ to silica raises its refractive index and enables manufacturers to form a higher-index fiber core surrounded by lower-index silica cladding in a bid to confine light inside the fiber. Germanium doping also increases silica's photosensitivity, which enables fabrication of fiber Bragg gratings used for wavelength filtering, optical communications, lasers, and sensing.

China's dominant position in germanium gives the country potential leverage over multiple layers of the optical connectivity supply chain, from silicon photonics photodetectors all the way to the optical fiber itself. If restrictions cover the appropriate germanium products and persist long enough, they could increase lead times and constrain production across several optical-interconnect segments simultaneously.

However, none of the optical connectivity applications depend exclusively on China. Germanium can come from non-Chinese producers, recycling, inventories, and alternative supply chains, and not every optical fiber necessarily has the same germanium requirements. In fact, the refractive-index difference can also be engineered with other dopants, eliminating the need for germanium or its dioxide completely. Furthermore, the report states that China is slowing clearances for Taiwanese companies, which does not automatically mean it is slowing down clearances for companies based in other countries. Of course, increasing the lead times for Taiwan-based companies can impact multiple optical initiatives, though the actual effect remains to be seen.

Quartz

China produces large volumes of silica sands and quartz sands for glass, construction, fiber optics, semiconductors, and other industrial uses. Quartz (SiO₂) is used very widely in the semiconductor industry both as a component of chipmaking tools and as the base for silicon wafers. Meanwhile, the Nikkei report does not give enough technical specifications of SiO₂ to determine which applications the restrictions target.

It should be noted that semiconductor wafers require high-purity quartz with no impurities (≥99.99% SiO2), and China is not the leading producer of HPQ, so it can hardly use its exports as leverage. This potentially brings us back to the optical connectivity market.

High-purity fused silica (SiO₂), produced from quartz or synthetic silica feedstocks, is the primary glass material used to make most optical fibers as it combines very low optical loss at telecom wavelengths with excellent thermal and mechanical stability as well as chemical resistance. Both the fiber core and cladding are typically silica-based, but their refractive indices are deliberately made slightly different to keep light confined inside the core. A common approach is to dope the SiO₂ core with germanium dioxide (GeO₂) to raise its refractive index, while the surrounding cladding remains mostly SiO₂ with a lower refractive index.

Meanwhile, optical fiber is commonly produced from synthetic ultra-high-purity silica, not from natural crystalline quartz. Manufacturers typically create the fiber preform by chemical vapor deposition using precursors such as SiCl₄, which is oxidized to form extremely pure SiO₂. Then, dopants like GeO₂ can be used to modify the core's refractive index.

That said, China's quartz restrictions can disrupt parts of the optical-component supply chain, but the Nikkei report does not demonstrate that they threaten optical fiber production itself. In fact, germanium/GeO₂ restrictions could be a more direct concern for Ge-doped fiber cores than quartz in general.

Neodymium

While China holds a dominant share of the neodymium production, it does not export control the rare earth material itself, as its real leverage is in processing and refining. NdFeB (neodymium-iron-boron) permanent magnets are used in a wide range of applications, but high-performance grades for aerospace and robotics often contain terbium or dysprosium to increase coercivity and maintain their magnetic properties at high temperatures. China's export controls do not limit neodymium itself or permanent magnets, but NdFeB permanent magnets or magnetic powders containing terbium or dysprosium.

While permanent magnets can be used in HDDs as well as various pumps or motors used in data centers, these applications do not need permanent magnets containing terbium or dysprosium, so it doesn't seem this regulation has anything to do with AI data centers. Yet, it has a lot to do with emerging applications in the aerospace and robotics realms, so slowing down rivals helps China to establish or maintain its lead, as finding cost-effective alternatives to Chinese permanent magnets is not an easy task. Then again, the report only covers companies from Taiwan, and we have no idea how it impacts companies based elsewhere.

A potential play for leverage

Rather than imposing a blanket ban, Beijing appears to be using its dual-use export-control regime to selectively delay shipments based on materials, customers, and end uses to gain leverage over strategically important industries. The biggest potential impact could be on optical connectivity, where China's dominance in germanium supply gives it influence over both silicon-photonics photodetectors and Ge-doped optical fiber.

However, while the effect of the curbs on Taiwanese industries may be significant, what remains unclear is the impact of China's restrictions on the global market.

A Russian Molniya drone carrying an Nvidia Jetson Orin module crashed and killed three civilians at a gas station in Zaporizhzhia last month after choosing its final target without a human pilot, according to a New York Times investigation that cites Ukrainian air defense commanders, drone experts, and the forensic team that examined the wreckage.

Kateryna Bondar, a senior fellow at the Center for Strategic and International Studies, told the paper it's the first documented case of civilian deaths caused by a Russian drone using fully autonomous targeting. The dead were Tetiana Bubynets, a 19-year-old accounting student, and two men aged 41 and 48.

Human operators launched the drone toward the gas station, per the report, but the final aim point was selected onboard by software trained to recognize objects such as propane tanks. The aircraft failed to clear an apartment building on its approach, struck a wall, and detonated near people sheltering below, rather than striking its chosen target.

The strike drone flew in a group of roughly half a dozen aircraft, none of which emitted radio traffic, Ukrainian air defense officials said. Modules recovered from this attack and from intact test drones carried no encryption, so investigators could examine both the terrain imagery loaded for visual navigation and the code specifying which object classes the drone had been trained to attack. "Machines are making decisions to strike," Col. Serhiy Minaiev, Zaporizhzhia's air defense commander, told the NYT. Russia is understood to have begun AI-guided test flights of the mass-produced, fixed-wing Molniya in May, after months of self-targeting trials with the V2U.

Nvidia confirmed to the New York Times that modules photographed in the recovered drones were Jetson Orin minicomputers, hardware that sells for a few hundred dollars. "Our Jetson Orin modules are consumer-grade products sold to students, developers, and startups for a wide range of beneficial applications," an Nvidia spokesperson told Tom's Hardware. "They are not available in Russia and are not designed for military purposes. Pre-owned Jetsons are available through many reseller channels. Although we cannot track products after they are sold, if we determine that any customer is violating U.S. export controls, we will take appropriate action."

Ukrainian investigators have now linked the Jetson Orin to four Russian weapon families. A teardown by Ukraine's GUR intelligence agency last June found one seated on a Chinese Leetop A603 carrier board inside the V2U loitering munition, in combat use since February 2025. Weeks later, a Ukrainian general said the module powered object recognition in the upgraded Shahed MS001, and earlier this month Ukraine reported the same silicon in the S-71M Monochrome cruise missile. Data-center AI accelerators fall under U.S. export controls; edge modules like the Jetson Orin, with variants starting at $249, don't.

Mykhailo Fedorov, Ukraine's recently ousted defense minister, told the NYT that Kyiv tested its own fully autonomous system against fuel storage and military equipment in occupied Crimea in recent months, and Ukrainian quadcopters killed Russian soldiers in autonomous mode as far back as 2024. In Zaporizhzhia, defenses now include roughly 240 miles of anti-drone netting and plastic sheeting propped at odd angles around propane tanks to throw off image recognition.

Raghu Sreeramaneni, Micron HBM Design Architecture Fellow, told the Hot Chips 2026 conference on August 23 that the silicon penalty HBM carries against DDR5 is growing with every generation, and that it can’t be closed without giving up performance, something that Micron won’t do. Pressed on whether newer parts narrow the gap, he said it’s "definitely not getting better," putting the current overhead at roughly three times the wafer area of DDR5 for the same capacity. That trajectory is the reason why PC memory hit record prices this year, with conventional DRAM contract prices up 90% to 95% quarter over quarter in the first quarter of 2026.

Wafer mathematics

An HBM4 die fits 256 banks against 32 on a DDR5 die, and it reaches its bandwidth by running those banks in parallel, which requires far more die area for data paths, power delivery, and the through-silicon vias (TSVs) that link each layer to the base die. A single HBM3E die can feed 256 GB/s, while one DDR5 die supplies about 8 GB/s, so matching a given bit count makes the HBM die much larger.

Micron has publicly put that overhead at about three times the wafer area of DDR5, and Sreeramaneni said it traces to an HBM3E-against-DDR5 comparison that grows with each generation as pin speeds, bank counts, stack heights, and die sizes climb higher. He called HBM "probably the most cross-functionally complex solution that we make," and noted that in a two-GPU package, memory accounts for around 90% of the silicon, roughly eight times the area of the GPU dies. HBM already sells for about five times the price of DDR5 per bit, so each wafer a maker moves to it removes a disproportionate share of commodity memory from the market, pushing consumer product prices higher as a consequence.

Conventional DRAM contract prices rose 90% to 95% quarter over quarter in the first quarter of 2026 and a further 58% to 63% in the second. To put that into perspective, a mainstream 32GB DDR5-6000 kit sold for around $392 this month, up from $110 to $140 a year earlier, and 128GB of DDR5 passed $3,399, a 500% rise over 12 months, with European prices up 345% since September last year. Back in February, HP told investors that DRAM now makes up 35% of its PC build cost, up from 15% to 18% a quarter earlier, and Gartner expects PC shipments to fall more than 10% in 2026. While it’s true that the surge eased to 13% to 18% in the third quarter, that happened because consumer electronics makers reached the ceiling of what they could pass on, not because supply improved.

Bandwidth, stacking, and heat

Micron's presentation put compute performance scaling at roughly three times every two years and HBM bandwidth at under two times, a divergence Sreeramaneni summarized by saying "the memory wall is still present, and, in fact, maybe getting worse." HBM4 doubles the host interface to 2,048 I/Os, and Micron's parts run above 11 Gb/s per pin for more than 2.8 TB/s per stack, beyond the 8 Gb/s and 2 TB/s baseline in JEDEC's HBM4 standard.

Each of those gains comes from more parallelism, which enlarges the die again and widens the silicon ratio. Sreeramaneni said there is "a good path to 16 layers of DRAM," but "after 16, there's still a lot of work to be done." Meanwhile, SK hynix used its own Hot Chips talk to describe a 775-micron total-thickness ceiling that caps stacking until the industry adopts hybrid bonding, which SK hynix doesn't expect before HBM5. Micron's HBM4E, due around 2027, moves the logic base die to a TSMC foundry process, part of a wider shift toward customization as AI workloads fragment, which Sreeramaneni described by saying "disaggregation is the buzzword now."

The base die runs hottest because it sits at the bottom of the stack, doing the highest-speed interface work while the heatsink sits at the top. Every layer added between the base and the heatsink then raises thermal resistance. Sreeramaneni said Micron is now "architecting solutions around thermals rather than the other way around," a reversal from a few years ago. Micron highlighted how Meta's Llama 3 paper attributed 17.2% of unexpected interruptions during a 54-day run across 16,384 H100 GPUs to HBM3 memory, the second-largest cause behind failed GPUs, a reliability burden that scales with the amount of HBM in each package.

Share and supply outlook

SK hynix leads the HBM market with a share that Counterpoint Research places at around 58%, down from a high of around 69%, and Micron overtook Samsung for second place last year. Micron began volume shipments of 36GB 12-high HBM4 earlier this year for Nvidia's Vera Rubin platform, with Nvidia CEO Jensen Huang saying in June that all three suppliers are qualified and in production.

Analysts expect DDR5 per-wafer profitability to overtake HBM3E by the end of this year, leaving the three makers little reason to add commodity capacity when server DRAM pays nearly as well per wafer. SK hynix said last October that it had already sold its entire 2026 output, while Apacer's chief executive told investors that supply to independent module makers could fall to 30% of 2026 volumes next year. SK hynix CEO Kwak Noh-jung has called 2027 the worst year for memory supply in the industry's history, with demand outrunning production into 2030.

In response, Nvidia has raised its DGX Spark desktop from $3,999 to $4,699 and warned large customers of AI server price rises above 15%, both tied to memory. Realistically, the squeeze will loosen only under three conditions, none of them likely before new fab capacity comes online and scales up: China's CXMT ramping competitive DDR5 in volume, hybrid bonding arriving before HBM5, which SK hynix has already all but ruled out, or DDR5 profitability slipping back below HBM.

Full Micron Hot Chips 2026 presentation

An AI computing enthusiast has demonstrated Doom running on a custom CPU designed by GPT-5.6 Sol. Angel (@Angaisb_) shared a technical and visual feast with a video of classic Doom running within a pulsing schematic of the CPU, in the sandbox provided by the Turing Complete game environment. Clearly, this shows that GPT-5.6 Sol is capable of constructing a virtual computer system from the basics, and one that is accurate enough to boot and play a port of the original Doom. The model dubbed its CPU design ‘Codex-R32.’

Angel knows Doom is a hugely popular demo to show computing capabilities, despite it being quite a vintage nowadays (1993). So they must have thought it a good idea to show how far agentic coding has come with this tried and trusted ‘people asked for Doom’ metric. They were impressed by the results, concluding that it is “truly insane that we can do stuff like this.”

Despite the accomplishment, another rule of the internet is that there’s always someone who thinks you haven’t pushed far enough. So there were the inevitable remarks about having a shot at Crysis next. Likely grasping for a witty comeback, Angel asked their AI to whip up a response to the unsolicited stretch goal. It didn’t disappoint, suggesting they answer “Absolutely – I just need to build a GPU, add a few gigabytes of RAM, and make a schematic visible from orbit first.”

Indeed, Doom is a relative minnow compared to Crysis, though it still stretches the model and its performance in the sandbox is not what anyone would call playable. “The CPU is built from primitive logic components inside Turing Complete,” the Codex told Angel. “Doom uses the C-based PureDOOM port, compiled into native RV32IM machine code that runs directly on the custom Codex‑R32 CPU.”

Watching the video, you can see the live schematic of the custom CPU with a pulsing visualization of processor gates, registers, memory, ALUs, and other blocks within the Turing Complete computer-science education and puzzle game’s anything-goes sandbox mode. Live stats show the cycle counter, sim speed, memory/register values, and more.

Overall, with this demo, we have a neat visual demo of LLMs not just creating software, but also reinventing hardware at a capable enough level to pass the 'can it run Doom' test.

Nvidia's 88-core Vera chip will be getting put to work for Elon Musk twice over, first and foremost as the standalone CPU orchestrating Grok's AI agents in SpaceXAI's data centers and, from the fourth quarter of 2027, inside the company's first Starmind satellite. Nvidia announced the deployment yesterday, making SpaceXAI the second hyperscaler after Meta to commit to Vera outside full Vera Rubin racks, with Musk supplying the launch window in a post on X. Nvidia claims the chip completes agentic, reinforcement learning, and data processing tasks up to 1.8 times faster than x86 processors, but that figure hasn't been independently verified.

Agents spend much of their runtime off the GPU. A model that writes code, for example, calls tools, queries databases, and parses results by leaning on the host CPU between every inference pass; idle GPUs waiting on that work are wasted capital. "Vera gives us the CPU performance and memory bandwidth to run enormous amounts of orchestration, code, and data processing while keeping GPUs doing what they do best," Mike Nicolls, president of SpaceXAI, said in the release.

Meta was the first company to announce a large-scale standalone Vera deployment, confirming in February that it would run Grace-only servers in production with Vera to follow as soon as 2027. Nvidia has since disclosed shipping hundreds of thousands of standalone Grace servers and more than 2.5 million Grace CPUs in total, and the SpaceXAI deal extends that dominance directly into territory held by AMD's EPYC and Intel's Xeon lines.

Vera pairs 88 custom Olympus cores on a monolithic die with spatial multithreading and LPDDR5X memory delivering up to 1.2 TB/s of bandwidth. Nvidia's performance claims for the chip remain contested, and AMD has countered that its 256-core Zen 6 Venice processors beat Vera by 3.3 times in rack-level performance. Neither company disclosed how many Vera CPUs SpaceXAI will deploy, the value of the deal, or when the data center rollout begins; the only date attached to the announcement is the satellite launch window.

Musk said earlier this month that Starmind launches would begin in 2027, and his X post following the press release narrowed that to the fourth quarter, with what he described as significant scale-up following in 2028. The terrestrial NVL72 combines 72 Rubin GPUs and 36 Vera CPUs in a fully liquid-cooled rack, and an orbital version has to be reworked for radiation exposure, heat rejection through radiators rather than facility water loops, launch vibration, and the absence of any hands-on servicing.

SpaceXAI's first-generation AI1 satellite design carries a 120 kW compute payload, peaking at 150 kW, on a craft wider than a Boeing 747. The company has also acknowledged that orbital compute at the scale it's targeting requires significantly more chips than it currently has access to, a constraint the Vera Rubin commitment doesn't itself address.

Chinese multinational tech giant Alibaba has been accused of tracking web users after a developer discovered its global online marketplace running hidden audio processes that could be used for sophisticated audio fingerprinting. While investigating an issue with his wireless headphones, Matt Callaghan found that opening an AliExpress webpage in Firefox or Chrome interfered with the multipoint Bluetooth audio feature.

As Callaghan explains in his blog post, “Normally the PC takes priority playing audio, with my phone being able to play audio when nothing is playing on the PC. Usually I listen to music on my phone but with notifications or YouTube playing through the PC.” However, shortly after loading the AliExpress homepage, audio from his phone would stop playing, despite no media playing on his PC. Closing the AliExpress tab immediately fixed the issue, while muting the tab, browser, or Windows did not seem to resolve it.

Their investigation began by inspecting various conventional media elements; however, he did not find any unusual activity. He also zeroed in on the fact that the problem would not begin immediately, but rather after the webpage had been sitting idle for a few seconds. He then moved on to inspect the Web Audio API to wrap the AudioContext constructor so that it would record whenever a page created an audio-processing context. They additionally wrapped AudioNode.prototype.connect() to see whether anything was connected to the context's audio destination.

Eventually, Callaghan found that the page was loading two suspicious scripts named collina.js and fireyejs.js, which appeared to be part of Alibaba's browser security and anti-abuse tooling. With some help from AI during his research, he found that the scripts built a Web Audio graph using a sawtooth oscillator to generate a waveform. An analyzer then measured the results after they passed through the browser's audio implementation, while another script read the resulting frequency data. The scripts also set the volume gain to zero, meaning there was no audible sound or noise, even though the browser continued actively processing the Web Audio graph.

Unlike autoplaying videos, there is no media element playing, which is why the browser's tab mute control does not help. However, the webpage continues performing live audio processing, keeping the Bluetooth audio path active and preventing multipoint Bluetooth headphones from switching between devices. Further investigation also uncovered code collecting information related to screen dimensions, device memory, browser plugins, WebGL rendering, supported audio and video formats, browser performance, mouse events, and more. The scripts also appear to serialize and encrypt the collected data before sending it to Alibaba's telemetry services using fetch() or sendBeacon() functions.

Following the discovery, Firefox said on X that its browser includes built-in protections against fingerprinting. The company pointed to a blog post explaining that Firefox 118, released in September 2023, introduced additional protections against Web Audio-based fingerprinting. Brave also claims to block audio fingerprinting by default. According to the browser maker, it does this by injecting randomized data into the browser's audio output, making the fingerprint appear different to websites and resetting the data between sessions.

SK hynix doesn't expect hybrid bonding to be ready for HBM4E, Jaesik Lee, VP of package engineering at SK hynix America, said during a presentation at Hot Chips 2026 on August 23, pushing the industry's most anticipated memory packaging transition out to HBM5 at the earliest.

The problem, as he describes it, is that HBM cubes are capped at a total thickness of 775 microns — the standard thickness of a 300mm logic wafer — so every additional DRAM layer must come from thinner dies and narrower gaps. 16-Hi HBM4, now in customer qualification at 48GB per cube while 12-Hi is in mass production, thins its core dies to around 50 microns and halves the gap between them compared with 12-Hi. Lee's session also went into detail about the company's iHBM cooling architecture three months after its May unveiling. Attaching a constraint to it, Lee explains that the heat blocks can't be applied to any HBM generation already in design.

The 775-micron limit

The JEDEC HBM4 standard raised the package thickness ceiling from 720 microns, which held through HBM3E, to 775 microns, easing the pressures associated with adopting hybrid bonding. When a GPU package gets its cold plate attached, both the logic die and the memory stacks are ground back to expose bare silicon, Lee said, and because logic wafers are 775 microns thick, a memory cube that grew any taller would stand proud of the processor beside it. "That's the kind of limit that we can go up so far, because the logic wafer thickness is also 775 microns," Lee said.

Thinner dies leave the stack with proportionally more oxide, which conducts heat poorly compared with silicon, while pin speeds that have risen from 1 Gbps in early HBM to 8 Gbps in HBM4 concentrate more power in the same footprint. SK hynix's own figures put the thermal burden at 2.2 times higher across the HBM generations shown, while stack counts double every two generations.

The company's mass reflow-molded underfill (MR-MUF) process, which stacks all dies via pick-and-place and joins them in a single reflow, already trades away margin here: filling gaps that have shrunk by half while controlling warpage on sub-50-micron dies is, per Lee, the main manufacturing challenge of 16-Hi.

Hybrid bonding keeps slipping

Samsung publicly committed to hybrid bonding for HBM4 in May last year, with SK hynix holding the copper-to-copper technique as a backup behind advanced MR-MUF. The JEDEC thickness relaxation then removed the immediate need, and industry discussions now weigh a further move to 825 to 900 microns for 20-Hi stacks, which would push the copper-bonding crossover out again.

Back in March, it was claimed by industry sources that SK hynix placed its first mass-production hybrid bonding order, a single inline system pairing Applied Materials and Besi tools worth around 20 billion won ($15 million), and Counterpoint Research expects the technique to enter full-scale HBM production with HBM5 around 2029 to 2030.

Hybrid bonding remains at the research stage for stacks of 20 layers and above, per the deck's roadmap, and SK hynix is still deciding which product gets it first. Lee didn't name a target generation, but ruling out HBM4E leaves HBM5 as the earliest slot. The technique joins flattened copper pads and oxide surfaces at room temperature, then relies on copper's thermal expansion during a cure step to form the bond.

"This is a very simple process, but in reality it's really challenging," Lee said. "We are talking about 16 layers and 20 layers that we need to make the hybrid bonding, so it's very different from the one-layer stacking." Removing micro-bumps entirely lets core dies grow up to 24% thicker at 20-Hi, cuts thermal resistance by roughly 35% versus MR-MUF at that height, and takes bump pitch below 18 microns, per the deck, against the 30 microns where MR-MUF is today. At HBM4's bump pitch, conventional micro-bumps still work, and each time JEDEC has raised the thickness ceiling, MR-MUF has stayed viable for another generation.

iHBM

The iHBM concept embeds thermally conductive, electrically insulating blocks into the base die's die-to-die PHY region, the interface hotspot where power density peaks, for a claimed thermal resistance reduction of more than 30%.

Lee's slides benchmarked it directly against Samsung's Heat Path Block approach, which routes heat out of the stack through dedicated pillars, and Micron's base-die circuit redesign, which claims over 20% better energy efficiency. All three are vendor claims measured on different metrics, and the SK hynix and Samsung designs are both slated for HBM5, with neither expected in mass production before 2028. Because the blocks sit inside the package alongside the D2D PHY, they need optimization with the customer's design and can't be applied to generations already in design, Lee said, which makes iHBM a co-design effort. "It's a kind of good option that we can do, but this is not something that we can apply [to] the generation that we already [have] in design."

During Q&A, Tanj Bennett of SemiAnalysis argued that stacking taller dilutes the silicon's own throughput. DRAM operating at the cell level delivers on the order of 20 TB/s per square centimeter; a 20-Hi stack tops out around 4 TB/s, and HBM takes far more manufacturing capacity than equivalent DDR5 or LPDDR. "As you get to 20 high, the average speed of that memory is slower than DDR5," Bennett said. "Why is it better to be using the height of the HBM stack instead of intelligently placing cheaper memory around it?"

Lee answered that training workloads demand both bandwidth and capacity, then added that inference may split the difference, keeping the KV cache in high-bandwidth memory while offloading to LPDDR. That split already exists in products like Nvidia's Vera Rubin platform, which pools LPDDR5X with HBM4 over NVLink-C2C for exactly this purpose, and the High Bandwidth Flash spec that SK hynix co-developed with Sandisk extends the tiering idea to NAND.

"That's a kind of question that we need to also look at in the future," Lee said of the tiered approach. SK hynix holds around 70% of Nvidia's HBM orders for the Vera Rubin generation, according to reporting from January, and all of it will be stacked with MR-MUF. Which product moves off it first, Lee says, is a decision that the company hasn't made.

Full SK hynix Hot Chips 2026 presentation

Just days after Supermicro revealed it had terminated several employees following an internal investigation into U.S. smuggling, nine people have been indicted by Taiwan's Keelung District Prosecutors' Office in the ongoing investigation into the illegal smuggling of Nvidia B300 GPUs to China. According to a new report from Digitimes, details of the indictment reveal an intricate five-step scheme designed to subvert various export restrictions.

According to the report, the indictment sets out how "a compliance regime designed to track every unit was defeated from the inside," thanks to a scheme setup to run through five different points in the supply chain.

Per the report, Supermicro's Taiwan subsidiary only sells its B300 systems to whitelisted buyers, who must sign an end-user agreement promising they won't re-export or sell the GPUs to sanctioned parties, such as customers in China. Order enough servers — eight units or more — and an on-site inspection led by representatives from both companies is triggered.

To that end, Taiwanese server trading firm Flying Tiger Tech reportedly obtained whitelist status and then placed a 130-unit order, declaring that it was the end user for the servers, which would be installed in Taiwan. That order was placed on behalf of Flying Tiger by a listed Supermicro distributor, Albatron Technology. Per the report, this "kept Supermicro from ever examining where Flying Tiger's money came from," because Albatron is listed on the Taiwan stock exchange and is a listed Supermicro distributor, presumably not raising too many flags.

The report says that, in order to pass the inspection, Flying Tiger leased colocation space from Chief Telecom, another TPEx-listed firm, but presented a quotation instead of an actual lease. Inspectors of the site in September 2025 reportedly found the site operational, but crucially incapable of running the 130 B300 servers the firm had asked for. Despite not having the racks, power, or bandwidth for that kind of hardware, no one spoke up.

The report then turns to a group it dubs "The insiders," likely the nefarious parties working inside the various points of the supply chain to help push through the transaction. One such individual listed is a sales manager at Nvidia Taiwan who "pushed the quota through," emailing headquarters to state the inspection was complete. A senior sales manager at Supermicro's Taiwan subsidiary had reportedly coached Flying Tiger through the review process, possibly revealing how its Chief Telecom lease passed muster on inspection. A second Supermicro manager reportedly caught wind of where the servers were really ending up, but was cut in on the commissions rather than speaking up.

All of this meant that Supermicro ultimately approved the sale of the 130 B300 units in three tranches of 2, 64, and 64. Of the first 74 units, sixteen were sent directly to China in January 2026. A further fifty were sent to Indonesia and then transshipped to China. Eight reportedly went to a Japanese entity controlled by the defendants, before going to Hong Kong and then China. This set of shipments was said to be worth $21.21 million in profit.

The scheme was given up shortly after 56 units were declared to Japan and flagged by customers, who demanded a "strategic high-tech commodities export permit." The defendants in the case filed for one, including fake mockups of Supermicro's website created by splicing together real parts of the site. Once word of the scheme came to light, the servers were not allowed to leave the country.

According to prosecutors, investigations have also uncovered a second scheme cooked up by the GM of Albatron, a manager from Supermicro, and the head of a small electronics firm, which billed Albatron $39 million Taiwanese dollars for installation work that was never carried out, splitting the money with the other perps. The head of the latter firm reportedly turned himself in, confessing alongside Albatron's GM and naming other participants in the scheme in exchange for leniency. Despite this, they reportedly still face up to five years on counts of export and six years for looting.

As per above, Supermicro has announced the findings of its own investigation in a US smuggling scheme, claiming that senior management had no knowledge of the matter and no evidence that controlled products were sold to banned entities.

As the report notes, this latest Taiwan sales channel was uncovered by Taiwanese prosecutors, rather than Supermicro's audit.

A research team at Kyoto University has built a silicon carbide (SiC) transistor that operates at 600°C (873 K) using ion implantation, the doping step used across commercial chip fabs, and cut the gap between its designed and measured threshold voltage to under 0.1V at 400°C, down from more than 2V in the conventional layout. The work, announced earlier this month by Mitsuaki Kaneko, Shunya Shibata, and Tsunenobu Kimoto and published in APL Electronic Devices, pairs a bottom-gate transistor with a double-well isolation structure to keep an ion-implanted SiC junction field-effect transistor stable at temperatures where silicon stops working above roughly 250°C.

The bottom-gate layout puts the gate electrode beneath the channel, which captures the dopants that scatter deeper than intended during implantation, a channeling effect that had thrown conventional top-gate JFET thresholds off by more than 2V. With the channeling tail compensated, the design-to-measured threshold voltage gap dropped to under 0.1V at 400°C.

The double-well structure isolates each device inside a pn junction instead of leaning on the semi-insulating SiC substrate underneath, which loses its insulating behavior as it heats and bleeds leakage current through the wafer. Kaneko's group reported the remaining leakage sits close to the theoretical floor set by SiC's own material properties, so there's little room left to improve it at the device level.

In contrast, NASA Glenn Research Center has run SiC JFET integrated circuits carrying more than 175 transistors for over a year at 500°C in air, and 60 days on a simulated Venus surface at 460°C and 9.3 MPa with no shielding, per the agency's published testing. Those chips are built from epitaxial JFET-resistor devices on a bespoke process. The Kyoto researchers reached a higher device temperature through ion implantation, a method already standard across mainstream fabs, which fits existing mass production.

SiC is already scaling as a power-device wafer material, but high-temperature logic is a separate and far smaller niche. It isn't the only wide-bandgap material chased for these conditions either, with researchers recently showing devices that hold up from 500°C down toward absolute zero in other compounds.

The transistor is normally-on, so it conducts with no gate voltage applied and draws standby power. Efficient logic needs complementary pairs built from normally-off devices, which this isn't. Kimoto's group has already demonstrated complementary SiC JFET logic gates at 350°C, and its next step is to design normally-off devices in the new structure to build low-power complementary circuits. Long-duration reliability at temperature and heat-tolerant packaging are just two challenges the researchers will need to overcome before any of it reaches a gas turbine, or Venus.

The U.S. Army tested an autonomous breaching vehicle with an onboard counter-UAS (C-UAS) turret during a live-fire exercise at Fort Bragg on August 18. As part of Project Sandhills 2.0, self-driving Ford F-250 trucks were put through their paces, some armed with computer-controlled drone-killing shotgun turrets.

Sandhills 2.0 builds on the original Sandhills project which spawned the Lancer UGV, built on the Polaris Ranger 1500 utility vehicle, which ended up being gifted to Ukraine. However, this new breaching solution adds C-UAS abilities to bolster their abilities to clear the way for human soldiers to advance. Breaching operations can be seriously compromised by a determined enemy using increasingly common FPV drone technology and this fact inspired the changes delivered in Sandhills 2.0.

The vehicle chosen for Sandhills 2.0 was a self‑driving Ford F‑250 truck, equipped with Forterra’s AutoDrive system. Ford’s readily available spares should make the F-250-based system easier to maintain and repair, reckons Forterra’s VP of defense. That is another important factor the designers weighed, for this latest iteration of a viable U.S. Army autonomous breaching vehicle.

Meanwhile, the Edda counter-unmanned aircraft system turret (built by Austin-based 9 Mothers) takes care of fast-moving drone threats of 7-inch diameter or larger, at ranges between 10 to 100m (33 to 328 feet). The source report notes that the turret weighs around 23kg (50 pounds).

Interestingly, the turret first detects incoming drones acoustically before an onboard visual tracking system locks on. This methodology prevents the F-250-based system from being easily detectable by advanced enemy drone sensors, suggests the source report. Finally the shotgun-armed Edda engages the enemy drone. According to 9 Mothers published data the Edda turret is an “ultra-fast, ultra-light, ultra-accurate motion platform — 5° in under 15 ms at 1.5 arcminute precision.” We would welcome some test data, though – like what percent of drones get destroyed in one shot, the maximum speed of drones that Edda can engage, or how many drones it can handle per minute.

HoverAir has pulled the Flight Kit for its Versa camera drone from U.S. buyers on its Indiegogo campaign three days after it opened on August 19, telling backers that "due to a few remaining logistics updates with the Flight Kit, we're currently only shipping our PocketOnly and PocketCombo combos to the US." In a statement to DroneXL, however, the FCC says the authorization "was granted erroneously," the device is "a prohibited UAS critical component produced in a foreign country," and the company was "apparently willfully violating" the law.

The Versa, a 230g pocket gimbal camera that snaps into a separate propeller chassis to fly, raised more than $230,000 in its debut, thanks to a U.S. certification that HoverAir said let it dodge the ban that's kept DJI's newest models out of the country. The device's FCC ID has since disappeared from the commission's equipment database, according to The Verge, which said HoverAir declined to comment.

The FCC granted ID 2AIDW-ZZ-H-1-006 to Shenzhen Zero Zero Infinity Technology, the HoverAir parent's grantee entity, earlier this month for the Versa as a camera rather than a drone. The Flight Kit carries the motors and props but no radio, drawing power and telemetry from the camera through pogo pins, meaning it never needed its own FCC ID.

HoverAir announced the certification on August 18 and priced the camera at $449 early bird, with Flight Kit bundles starting around $630 and shipping slated for October. By August 21, U.S. visitors to the Indiegogo page couldn't see the Flight Kit tiers while Canadian visitors still could, and backers received an email attributing the change to "a few remaining logistics updates with the Flight Kit."

The December 2025 Covered List order that barred new authorizations for foreign-made drones also covers "UAS critical components," which the FCC's public notice DA 25-1086 defines to include flight controllers, navigation systems, batteries, motors, and "sensors and cameras," with the list marked as not exhaustive. A camera built to bolt onto a propeller frame satisfies that definition regardless of which product category it's certified under, and the FCC said it's now "sending guidance to all Telecommunications Certification Bodies to strengthen their due diligence of applications." The commission outsources equipment authorization to those private labs, which is likely how the Versa grant slipped through the cracks.

The only exemptions issued so far were approved back in January and cover Blue UAS-listed aircraft and components that qualify as domestic end products. Neither applies to a Chinese consumer camera; DJI is challenging the underlying order in court.

HoverAir's previous crowdfunder, the waterproof Aqua, raised more than $2 million from over 1,800 Indiegogo backers in August last year but missed the December deadline after the October government shutdown slowed FCC processing. It launched in more than 50 countries in May without the U.S., with American backers offered refunds.

The Versa is still listed with the Flight Kit in other markets, and U.S. backers can still take the camera-only tiers, though the FCC's statement that even the camera is a prohibited component casts doubt on that option. HoverAir is due to show the Versa at IFA in Berlin on September 3, with retail availability planned for fall.