We managed to grab pics of the newest upcoming server sockets from both AMD and Intel at Computex 2026. Both AMD and Intel are preparing to launch their next-generation server platforms that use all-new sockets, which enable new levels of performance, functionality, and power delivery.

AMD is a bit ahead with its SP7 platform in 2026, while Intel’s gargantuan 9324-pin socket will be used for Xeon ‘Diamond Rapids’ in 2027. While the platforms are entirely different, what makes them similar is the massive dimensions of CPU sockets and coolers.

AMD’s SP7 is the company’s next-generation socket that will support AMD’s 6^th Generation EPYC ‘Venice’ processors with up to 256 cores. The socket is huge and is rumored to support 16 DDR6 memory channels using 12.8 GT/s MRDIMMs as well as up to 96 PCIe 6.0 lanes (with the CXL protocol on top, though this is a processor, not a socket feature).

Based on information from Auras, the SP7 socket will be able to handle CPUs with a peak power consumption of up to 1,400W, so Auras and other companies are prepping liquid cooling solutions for these parts. In person, the socket is strikingly large, occupying most of my palm and overshadowing today’s server CPU packages.

Given the fact that the socket must support so many memory channels and PCIe lanes, it is not surprising that it is that large. Despite its enormous dimensions, the socket is still compact enough to enable dual-socket server designs, so AMD’s partners will be able to offer systems with up to 512 x86 cores as soon as its next-generation EPYC processors arrive later this year.

Meanwhile, for those systems that do not need so many cores and memory channels, AMD is prepping the SP8 platform that is set to offer fewer cores and DDR5 channels. Interestingly, Auras is working on water blocks for SP8 sockets as well, which means that the platform will still be quite mighty in terms of power consumption.

But while AMD’s SP7 is huge, Intel’s 9324-pin socket easily dwarfs it, as it is noticeably longer than the palm of my hand. The socket will work with Intel’s Xeon ‘Diamond Rapids’ processors with up to 192 cores, a 16-channel DDR5 memory subsystem supporting MRDIMMs, and PCIe Gen6 lanes.

Intel is yet to announce the processor base power of Diamond Rapids processors, though, since Auras is prepping water blocks for these CPUs, we're talking about circa 300W – 500W PBP and over 1 kW peak power consumption. Meanwhile, given that the socket is so massive, we would not be surprised if Intel’s 9324-pin socket will also support the Coral Rapids processors, presumably due in 2028 – 2029.

Intel has confirmed several details about its next-generation Xeon 7 CPUs, codenamed Diamond Rapids, which are now officially slated to launch in 2027. Announcing its E-core-only Xeon 6+ chips at Computex, Intel teased that Diamond Rapids will support PCIe 6.0, pack 50% more cores than Xeon 6, and double the memory bandwidth. Intel is building Diamond Rapids chips on the Intel 18A-P node, which is a refined version of 18A that Intel demoed just last month.

Although Intel never formally announced a release window for Xeon 7, we originally expected to see the chips this year – a timeframe that became increasingly unlikely as news about Diamond Rapids dried up. Now, Intel has officially confirmed Diamond Rapids is arriving next year, meaning AMD will have a head start with its next-gen EPYC Venice CPUs built on the Zen 6 architecture, which are still (at the moment) slated for release this year.

Like Venice, Intel has confirmed Diamond Rapids will support PCIe 6.0, as well as double the memory bandwidth of Granite Rapids. Last year, Intel confirmed it canceled an 8-channel memory variant of Diamond Rapids to focus exclusively on the 16-channel design. Granite Rapids-AP (12-channel) topped out at 614 GB/s of memory bandwidth, while Granite Rapids-SP (8-channel) topped out at 409 GB/s. Depending on the comparison point — Intel didn’t clarify — you’re looking at topline memory bandwidth of at least 1.2 TB/s or 818 GB/s, respectively. Second-generation MRDIMM support, however, means that bandwidth could climb to upwards of 1.6 TB/s.

We can do similar math with core counts, looking at the top-end 6980P from Granite Rapid-AP at 128 cores. A 50% increase in core count brings us to 192 cores. Diamond Rapids has been rumored to climb up to 256 cores, with a 512-core dense version planned later. Intel is suggesting those rumors are false, though no hard specifications are confirmed yet.

The big question is what microarchitecture those cores will use, and if they’ll support Hyper-Threading. Intel removed Hyper-Threading from the Lion Cove P-cores in Lunar Lake and Arrow Lake, and kept it out of the Cougar Cove P-cores in Panther Lake. Naturally, if Xeon 7 uses either of those P-core microarchitectures, we’d also expect the chips to lack Hyper-Threading. Adding to the speculation were some comments Intel made in its January earnings call, where it said that it “will also reintroduce multi-threading back into our data center road map.”

Recently, however, Intel documents have suggested Diamond Rapids will use Panther Cove, an as-of-yet unreleased microarchitecture. We should know for sure what’s going on under the hood of Diamond Rapids soon. "We expect to share more on Diamond Rapids in the late summer at Hot Chips, so stay tuned there,” an Intel spokesperson shared in a Q&A with Tom’s Hardware.

Perhaps the most significant reveal in this tease is that Diamond Rapids is using Intel 18A-P. We’ve known for a while that the first 18A CPUs in the data center would be Xeon 6+, which Intel has now officially launched. 18A-P is a revision of 18A, but Intel has already demonstrated that it’s quite a significant revision.

Intel claims 18A-P delivers 9% higher performance at the same power as 18A, or an 18% power reduction at the same performance level. Intel says it also improved reliability and tweaked voltage behavior, making 18A-P a much more mature revision of 18A, likely in a bid to attract external customers for Intel Foundry.

Intel is facing off against AMD’s Zen 6 Venice CPUs, which we expect to learn more about at AMD’s Advancing AI event in July. So far, AMD has confirmed that Venice will launch with up to 256 cores, 1.6 TB/s of memory bandwidth per socket, and a 70% jump in gen-on-gen performance. There’s still a lot we don’t know about Venice and Diamond Rapids, but from the initial teases, Team Red is looking like the leader.

That would make sense. Although Diamond Rapids is a significant release for Intel, the company has continually reiterated the importance of Coral Rapids, the generation that will follow Xeon 7 on Intel’s road map. We expect to see Coral Rapids in 2028, featuring SMT, and Intel has said that it’s looking into ways to accelerate the Coral Rapids rollout.

This week, Nvidia released its Q1 2027 results, posting a record-breaking $81.65 billion in revenue thanks to sales of its AI and data center products. Colette Cress, chief financial officer of Nvidia, said that he expects sales of the company's Grace and Vera CPUs for data centers to hit $20 billion this fiscal year, thus outselling both AMD and Intel and becoming the world's largest supplier of processors by revenue. This is a realistic expectation, principal analyst and president of Mercury Research, Dean McCarron, tells Tom's Hardware Premium.

Outselling AMD and Intel

"Vera CPU opens a brand-new $200 billion TAM for Nvidia, a market we have never addressed before," Cress said during the company's conference call with financial analysts and investors. "Every major hyperscale and system maker is partnering with us to get it deployed. We have visibility to nearly $20 billion in total CPU revenue this year, setting us up to become the world-leading CPU supplier."

Nvidia later clarified that the $20 billion figure includes sales of Grace and Vera processors within Superchip combinations, NVL72 systems, and standalone CPUs sold either as racks aimed at agentic AI workloads or other applications.

Intel's data center and AI (DCAI) division's revenue totaled $16.8 billion last year, whereas AMD's data center unit earned $16.635 billion in 2025. While CPUs account for the lion's share of earnings of these business units, their sales are by far not 100% of their revenue, so actual sales of Xeon and EPYC products are well below $16 billion. The entire x86 server CPU market is worth around $30 billion. Therefore, the $20 billion figure would indeed approach two-thirds of the traditional server CPU market, making Nvidia the world's No. 1 server CPU supplier.

What makes Nvidia's statement especially remarkable is that while Grace CPUs are widely available and have shipped in huge quantities, its 88-core Vera CPU hasn't yet shipped in high volume. Furthermore, Nvidia has never meaningfully participated in mainstream server CPUs before. Given that Nvidia is poised to sell millions of Rubin data center GPUs, and every two of them will be attached to a Vera CPU, the company is almost guaranteed to sell plenty of CPUs.

"We will sell millions of Rubin GPUs and every two of them is connected to a Vera [CPU]," Jensen Huang, chief executive of Nvidia, told analysts and investors. "Vera is used in [four] ways. The first is Vera Rubin [platform containing two Rubin GPUs and one Vera CPU]. The second use case is Vera as a standalone CPU. The third is Vera with CX9 and its software stack for storage. The fourth is Vera with CX9 alongside a software stack for security, compute isolation, and confidential computing."

Conquering the CPU kingdom

Given the dominance of x86 servers, alongside AMD's EPYC and Intel's Xeon CPUs in particular, it is hard to imagine that another company can outsell these highly popular products. Yet, it is more than possible, given the fact that Nvidia can price its CPUs well above the average selling prices (ASPs) of other x86 offerings, and still manage to outsell competitors. This is because Nvidia sells vertically integrated platforms rather than standalone CPUs or GPUs. While Nvidia is not 'known' for its CPUs, it is definitely not a new entrant.

"Nvidia is in a unique situation, and I do not think we can really call them a 'new entrant," McCarron told Tom's Hardware Premium.

Based on leaked estimates from Morgan Stanley Research, Nvidia will charge its hyperscale clients around $5,000 per Vera CPU when they purchase VR200 NVL72 machines later this year. Assuming that the estimate is correct, then selling CPUs worth $20 billion will require Nvidia to sell 4 million Vera units. Four million units is perfectly achievable for Nvidia, McCarron believes.

"As far as delivering 4 million CPUs per year, Nvidia is already on track to deliver a number very near that for its GB300 and Rubin systems in FY2027 (so roughly Q2 2026 - Q1 2027 calendar year)," McCarron said. "So, their comment indicates some moderate upside to CPU shipments."

In fact, Nvidia could probably sell considerably more than four million CPUs this fiscal year if it wanted to, and if it secured or reallocated additional capacity for production of its 88-core Arm-based processor, according to McCarron.

"This really just comes down to customer demand and pricing/revenue allocation to get to the $20 billion," the analyst told us. "I would expect that the number is going to be heavily weighted towards the end of their fiscal year."

Speaking of capacity, Nvidia has commitments for capacity and inventory of around $145 billion, so capacity allocation may not be a problem for the company.

"We remain front-footed in securing sufficient supply to support our customers' growth," Cress said. "In Q1, we increased total supply, inclusive of inventory, purchase commitments, and prepaids, to $145 billion."

AMD and Intel shipped nearly 20 million EPYC and Xeon SP processors for data center systems in 2025, Dean McCarron told us. Meanwhile, AMD's EPYC average selling price was about $1,325, whereas the ASP of Intel's Xeon SP was about $1,125, according to Mercury Research. That said, if Nvidia sells 4 million processors worth $20 billion, then it will not only outsell both AMD and Intel, but will become a formidable rival for both companies from a pure unit sales point of view, too.

When Lip-Bu Tan became the CEO of Intel last year, it was clear that a lot was going to change at the company. Now, details of these changes are beginning to emerge. We already know that Lip-Bu Tan personally assesses and approves chip designs before tape outs, but as it turns out, he also wants designs to be bug-free and ready for mass production already with the A0 revision, something that the company's products have failed to do.

"One thing about timetable, I have a culture right now I have just implemented. It has to be A0 to production," said Lip-Bu Tan at JP Morgan's Global Technology, Media and Communications Conference. "A0 is when you tape out, first time pass. Intel does not have that culture, so I tell that, first time pass A0. B0, you keep your job. Anything above that, you are fired."

"So that culture people initially thought that I'm just joking, and now I started to implement, they started to say that, 'Okay, Lip-Bu, you are very serious, you really look into all the design, all the bugs that we've tried to fix, and then all the IP that we use. You make sure that we certify and make sure we do that before we go to tape-out,' and so those are kind of the culture we need to have," Tan said.

A0 is the very first manufactured version of a chip produced after the initial tape out and before any silicon fixes are implemented. First-pass success means that the chip boots, functions correctly, meets major specifications, no major redesign is needed, and the silicon is close to production quality (or of production quality). Achieving A0 success with a complex CPU design on an advanced node is extremely difficult, more so than with other types of processors with simpler designs and redundant features.

While Nvidia and some other companies indeed begin to mass produce A0 chips after the initial tape out and bring up, it often takes Intel more revisions to get rid of bugs and maximize performance and yield. For example, Intel's Xeon 'Sapphire Rapids' processor contained as many as 500 bugs, and it took Intel a dozen revisions to get rid of erratas and reach planned performance and decent yields. At the time, that chip had seen A0, A1, B0, C0, C1, C2, D0, E0, E2, E3, E4 and E5 steppings to fix the egregious number of bugs.

Tan's comments are a bit unusual for a CEO of a company of Intel's size, as he essentially says that Intel's prior engineering culture was lax, so he is improving internal execution discipline. Ultimately, Tan wants fewer respins, faster validation, and shorter development cycles.

Whether or not A0 success can be achieved by all of Intel's products remains to be seen. For example, Nvidia is known for incorporating various yield-boosting techniques into its complex GPUs (e.g., redundant logic and caches) to avoid stepping failures and costly respins. However, Intel's design approaches are different.

One of the ways to reduce risks is to use industry-standard silicon-proven IP blocks and heavily verify designs before taping them out. In addition, Intel engineers might have to make less risky design decisions to achieve first-time success. Such an approach may make Intel's produces less ambitious in general, but at least the company's business performance will be more predictable.

Intel has announced a multi-year strategic partnership with F1's legendary McLaren Racing team. The chipmaker is now the Official Compute Partner of the McLaren Mastercard Formula 1 Team, Arrow McLaren IndyCar Team, and McLaren F1 Sim Racing Team, according to a press release today. Interestingly, this announcement again pits Intel against its PC chip industry nemesis, AMD. The Red Team has already been working in partnership with the Mercedes-AMG Petronas Formula One Team for six years.

Intel's PR blurb says F1 racing is "one of the world’s most technologically demanding sports." Thus, Intel engineers will be tasked with delivering advanced computing for AI and high-performance architectures that are required to keep McLaren competitive.

The new agreement means that systems using Intel Xeon and Core Ultra chips will be leveraged to support McLaren's quest for the ultimate performance on the track. Specific calculations that F1 engineers spend their days optimizing for include "performance-critical workloads, including computational fluid dynamics, aerodynamic analysis, vehicle-dynamics simulation, [and] race strategy analytics." As well as real-time data, F1 support computers are used to sift through massive volumes of post-race data. Computers used to optimize F1 racing cars are also increasingly using AI tools, plus low-latency edge computing solutions, and diverse software platforms.

"Formula 1 racing and IndyCar are some of the ultimate proving grounds for high-performance computing. Intel is proud to be McLaren Racing’s compute partner, and to be part of a team that thrives on precision, speed, and innovation," said Lip-Bu Tan, Intel CEO. "Together, Intel and McLaren will push the boundaries of what’s possible, transforming data into competitive advantage at every turn."

A statement by Zak Brown, CEO, McLaren Racing, confirmed Intel hardware had already been an important part of the F1 team's tech ecosystem. It will be interesting to see if the new, closer relationship will produce noticeable results on the circuits around the globe, burning rubber at speeds pushing beyond 230 mph.

As we mentioned in the intro, AMD has already been working closely with a major F1 team for years. The firm has a page dedicated to how AMD Epyc and Threadripper processors are a competitive edge for the Mercedes-AMG PETRONAS Formula One team. Similar to Intel's announcement today, the AMD/Mercedes partnership uses advanced compute for "aerodynamic simulation and faster data analysis."

AMD's partnership with Mercedes-AMG was forged back in 2020, which might explain why there's no mention of artificial intelligence in the linked PR blurb, yet.

The first quarter of 2026 was quite favorable for AMD as the company managed to increase its unit share on the market of client systems and skyrocketed its share in servers past 33%, according to Mercury Research. In addition, the company's revenue shares set records across client and server market segments, so AMD now controls 38.1% of all x86 CPU market value and 46.2% of all x86 server CPU revenue share. Perhaps an alarming sign is that the company's desktop PC unit and revenue shares declined sequentially, though they are up year-over-year (YoY).

Consumer CPUs: AMD gains ground, but only modestly

In the consumer PC segment, AMD continued to gain ground in the first quarter of 2026 as its client CPU unit share rose to 29.6%, up slightly from 29.2% in Q4 2025 and up sharply from 24.1% the same quarter a year ago, according to data by Mercury Research.

The quarter, however, showed a split between desktops and notebooks as Intel has managed to claw back 3.2% of the desktop PC market. Also, Intel remained the dominant supplier of client CPUs with a 70.4% share, though its position weakened from 75.9% in Q1 2025 as AMD did rather well in notebooks.

However, when it comes to the revenue side of things, AMD's position remained particularly strong. The company's client CPU revenue share reached 31.4%, slightly above the previous quarter and substantially higher than a year ago (26.6%), which perhaps reflects the company's continued strength in premium client processors. Nonetheless, Intel still controlled nearly 69% of client CPU revenue, which is a big deal. How things will unfold in the second half of the year — when Intel launches its Nova Lake processors for client systems that it pins a lot of hopes on — is something that remains to be seen.

Desktop CPUs: Market share comes, market share goes

In the desktop PC segment, AMD gave back a portion of the massive gains it made during the exceptionally strong holiday quarter, but still maintained a historically high position, so the decline can be considered as a correction, rather than a new trend.

AMD's desktop CPU unit share stood at 33.2% in Q1 2026, down from the record 36.4% in Q4 2025, but well above the 28% recorded in the quarter a year earlier. Intel regained some ground sequentially and increased its desktop share to 66.8%, but remained far below its year-ago level of 72% as AMD continued to hold a much stronger position than it did in recent years.

On the revenue side, AMD remained strong despite the sequential share drip: the company's desktop CPU revenue share was 37.6%, down from the record quarter before, but still notable 3.2% higher than a year earlier. Intel continued to generate most desktop CPU revenue overall, but AMD's ability to maintain a high revenue share relative to its unit share shows the continued strength of premium Ryzen CPUs.

Mobile CPUs: Another record quarter

In the mobile PC segment, AMD delivered its strongest result ever as it managed to once again increase its share and set its highest share in laptops ever.

AMD's mobile CPU unit share climbed to 28.3% in Q1 2026, up from 26% in Q4 2025 and from 22.5% a year earlier, the best quarter ever for the company's mobile processors. For obvious reasons, Intel commanded the lion's share of the market — 71.7% — though its lead narrowed further as AMD increased its share by improving availability and expanding its footprint in segments (e.g., business and commercial notebooks) traditionally dominated by Intel.

As for revenue share, AMD's progress was even more impressive. The company’s mobile CPU revenue share rose to 28.9%, an increase from 24.9% in Q4 2025 and from 22.2% in Q1 2025, which reflects stronger sales of higher-value notebook processors. Intel continued to control the majority of notebook CPU revenue overall (71.7%, down from 77.5% in Q1 2025), but AMD's ability to approach 28.9% revenue share clearly indicates its increasing competitiveness in higher-margin premium laptops that historically favored Intel almost exclusively.

Server CPUs: Another breakthrough quarter

While the first quarter was good for AMD's mobile processors, it was exceptional for AMD's EPYC CPUs for servers. The company not only set a record in terms of unit share, but it has also managed to skyrocket its revenue share by 5% in a single quarter.

AMD's server processor unit share climbed to 33.2%, up from 28.8% in Q4 2025 and 27.2% a year earlier, the data by Mercury Research shows. Intel still shipped the majority of server processors with a 66.8% share, but its position weakened both sequentially and year-over-year as EPYC adoption continued to expand across hyperscale cloud providers, enterprise deployments, and AI/HPC infrastructure.

On the revenue side, AMD's performance was even more striking: the company's server CPU revenue share reached a record 46.2%, which means that AMD now commands nearly half of all x86 server CPU revenue while shipping roughly one-third of units. This gap between unit share and revenue share reflects significantly higher average selling prices of AMD's processors in general and the popularity of the company's high-core-count premium configurations. While Intel generated more server CPU revenue than AMD, ASPs of its Xeon products were lower compared to those of EPYCs, which is in line with market performance in prior quarters.

Summary

AMD started 2026 on a strong note: it expanded its share in both client and server CPUs and set new records for overall x86 CPU revenue share, according to Mercury Research.

The company posted particularly strong gains in notebooks and servers, where EPYC adoption pushed AMD’s server revenue share close to half of the entire x86 server market. While AMD's desktop CPU share declined sequentially after an exceptionally strong holiday quarter, it remained well above year-ago levels, so the strong momentum for the company continues.

In general, AMD continues to strengthen its positions in the most profitable parts of the x86 CPU market, while Intel retains shipment leadership but loses further ground in revenue share and premium segments.

When Arm introduced its first 'physical' AGI processors in late March, the company expressed optimism about their adoption by select customers. In less than two months, the company attained around $2 billion in commitments for its AGI CPU over the next several years, smashing the company's expectations two-fold. But despite this heightened interest, Arm's market share will remain in the low single digits even if it manages to ship $2 billion worth of CPUs in two years, Mercury Research told Tom's Hardware.

"Customer response to the Arm AGI CPU is already strong, with more than $2 billion of customer demand across FYE27 and FYE28 – more than double what was stated at Arm Everywhere," Arm declared in its earnings press release.

Arm officially introduced its AGI CPU on March 24, 2026, and referred to it as 'production silicon,' meaning the design of the processor itself is final. Actual production of the CPU is expected to begin in the second half of 2026, with initial customer shipments expected in Q4 2026. Arm expects to ship $90 to $100 million worth of AGI CPUs in Q4 2026 alone.

Given the rising interest in the new chip, the company expects to generate $15B in AGI CPU sales and $10B in IP revenue by FY 2031 (ending on March 31, 2031), which will drive its total revenue to $25B per year, up from $2.61B in FY 2026.

Generating $15 billion in data center CPU sales in a single year is a big deal; Intel earned $16.8B selling server processors last year, after all. Given the rising demand for CPUs, particularly for agentic AI workloads, Arm's revenue may indeed increase by almost a factor of 10, with actual CPUs accounting for 60% of that total figure.

Single-digit percent of the server market

While $100M worth of AGI CPUs in Q4 2026 and over $2B of demand for the next two fiscal years looks like a lot of money (especially given the fact that Arm's current annual revenue is $2.61B), Arm's presence in the server and data center CPU market (silicon CPUs, not IP) will be negligible (yet still quite hard to achieve) if compared to share of merchant CPUs.

AMD and Intel sold just under 20 million data center-oriented EPYC and Xeon SP processors worth tens of billions of dollars in 2025, according to Dean McCarron, president and principal analyst at Mercury Research, a leading CPU market research firm. If we consider only 2025 data center CPU shipments, Arm would need around 4% unit share of the current server CPU market to achieve its $2 billion revenue target.

"In round numbers for 2025, AMD's EPYC average selling price was about $1,325," Dean McCarron told Tom's Hardware Premium. "For Intel, the 2025 ASP for Xeon SP* is about $1,125. What Arm gets of course might be different, and prices are rising, but something like $1,250 probably is not a bad starting place."

At this point, it is hard to estimate the actual ASP of Arm's AGI since while the company advertises processors with up to 136 cores, we can only wonder how many SKUs there will be and how many cores entry-level models will have. If Arm behaves like a typical CPU maker — balancing recovery of development and manufacturing costs against maximizing margins — then AGI's ASP will be comparable to that of EPYC or Xeon.

"So, $2 billion would take roughly 1.6 million CPUs, if that is done over the course of a couple years — eight quarters — that is an average of 200,000 units per quarter," McCarron explained. "For comparison, in 2025, the combined EPYC and Xeon SP markets averaged just under 5 million units per quarter, and of course, that is going to be growing rapidly in 2026 and beyond. So, Arm's $2 billion in server CPU revenue requires them to sell just 4% of the total units right now, and this would be an even smaller percentage of the total in a couple years."

Since Meta is a co-designer partner and lead customer for Arm's AGI CPU, it might get a considerably lower price, which means that Arm will have to supply more units to meet its revenue target, which will mean a higher market share at the cost of lower profits.

"While those [ASP] figures span entry-level to the largest cores, the volumes (and ASPs) are dominated by the hyperscalers," explained McCarron. "When you buy hundreds of thousands of units at a single time, there are some volume discounts, which is why the ASPs are in the low thousands and not $10,000+."

*Other Intel server products were excluded from the comparison as they are not direct competitors to Arm-based data center CPUs.

But can Arm supply?

Given the widespread shortages of everything from wafers at TSMC to memory and from storage devices to advanced chip packaging capacity, we can only wonder whether Arm can increase its output of its AGI CPUs in the next two years by a factor of two. The company has not given a positive answer straight away, but it claims that it is working on it.

"How quickly can we get units?" Rene Haas asked rhetorically. "The number that we talked about end of March was supply in place to support $1 billion of demand, and that includes memory, that includes wafers, that includes packaging, that includes access to test equipment. For the $2 billion, we are now in the process of securing supply to support that. The teams are working around the clock to make sure we can find the right answers for our customers."

Strategic positioning

Strategically, Arm positions its AGI CPUs not as traditional off-the-shelf processors competing directly with merchant CPU vendors and/or custom silicon designed by (or for) leading hyperscale cloud service providers, but as scalable compute platforms and subsystems that hyperscalers and OEMs can use for specific workloads and vertically integrated AI stacks.

The first-gen Arm AGI processor was co-developed with Meta, which will be the first and lead customer for the CPU. Nonetheless, Cerebras, Cloudflare, F5, OpenAI, Positron, Rebellions, SAP, and SK Telecom plan to deploy the Arm AGI CPU for a variety of use cases that include agentic AI CPU workloads. These include accelerator management and control plane processing, as well as other CPU workloads that support AI agent infrastructure or typical cloud workloads.

While the AGI processors will not be available on demand like server CPUs from AMD and Intel, interested parties will be able to get AGI-based rack-scale solutions from such OEMs and ODMs as ASRock Rack, Lenovo, Quanta Computer (which is the leading supplier to Meta), and Supermicro.

On the hardware side, Arm claims that its AGI processor is the world's most efficient agentic CPU. In particular, Arm claims that its AGI CPU was purpose-built as a new class of processor for sustained parallel performance at rack scale, delivering high 'per-task performance' without throttling across thousands of cores and retaining modern data center power and cooling limits.

Arm's 1^st Generation AGI is a data center-bound processor that features up to 136 high-performance Neoverse V3 cores at up to 3.70 GHz, based on the Armv9.2 instruction set architecture, equipped with dual 128-bit SVE2 (Scalable Vector Extension 2) units per core, as well as 2MB of L2 cache per core.

The CPU features a 12-channel DDR5 memory subsystem supporting up to 6 TB of 8800 MT/s memory, providing up to 6 GB/s of bandwidth per core, and has an I/O that supports 96 PCIe Gen6 lanes with CXL 3.0 on top for caching and memory expansion. The CPU is comprised of two identical chiplets (with their own memory interfaces and I/O) made using a 3nm-class process technology and has a thermal design power of 300W.

Arm has a roadmap for its own AGI processors that spans years. While the company does not disclose it to the public, its management implies a consistent and significant core count increase, and believes that agentic AI workloads will call for racks full of CPUs rather than racks that pack a few CPUs and tens of AI accelerators. When it comes to agentic AI workloads, they will not call for more CPUs, but rather for more CPU cores; hence, the rapid core count increase seems to be a logical evolution for Arm's own AGI processors.

"The way I think they think about it is that while the ratios may not go to more CPUs than GPUs from a chip standpoint, they probably will from a core count standpoint," said Rene Haas, chief executive of Arm, during the recent earnings call. " CPUs today, the Arm AGI CPU, for example, has 136 CPU cores. [Nvidia's] Vera, that is 88. As I mentioned earlier, could I see those core counts doubling or quadrupling over the next number of years? Absolutely. […] Will you see many more CPUs inside a data hall, dedicated racks of CPUs that are doing agentic orchestration and scheduling and management? 100%."

With up to 136 highly high-performance cores optimized for agentic AI and data center workloads and available starting from Q4 2026, Arm's AGI CPU is poised to be in high demand from those who need high-end CPUs to run their AI agent infrastructure and whose software stack is already optimized for Arm.

Arm braces for AGI influx

Orders for Arm's 136-core AGI CPUs have doubled to over $2 billion since their announcement on March 24. The development is a result of the skyrocketing growth of demand for CPUs for agentic AI infrastructure and reflects similar occurrences at AMD and Intel. The company now expects to generate $15 billion in AGI CPU sales and $10 billion in IP revenue in fiscal 2031 (which ends on March 31, 2031), increasing its revenue by 9.5X in five years.

However, while $2 billion by FY2028 and $15 billion in FY2031 look like a huge amount of money, Arm will remain a strong contender, rather than a major supplier of data center CPUs, as AMD and Intel earn tens of billions per year selling their EPYC and Xeon parts and are projected to earn hundreds of billions in the 2030s.

Mercury Research believes that Arm could ship roughly 1.6 million of AGI CPUs over the next two fiscal years, which looks pale compared to nearly 20 million of EPYC and Xeon processors sold in 2025. Still, it should be noted that Arm does not plan to compete directly with merchant CPUs as its AGI processors will be available to select hyperscale CSPs and through OEMs and ODMs that will offer rack-scale solutions based on AGI CPUs.

A tech channel that uses rather unconventional means to delid CPUs and expose the underlying silicon has caused a blip on our radar. In the episode below, you can witness the Hackinator delid an Intel Xeon Silver 4110 processor, remove the die, and etch away what remains to expose the beautiful shimmering silicon patterns. We’ve seen similar dies before, but the Hackinator’s special sauce is going through this process in a devil-may-care manner with tools like a butcher knife and a blowtorch.

The helpless Xeon was placed on a wood chopping block at the start of the video. Then the process begins with washers around the screw heads driven into the wood, clamping the chip into place, making it impossible to escape.

Now the torture begins, with a hot air soldering gun brought into frame, held on a tripod. This will have eased the solder/glue bond that keeps the integrated heat spreader (IHS) in place. Now we see why the Hackinator is called the Hackinator, as they get busy with a Gerber hunting knife and a flat-edged screwdriver. The prying is pretty rough, as this isn’t a delid done for direct die cooling. At the end of this process, this Xeon isn’t going to do any calculating.

With the IHS discarded, the Hackinator adds a metal frame and reapplies grip screws to the substrate before more heating and prying ensues. Eventually, we see the silicon sliver exposed, but it isn’t freed until after a blowtorch is used to decimate the substrate.

With the scorched die liberated, the next step is to clean soot and other residue away with a spray and a toothbrush. With this done, the Hackinator prepares some fine etching paste. This was applied and brushed onto the silicon die. It appears to have removed a protective and obfuscating layer protecting the underlying silicon chip structure.

Previous die shots we’ve seen are the product of far more clinical, precise, and measured machinations, with a meticulous and considered lapping stage ahead of the finished die shots. However, zooming in on this seemingly rough work using a powerful microscope does indeed reveal some intricate details of the Xeon Silver silicon die. Admittedly, there is evidence of some material that wasn’t removed cleanly, but the Hackinator’s results are probably far better than may have been expected for the brutal methodology applied.

One of the highlights of Intel's first-quarter earnings report last week was improved sales of its client and data center processors as a result of improved output and yield, as well as high demand. Last week, industry analyst Ben Bajarin said the company was now selling what would normally be 'scrap' or 'low-expectation' CPUs, which helped boost margins. We followed up with industry veteran Dan Hutcheson for more details, and he notes that some of the company's recent yield gains are less about breakthrough inventions and more about disciplined execution improvements under its new manufacturing leadership.

Dan Hutcheson, vice chair of TechInsights, told Tom's Hardware that while techniques like binning and statistical process control (SPC) have been standard practice at Intel for about 40 years, recently — starting from around late 2024 when Naga Chandrasekaran, the current head of Intel Foundry, joined the company — Intel focused on tightening yield distribution across the wafer by reducing edge-related variability.

Specifically, Intel now runs a continuous process improvement (CPI) program after a node enters high-volume manufacturing, so by now it has implemented certain edge-specific process correction methods in a bid to reduce quality variability from the center to the edge of a wafer to get more sellable silicon from a single wafer.

"When it comes to manufacturing, it takes a year or two to make these kind of dramatic changes," Hutcheson told Tom's Hardware. "There’s just nothing new here. Intel has binned lots since the 1980s. Yield distributions are always heteroscedastic from the center to the edge of the wafer. Actually, one of the things Naga Chandrasekaran's yield management efforts have changed is to narrow the spread to the edge of the wafer. Hence, they are getting more revenue-per-wafer for little cost. The beauty of it is that the improvements are node independent."

As a result, Intel can now extract more high-quality dies from a single wafer and, perhaps even more importantly, more sellable dies from a single wafer, which improves output and productivity. Essentially, chips that previously might have been scrapped or too marginal to sell are now binned into lower-tier SKUs and sold because the demand is strong, according to Ben Bajarin, chief executive and principal analyst at Creative Strategies.

"Got some clarity from Intel IR on additional lift to margins," Bajarin wrote in an X post. "Intel got an unexpected margin lift from better yield salvage. Chips that would normally have been lower-value edge-die on the wafer were binned down and still sold into usable SKUs, turning what may have been scrap or low-expectation output into incremental revenue. Customers did not care, just said 'I will take it all.' That is the demand environment we are in for CPUs."

This can be interpreted in different ways, but it is feasible that the yield distribution improvements have made lower-quality chips now viable products, or that the company created even lower-tier SKUs to harvest even more chips.

More importantly, the aforementioned tightening yield distribution improvements are said to be largely node-independent, which means they benefit multiple process technologies rather than the existing nodes, such as Intel 7/4/3. Indeed, there are many ways to reduce edge-related variability, and many of them are node independent, which means some of the methods developed at Intel should be applicable to 18A (though that isn't confirmed). In fact, one of the comments Intel made during its earnings call is that the yield curve of 18A progresses at a pace that is higher than expected.

"Lip-Bu had a [18A yield] target as we came into this year for the end of this year, and we are probably going to hit that probably the middle of this year," said David Zinsner, chief financial officer of Intel. "So, you know, he has done a very good job working the team to drive a better response there."

Last year, Intel canceled the 8-channel variant of its upcoming Diamond Rapids server lineup, choosing instead to focus on only the 16-channel SKUs. The "Xeon 7" family was originally supposed to launch later this year, but new information from leaker Jaykihn suggests it's been pushed back to 2027. That means Diamond Rapids won't be able to compete directly with AMD's EPYC Venice CPUs that're (still) slated for 2026.

The leak also says, at launch, the Diamond Rapids family will top out at 256 cores (all P-cores), but 512-core silicon will follow a few months later, both featuring 16-channel memory. That means up to 1.6 TB/s of throughput thanks to MRDIMM 2 support. The P-cores inside Diamond Rapids will be using the "Panther Cove-X" architecture, and both the 256- and 512-core lineups are rumored to be compatible with the LGA9324 socket.

Diamond Rapids will be the last Xeon generation without hyperthreading support, as the next-gen Coral Rapids lineup is said to bring back SMT. Speaking of which, Coral Rapids is apparently planned for a mid-2028 launch and will begin with 8-channel variants. However, the rollout can be called up and accelerated in response to market demand, as stated in Intel's recent quarterly earnings call. Beyond that, details on Coral Rapids and its specs are currently nonexistent.

Lastly, the post above claims Clearwater Forest is due in the first half of 2026. As a reminder, Clearwater Forest is the successor to the existing Sierra Forrest lineup, which features only E-cores, but with major upgrades. It's classified as the Xeon 6+ platform, meant to bridge the gap between Xeon 6 and Xeon 7 (Diamond Rapids). As such, it's manufactured on the Intel 18A node and features up to 288 Darkmont E-cores. It supports 12-channel DDR5-8000 memory.

Most of this information isn't official, so exercise caution before taking it at face value. With Intel's roadmaps being as unclear as they are, a lot can change between now and even the second half of the year when Diamond Rapids was originally supposed to launch. In contrast, AMD's EPYC Venice and Verano lineups seem remarkably stable, with the former on track for launch later this year and the latter in 2027.

You'll notice we didn't talk about the Arc Xe graphics mentioned in the leak — that's because we've already covered that in detail in another post. With all the focus on data centers and AI, consumer products such as dedicated gaming GPUs keep getting sidelined, but at least the CPU side of things for the mainstream segment isn't as affected. Nonetheless, it's shaping up to be a fierce server battle between the Red and Blue Teams in the coming years.

Intel said during its Q1 2026 earnings call that the ratio of CPUs to GPUs deployed in data centers could tighten by as much as 1:1 in agentic scenarios as AI workloads shift from training to inference. Currently, one CPU is needed for every four to eight GPUs in an AI server, but with Agentic AI, that shifts dramatically to one CPU per GPU. That shift has driven server CPU prices up by as much as 20% since March, with Intel already having confirmed back in October that it’s prioritizing data center chip production over consumer CPUs to meet demand it can’t currently fulfill.

One of the standout details from the call was how CFO David Zinsner described server deployments as shifting, with the ratios of CPUs to GPUs in data centers having already moved from 1:8 to 1:4. He added that as workloads continue migrating towards inference and agentic AI, that ratio could converge to 1:1 or even tilt further in favor of CPUs. “As you think about the growth rate now going forward, it’s [CPU demand] going to become a significant part of the AI [total addressable market],” Zinsner said.

At 1:8, a rack filled with eight GPUs needed a single server CPU to manage orchestration and data handling. But at 1:4, that same rack needs twice as many CPUs, and eight times as many at 1:1. Intel is already supply-constrained on Xeon, with Zinsner stating during the call that the unmet demand “starts with a B. So it’s meaningful.” Server CPU lead times are currently around the six-month mark, with both AMD and Intel acknowledging the demand spike at last month’s Morgan Stanley conference, where Zinsner called the CPU “cool again.”

This supply crunch is translating directly into price increases, with the Commercial Times reporting earlier this week that server CPU prices have risen 10% to 20% since March, with consumer CPUs up 5% to 10% over the same period. Intel raised PC CPU prices in March and adjusted server CPU pricing again at the beginning of April. Analysts expect another round of increases of 8% to 10% in the second half of 2026.

On the call, Zinsner confirmed that higher average selling prices contributed to Intel's Q1 results. "As core count increases, we get the lift on the ASPs from that, and that obviously is meaningful," he said. Intel posted Q1 revenue of $13.6 billion, beating its own guidance midpoint by $1.4 billion, with its Data Center and AI group up 22% year over year to $5.1 billion.

To keep server customers supplied, Intel has been shifting wafer capacity away from client CPUs. The company has been prioritizing data center output since at least October, when Zinsner first acknowledged that capacity constraints on Intel 10 and Intel 7 were limiting the company's ability to serve both markets simultaneously.

Intel says it expects full-year PC unit volumes to decline by low double-digit percentages, and that client revenue should flatten from Q2 onward. Q1 revenues were also partly aided by sales of previously reserved inventory, including older chips that were shipped to meet demand despite their age, adding that supply will increase every quarter going forward, but that the same inventory benefit is unlikely to repeat in Q2.

Intel on Thursday published its financial results for the first quarter, and its stock rocketed 28% in after-hours trading, hitting an all-time high of $80.01. The results saw Intel significantly beating its own outlook by $1.4 billion due to rising demand for data center-grade CPUs, decent demand for client products, and increased output and productivity at Intel's own fabs. Despite results that are well above seasonality, the company still posted a rather massive $3.7 billion loss as it wrote down Mobileye goodwill and restructuring charges. However, the results can be considered positive as on a non-GAAP basis, the company recorded $1.5 billion in net income.

"We delivered robust Q1 results, reflecting the growing and essential role of the CPU in the AI era and unprecedented demand for silicon, as well as our disciplined execution to expand available supply," said David Zinsner, Intel CFO. "We remain focused on maximizing our factory network to improve available supply and meet our customers’ needs throughout the year."

In the first quarter of 2026, Intel earned $13.6 billion in revenue, up 7% year-over-year (YoY), and flat with the fourth quarter of 2025, meaning that the results are well above seasonality. The company's R&D and SG&A expenses totaled $4.4 billion, down 8% from $4.8 billion in the same quarter a year ago, whereas its gross margin increased to 39.4% from 36.9% in Q1 2025. In addition, Intel generated $1.1 billion in cash from operations. Nonetheless, the company recorded a $3.7 billion GAAP loss in the first quarter of 2026, up massively from $800 million in Q1 2025.

However, the loss is a result of a $4.07 billion 'restructuring and other charge,' which includes a $3.447 billion (primarily) Mobileye goodwill impairment charge and $623 million restructuring and other charges. That said, the losses were largely driven by accounting charges required under GAAP, rather than weakness in Intel’s core product business, although the company’s foundry division continues to generate significant operating losses.

Intel Products: Better than before, worse than could have been

At a high level, Intel's product business is clearly stabilizing. Among improved demand, the company attributes its improved business results to higher output and productivity of its own fabs that make chips on its Intel 7/4/3 process technologies. Nonetheless, Intel admits that it cannot meet all the demand, which limits its growth.

The Client Computing Group (CCG) generated $7.7 billion in revenue, $2.5 billion operating income, and 32.6% operating margin in Q1 2025, which is clearly up from $7.6 billion revenue, $2.4 billion operating income, and 30.9% operating margin in the same quarter a year ago. Keeping in mind that sales of PCs in the first quarter were affected by the turmoil on the DRAM and storage markets as well as demand outstripping supply (partly because Intel continues to shift some capacity from client to data center products) CCG's results can be considered good.

" Even with improved factory output demand outstripped supply against a client TAM that remains resilient despite industry-wide component shortages and inflationary pressures," Zinsner said. "Our AI PC revenue grew 8% sequentially and now represents greater than 60% of our client CPU mix."

The Data Center and AI (DCAI) increased its earnings to to $5.1 billion, up 22% year-over-year and up $400 million quarter-over-quarter. Perhaps more importantly, the business unit's operating margin increased to 30.5%, and it generated $1.5 billion in operating profit (up from $0.6 billion a year before).

This growth reflects a meaningful shift in demand: hyperscalers are deploying more CPUs alongside accelerators as AI workloads move from training toward inference and agentic workloads. Intel claims this marks a structural change in the AI stack as CPUs reclaim their role in the data center and are set to increase attach rates per GPU, which remain primary compute engines. In addition, Intel cited yield and productivity improvements at its Intel 3-capable facilities that produce Xeon 6 processors as major factors for increased margins and profitability of DCAI.

Intel's 'All Other' segment — which includes Mobileye and IMS mask writing services — remains small after deconsolidation of Altera in Q3 2025. During the quarter, its revenue totaled $628 million, down 33% year-over-year (largely due to the deconsolidation of Altera), but at the same time, the segment generated $102 million in operating income, which is good news as it lost $8 million in the previous quarter.

Intel Foundry: Produces gems, absorbs losses

Intel's Foundry division produces the company's most profitable products for client and data center applications and also absorbs all the losses of the company. The division generated $5.4 billion in revenue last quarter (up from $4.7 billion in Q1 2025), but posted an operating loss of roughly $2.4 billion (up from $2.3 billion in Q1 2025), which means an operating margin near -45%.

The current result reflects higher output (which drives revenue) as well as the early 18A ramp (which generates higher losses). Essentially, Intel Foundry absorbs the full cost of ramping 18A, including low yields, high depreciation, as well as heavy R&D spending on future nodes like 14A. While Intel highlighted improving yields across all of its latest nodes (7/4/3) and growing advanced packaging backlog, external foundry revenue remains minimal, and meaningful customer-driven volume is unlikely before late 2026 or 2027 with 18A or even later with 14A. One thing to keep in mind here is that EUV-based Intel 3/4/18A nodes still represent a minor share (over 10%, probably less than 20%) in Intel's total product mix, which leaves a lot of space for growth.

Intel's messaging during the conference call with investors and analysts emphasized Foundry's progress: better yields, improving factory output, and increasing customer engagement, including partnerships with companies like Google and participation in large-scale initiatives such as TeraFab. While these are important signals, they do not yet translate into financial success for the foundry business.

Q2 2026 outlook

Intel expects its second quarter of 2026 to show modest sequential growth and projects revenue to be from $13.8 billion to $14.8 billion and non-GAAP gross margin of 39%.

The company's management expects demand for data center CPUs to remain strong, as well as demand for client processors to remain robust, as many PC makers have accumulated enough DRAM and 3D NAND for their systems. However, Intel warns that demand may outstrip supply and also says that in the second half of the year, memory and SSD supplys will be depleted, forcing PC makers to obtain their memory at spot prices, passing increased costs to consumers, which will hit PC sales. In addition, as Intel will increase output of its Core Ultra 3-series Panther Lake processors by six or seven times in Q2, its margins will take a hit.

With production of Core Ultra 300 'Panther Lake' and Xeon 6+ 'Clearwater Forest' ramping at Intel's fab in Arizona, Intel is seemingly on the right track to recovery in the coming years. While it's not out of the woods yet, Intel's market capitalization on Thursday was its highest in over 25 years, or since the dot-com boom went bust, according to CompaniesMarketCap.com.

Intel's market capitalization increased to $305 billion on Thursday, up 3.5X from mid-April 2025, and up 2.8X from August 20, 2025, when the U.S. government announced plans to acquire a 10% stake in Intel. The company is now the world's 48th most valuable company by market capitalization. While it trails ASML, AMD, Applied Materials, Lam Research, and other semiconductor peers, it is well ahead of KLA, IBM, Siemens, and Texas Instruments.

The sharp increase follows Intel's announcement of Google's commitment to use Xeon processors for years to come, which emphasizes relevance of Intel's CPUs; the TeraFab partnership, which gives a nod to Intel's capabilities in design, produce, and package high-performance processors at scale; and a host of various AI-related narratives meant to demonstrate applicability of the company's products in the rapidly growing artificial intelligence sector.

Intel's peak market capitalization was $502.71 billion at the height of the dot-com cycle in August 2000, when the company dominated both PCs and web servers. In today's dollars, that would be around $1.0 trillion. Formally, Intel's current capitalization of $305.25 billion is higher than its $219.1 billion capitalization in late 2003 when the company took the rapidly growing laptop market by storm with its Centrino platform and re-accelerated its growth.

Nonetheless, $305 billion is higher than Intel's peaks in recent years: $257.23 billion in mid-2018 due to Intel's dominance in the growing data center sector $273.43 billion in early 2020 due to the cloud computing boom, and $262.87 billion in April 2021 due to the PC market and cloud computing growth amid the pandemic. That said, Intel is indeed going in the right direction, at least if you ask investors.

Still, Intel's valuation history reflects a transition from a dominating CPU vendor commanding PCs and servers to a mature, execution-sensitive semiconductor company. Intel's market capitalization today is driven more by its strategic narratives associated with AI, foundry, and process technology ambitions, and mid-term product roadmaps than by its earnings. The recent climb toward ~$300 billion indicates renewed investor optimism, but unlike the 2000 peak, this optimism is based on expectations of a turnaround rather than on the already achieved dominance and expectations for skyrocketing sales.

Intel and Google on Thursday announced a multi-year collaboration under which Google will continue deploying Intel Xeon platforms for its next generation of AI and cloud infrastructure. These platforms will rely not only on Intel's upcoming Xeon CPUs, but also on custom infrastructure processing units (IPUs) co-designed by Intel and Google. The announcement comes amid the accelerating adoption of custom Arm-based processors for AI workloads.

"Scaling AI requires more than accelerators - it requires balanced systems. CPUs and IPUs are central to delivering the performance, efficiency and flexibility modern AI workloads demand," said Lip-Bu Tan, CEO of Intel.

Google currently employs Intel Xeon 5 and Intel Xeon 6 processors for a variety of workloads, including large-scale AI training coordination, latency-sensitive inference, and general-purpose computing. For example, Intel's latest Xeon CPUs power C4 and N4 instances. Although Google's custom Armv9-based Axion processors provide the cloud giant more control and efficiency at lower cost, many workloads that are run in Google's data centers need to either be backwards compatible with x86 or just need maximum single-thread performance offered by Intel Xeon CPUs. This is something that is expected to continue for years to come, which is why the two companies inked the deal.

In a bid to make Intel Xeon platforms more efficient and suitable for its hyperscale data centers, Google will also co-develop custom IPUs together with Intel to offload networking, storage, and security functions from host CPUs. Ultimately, Intel Xeon platforms will combine x86 architecture with high single-thread performance and custom-built infrastructure processing, which will make them more competitive in Google's highly customized environments.

"CPUs and infrastructure acceleration remain a cornerstone of AI systems — from training orchestration to inference and deployment," said Amin Vahdat, SVP & Chief Technologist, AI Infrastructure, Google.

The announcement comes at a time when hyperscalers and AI platform developers are accelerating the adoption of their own custom CPUs based on the Arm instruction set architecture. Just a week ago, Counterpoint Research released a note claiming that 90% of AI servers running custom-silicon processors will rely on the Arm ISA, leaving x86 and RISC-V about 10%. The announcement by Intel and Google clearly states that Xeon CPUs with custom IPUs will continue to be used for AI and other demanding workloads for years to come, which is something to be expected anyway.

Intel's Xeon processors have powered cloud infrastructure since its inception in the 2000s, and Google's own servers before that, so x86 in general and Xeon in particular will not leave Google's data center premises any time soon. Nonetheless, the announcement clearly reemphasizes the relevance of Intel's Xeon CPUs, and when such a message comes from Google — which has been deploying special-purpose custom accelerators for years across virtually all of its services — it gets amplified significantly.

"Intel has been a trusted partner for nearly two decades, and their Xeon roadmap gives us confidence that we can continue to meet the growing performance and efficiency demands of our workloads," Vahdat added.

After revealing them last month, Intel has officially launched its Xeon 600 range of workstation CPUs. Previously known as Granite Rapids-WS, the range includes 11 SKUs, five of which will be available in boxed retail units. The chips support Intel’s updated vPro platform, alongside a range of Panther Lake chips that are now certified for business use with vPro.

Intel hasn’t shared new benchmarks for its Xeon 600 CPUs, still leaning on a claim of up to 61% faster multithreaded performance and up to 9% better single-threaded performance compared to last-gen Sapphire Rapids-WS chips. The news is that Xeon 600 CPUs are now available, starting at $499 and going up to $7,699. That includes OEM systems, boxed retail units, and motherboards with the new W890 chipset; though, Intel says you need to check with individual retailers on specific SKU availability.

As a recap, Xeon 600 are supported on the new W890 chipset, supporting up to 4TB of ECC memory in eight channels at up to 8000MT/s. The platform also supports up to 128 PCIe 5 lanes. For the chips themselves, they scale up to 86 scores using the Redwood Cove microarchitecture. Xeon 600 chips exclusively use the P-core design, with support for Hyper-Threading. They also come with Intel AMX in each core, with support for FP16 instructions to accelerate AI workloads, along with AVX-512 support.

As a recap, Xeon 600 are supported on the new W890 chipset, supporting up to 4TB of ECC memory in eight channels at up to 8000MT/s. The platform also supports up to 128 PCIe 5 lanes. For the chips themselves, they scale up to 86 scores using the Redwood Cove microarchitecture. Xeon 600 chips exclusively use the P-core design, with support for Hyper-Threading. They also come with Intel AMX in each core, with support for FP16 instructions to accelerate AI workloads, along with AVX-512 support.

Alongside Xeon 600, Intel is launching Core Ultra Series 3 (formerly known as Panther Lake) chips for businesses with vPro certification. The lineup is slimmer compared to the client Core Ultra Series 3 stack, but the specs are identical. The difference, of course, is Intel vPro support.

Like the client stack, Core Ultra Series 3 processors with vPro support up to 96GB of LPDDR5 memory and up to 12 PCIe 5 lanes. The SoC is the first to use Intel’s 18A node on the compute tile, which combines Cougar Cove P-cores with Darkmont E-cores. The chips also come with Intel’s latest NPU 5 AI accelerator and an Xe3 iGPU with up to 12 cores. As we’ve seen with devices like the Asus Zenbook Duo, the iGPU is where Core Ultra Series 3 processors really earn their stripes, particularly the X-series models with the full 12 Xe3 cores.

You can see that from Intel’s internal benchmarks, as well. The Core Ultra X7 358H holds some victories over AMD’s competing Ryzen AI 9 HX PRO 375 in general productivity workloads, but it runs away with graphics performance. Intel also claims significantly higher AI performance in Geekbench AI 1.6. Keep in mind, however, that Geekbench is a pure benchmark; it isn’t a real-world workload.

Intel details ‘all-new’ vPro platform

Both Xeon 600 and Core Ultra Series 3 chips for business support Intel’s updated vPro platform, which includes a handful of new features. For starters, Intel is expanding what vPro covers with the vPro Certified Apps and Accessories Program. As the name suggests, Intel is working with ISVs and OEMs to validate applications and accessories for vPro use. On the application side, Intel says vPro certification means apps are “optimized for battery life and performance,” while for accessories, they’re “certified for seamless connectivity.”

Through early engagements with ISVs, Intel says it’s seen up to a 59% reduction in CPU utilization in FlexxAgent (an endpoint application for centralized IT management) with vPro optimizations, a 56% improvement in power efficiency in Riverbed Aternity (an employee management platform), and a 74% reduction in background activity in Absolute Secure Endpoint. Alongside these applications, Intel says it has partnerships with ESET, Citrix, and Crowdstrike, among others, along with Dell, HP, Jabra, Lenovo, and Logitech on the accessories front.

Also new is Intel Device IQ, which is enabled through Lakeside, Riverbed, Control Up, and Flexxible software. Intel says Device IQ “collects PC telemetry, [and] uniquely applies local AI to trigger remediation directly on the device.”

On the security front, Intel has added its Total Storage Encryption (TSE) feature to vPro, alongside Intel Threat Detection Technology. The latter can detect malware in real-time using AI, says Intel. On the NPU, Intel announced support for CrowdStrike Falcon Data Protection, using the onboard AI capabilities to protect sensitive data during agentic AI workloads (we’ve certainly seen those workloads go wrong in the past). Finally, Intel is extending the servicing window for Core Ultra Series 3 machines with vPro to 10 years.

Intel says it has over 125 designs for Panther Lake machines that support vPro, including the usual names like Acer, Asus, Dell, and HP, alongside more commercial-focused OEMs like Fujitsu, Panasonic Connect, and Dynabook. Designs start rolling out on March 31.

Intel's 2026 roadmap is unlike any the company has published in recent years, because its manufacturing ambitions and its product launches have to succeed simultaneously.

Panther Lake, the Core Ultra Series 3 laptop processor unveiled at CES in January, is the first consumer chip built on Intel 18A — the company's new process node combining RibbonFET GAA transistors with PowerVia backside power delivery. Clearwater Forest, the next-generation Xeon E-core server CPU formally introduced March 3 at MWC 2026, is the server counterpart to it, and both are proof points for a foundry business that Intel has publicly stated could not justify proceeding to its next node, 14A, without first securing a major external customer.

Meanwhile, Intel is currently shipping the AI data center chip Gaudi 3, which has been available through cloud partners since late 2024. The chip was supposed to be followed by Falcon Shores, but Intel cancelled it for commercial release and confirmed it would deploy the chip internally instead, redirecting its GPU roadmap toward inference workloads. That produced Crescent Island, an inference-focused data center GPU which is expected to enter customer testing in the second half of 2026, with a potential successor in ‘Jaguar Shores’, due 2027.

Meteor Lake to Nova Lake

Since 2023, Intel's consumer CPU roadmap has focused on architectural consolidation, including the abandonment of the monolithic die. Meteor Lake, which launched in December 2023 as the first Core Ultra series processor, moved Intel's consumer laptop chips onto Intel 4 with Foveros 3D packaging, splitting compute, graphics, SoC, and I/O functions across separate tiles connected via hybrid bonding. That was an inflection point, with every subsequent generation iterating on that foundation rather than departing from it.

Then came Lunar Lake, the Core Ultra 200V series that launched in September 2024, which Intel hailed as its most power-efficient x86 platform, targeting the Copilot+ PC category with a fourth-generation NPU and the debut of the Xe2 graphics architecture. Arrow Lake followed in October 2024 as the desktop counterpart under the Core Ultra 200S branding.

While both share the multi-tile approach, they diverge at the process level. Arrow Lake consumer parts don’t use Intel 20A; Intel publicly confirmed the decision to use external nodes instead — almost certainly from TSMC — for the consumer desktop line. Intel originally said that 20A would be the node that would introduce RibbonFET and PowerVia, but the company moved those technologies to 18A instead and treated 20A as a stepping stone it bypassed for production.

Panther Lake, announced at CES in January 2026 as Core Ultra Series 3, is the first client platform built on Intel 18A. Intel cited over 200 system designs in development across laptop partners, alongside a claimed 60% better multi-threaded performance versus Lunar Lake at similar power, and up to 180 total platform TOPS — 120 of which come from the Xe3 integrated GPU and 50 from the NPU 5 architecture. Those figures are Intel estimates tied to specific workloads and comparison generations; the NPU alone meets Microsoft's 40 TOPS threshold for Copilot+ PC certification, but the 180 TOPS figure reflects all three compute engines combined.

Nova Lake is next, with Intel's Q4 2025 earnings guidance initially targeting an end-of-2026 launch. This, as we understand, is likely to be delayed to 2027; process node and die configuration details remain unconfirmed, and it’s far too early to speculate given that the upcoming Arrow Lake refresh (Core Ultra 200K Plus) is still to come.

Xeon and data center CPUs

Xeon 6 formalized a split Intel had been building toward for several years: P-core variants targeted at compute-intensive and AI inference workloads, and E-core variants aimed at density, throughput-per-watt, and scale-out workloads like containerized cloud infrastructure.

Sierra Forest launched in June 2024 as the first Intel 3 server product. Its E-core design packs a high thread count into a constrained thermal envelope, making it well-suited for high-density rack deployments. Granite Rapids, the P-core counterpart, followed in September 2024, targeting scientific computing, high-performance databases, and AI inference on large models. Both families share a common platform foundation — a unified I/O die connected via EMIB packaging — which reduces platform churn for OEMs and provides a validation reuse advantage across derivative SKUs.

Meanwhile, Clearwater Forest, introduced March 3 at MWC 2026, is Intel's first 18A server CPU. Expected to be released later this year, the chip packs 288 Darkmont E-cores across 12 compute chiplets in its maximum configuration, each with 24 cores all built on 18A. Those compute tiles are stacked on three active base dies fabricated on Intel 3 using Foveros Direct 3D, while two I/O tiles on Intel 7 handle connectivity, and lateral integration across the package is handled by EMIB.

EMIB 3.5D then extends this further by combining those Foveros-stacked modules with Intel's second-generation EMIB bridges — scaled from 55-micron to 45-micron bump pitch — to link heterogeneous tiles laterally across the package, whether those are identical compute modules or disparate I/O and memory dies. The result is a package whose total silicon area far exceeds what a conventional silicon interposer could accommodate. A clean Clearwater Forest launch would therefore validate both Intel 18A and its advanced packaging simultaneously.

Finally, Diamond Rapids will arrive as an exclusively 16-channel platform after Intel cancelled the 8-channel SKUs that were originally planned for the Xeon 7 lineup. The remaining parts are expected to pack up to 192 P-cores across four compute tiles in an LGA9324 package, with 2nd-generation MRDIMM support pushing memory bandwidth to roughly 1.6 TB/s — nearly double Granite Rapids' ~844 GB/s. Intel has indicated a 2H 2026 launch window, but has said nothing more solid at this stage.

AI accelerators

Intel’s AI accelerator portfolio hasn’t followed as clean a generational progression as its CPUs have. Gaudi 3, as previously mentioned, is the current shipping product and has been available through cloud partners and direct customers since late 2024, with Intel expanding availability throughout 2025.

Intel has marketed Gaudi 3 around openness and software portability, with the argument being that customers locked into Nvidia’s CUDA ecosystem face procurement and pricing constraints that a chip running on open frameworks like PyTorch and oneAPI can avoid. While this has let the chip find some traction, Gaudi 3 hasn’t achieved a meaningful share in large-scale training clusters where Nvidia’s accelerators still dominate by a huge margin.

The most concrete successor to Gaudi 3 in the near-term is Crescent Island, which Intel announced as an inference-focused data center GPU in October 2025 at the OCP Global Summit, with customer sampling due to begin in the second half of 2026. The card is built on the Xe3P architecture, a performance-enhanced version of the Xe3 GPU used in Panther Lake, and carries 160 GB of LPDDR5X memory.

That memory choice is a deliberate departure from the HBM stacks used by Nvidia and AMD in their high-end accelerators: Intel is positioning Crescent Island as a power- and cost-optimized part for air-cooled enterprise servers, with Intel CTO Sachin Katti citing "tokens-as-a-service" providers as the primary target. No performance figures have been disclosed.

When and if it does sample later this year, it will be going up against AMD's Instinct MI450 and Nvidia's Vera Rubin architecture, both of which use HBM4 and target a broader range of workloads. Crescent Island's narrower inference focus could make it competitive on cost-per-token, but the 160GB LPDDR5X configuration offers substantially less memory bandwidth than HBM-based competitors, which remains the main bottleneck for large model inference.

Jaguar Shores, meanwhile, has been confirmed by Intel as a product, though technical details about it remain sparse. Intel products chief Michelle Johnston Holthaus stated during the company's Q1 2025 earnings call that Jaguar Shores remains on the AI roadmap despite the cancellation of its predecessor, Falcon Shores, and described it as a rack-scale design incorporating silicon photonics interconnects. Intel has also confirmed, via a slide shown at its AI Summit, that Jaguar Shores will carry the Gaudi brand and use HBM4 memory from SK hynix.

Should it launch, Jaguar Shores would be Intel’s first return to HBM-based AI acceleration since Ponte Vecchio, but specifications remain unconfirmed, and we’re very unlikely to see a release until 2027 at the earliest. That would put it up against Nvidia’s Vera Rubin successors and AMD’s Instinct MI500 series — and whether it can be competitive by then depends heavily on software maturity, an area where Intel’s track record in AI acceleration has been consistently weak.

Process nodes and packaging

Intel 4, which debuted with Meteor Lake, was Intel's first EUV-enabled manufacturing node, claiming 21.5% higher frequencies at the same power as Intel 7, or 40% lower power consumption at the same frequency, alongside a 2x transistor density improvement for high-performance libraries. Intel 4 also introduced second-generation Contact-over-Active-Gate, enhanced copper interconnects with cobalt cladding for better performance and electromigration resistance, and doubled MIM capacitance density to reduce voltage droop.

Production ran at Intel's D1 facility in Hillsboro, Oregon, with Fab 34 in Ireland coming online for Intel 4 volume production in late 2023. Notably, only Meteor Lake's compute tile used Intel 4; the graphics, SoC, and I/O tiles were sourced from TSMC and older Intel nodes, reflecting the limited scope of Intel 4 as a chiplet-specific node.

Intel 3 followed as an 18% performance-per-watt improvement over Intel 4, with broader EUV usage, improved transistor cells, and both I/O and high-density cell libraries suited for server workloads. Sierra Forest, which launched in June 2024 as the first E-core Xeon 6, was its first flagship product, followed by Granite Rapids with P-cores in September 2024. Unlike Intel 4, Intel 3 was designed as a more general-purpose node from the start, underpinning Intel's server ramp and serving as the base die for Clearwater Forest's heterogeneous packaging.

Intel 20A, meanwhile, was the planned introduction point for RibbonFET and PowerVia in production, and Intel confirmed it entered production readiness in 2024. But Intel also confirmed the decision to shift Arrow Lake consumer parts away from Intel 20A to external nodes. The only logical explanation for this is that Intel concentrated its 20A engineering on proving the key technologies it needed for 18A rather than committing a high-volume product line to an intermediate node.

Every product on Intel's 2026-2028 roadmap runs on Intel 18A, the company's first node to combine RibbonFET gate-all-around transistors with PowerVia backside power delivery. RibbonFET wraps the gate entirely around the channel on all four sides, improving electrostatic control and reducing leakage compared to the FinFET structures Intel used through its 10th Gen era. PowerVia routes power through the back of the silicon wafer, freeing front-side routing resources for signal interconnects. 18A entered high-volume manufacturing in October, but yields remain below profitable levels and, per CFO David Zinsner, will not reach desired cost thresholds until the end of 2026 at the earliest.

Intel 14A, which uses High-NA EUV — which Intel is the first to deploy — remains contingent on securing a major external foundry customer. The good news is that Intel has said it has two prospective customers in the works following early PDK access, and CEO Lip-Bu Tan reckons that firm supplier decisions will be made in the “second half of this year… extending into the first half of 2027.” A lot is riding on these prospective customers, with Intel having publicly discussed the possibility of slowing or cancelling 14A and subsequent nodes if external foundry revenue does not materialize at scale. Without it, the capital expenditure required to develop and ramp leading-edge nodes past 18A will become extremely difficult to justify.

The future of Intel

Whether Clearwater Forest's 2026 launch materializes will be a solid indication of whether 18A performs at the scale Intel has projected, while Panther Lake's rollout through laptop OEMs will test whether 18A volume manufacturing is genuinely ramping up or still constrained to early production quantities.

Meanwhile, any announcement from Intel Foundry on an external customer committing to 18A or beginning 14A engagement could substantially change the economics of Intel’s roadmap.

During the 10nm era, Intel's manufacturing problems were visible and protracted over several years. Today's timeline is more compressed, and Intel’s public milestones — Panther Lake and Clearwater Forest shipping on 18A in close succession — are specific enough to hold the company to account.

Intel this week formally introduced its Xeon 6+ processors codenamed 'Clearwater Forest' that pack up to 288 energy-efficient Darkmont cores and are the first data center CPUs made on the company's 18A fabrication process (1.8nm-class). Intel aims its Xeon 6+ 'Clearwater Forest' processors primarily for telecom, cloud, and edge AI workloads as they feature Advanced Matrix Extensions (AMX), QuickAssist Technology (QAT), and Intel vRAN Boost technologies.

Intel's Xeon 6+ processors with up to 288 cores combine 12 compute chiplets containing 24 energy-efficient Darkmont cores per tile that are produced using 18A manufacturing technology, two I/O tiles made on Intel 7 production node, as well as three active base tiles made on Intel 3 fabrication process. The compute tiles are stacked on top of the base dies using Intel's Foveros Direct 3D technology, whereas lateral connections are enabled by Intel's EMIB bridges.

Intel's 'Darkmont' efficiency cores have received rather meaningful microarchitectural upgrades. Each core integrates a 64 KB L1 instruction cache, a broader fetch and decode pipeline, and a deeper out-of-order engine capable of tracking more in-flight operations. The number of execution ports has also been increased in a bid to improve both scalar and vector throughput under heavily threaded server workloads.

From a cache hierarchy standpoint, the design groups cores into four-core blocks that share approximately 4 MB of L2 cache per block. At the top of the hierarchy, there is last-level cache across the full package that surpasses 1 GB, roughly 1,152 MB in total. This unusually large pool is intended to keep data close to hundreds of active cores and reduce dependence on external memory bandwidth, which in turn is meant to both increase performance and lower power consumption.

Platform-wise, the processor remains drop-in compatible with the current Xeon server socket, so the CPU has 12 memory channels that support DDR5-8000, 96 PCIe 5.0 lanes with 64 lanes supporting CXL 2.0.

Intel positions Clearwater Forest for telecom and cloud workloads. The company says operators deploying 5G Advanced and future 6G networks increasingly rely on server CPUs for virtualized RAN and edge AI inference, as they do not want to re-architect their data centers in a bid to accommodate AI accelerators. By combining matrix/vector acceleration, vRAN offloads (using the vRAN Boost), large caches, and broad I/O in one platform, the CPU can perform jobs that are normally reserved for various accelerators that consume more power and take up space.

Also, extreme core count of Xeon 6+ 'Clearwater Forest' CPUs — that approaches 288 cores for uniprocessor configurations and 576 cores in dual socket configurations, enabling a single server to host dozens or even hundreds of virtual machines while maintaining power efficiency and low latency.

Systems based on Intel's Xeon 6+ processors will be available later this year.

This week, Intel and SambaNova entered a multi-year strategic collaboration aimed at building large-scale AI inference infrastructure around Intel Xeon platforms and SambaNova AI accelerators. In addition, SambaNova introduced its SN50 AI processor for agentic inference, and inked a deal with SoftBank to deploy it at the latter's data centers.

SambaNova says its SN50 AI accelerator platform is around five times faster and three times more efficient than Nvidia's B200. Additionally, the company has signed a pact with Intel to offer Xeon-based AI systems to enterprises and governments.

"AI is no longer a contest to build the biggest model," said Rodrigo Liang, co‑founder and CEO of SambaNova. "With the SN50 and our deep collaboration with Intel, the real race is about who can light up entire data centers with AI agents that answer instantly, never stall, and do it at a cost that turns AI from an experiment into the most profitable engine in the cloud."

SN50: Purpose-built for inference

Seeing AI inference as potentially a larger market than AI training, SambaNova developed its SN50 accelerator for inference workloads, rather than training, focusing primarily on low latency for real-time applications such as voice assistants, memory and network bandwidth, and power consumption, rather than on pure compute performance. The dual-chiplet processor is based on SambaNova’s Reconfigurable Data Unit (RDU) architecture and features a three-tier memory subsystem — SRAM, HBM, and DDR5 — designed to keep multiple models resident (for rapid hot-swapping), along with mechanisms to optimize memory usage, which is handy for both memory utilization and power consumption.

The company says that the new SN50 processor delivers five times more compute per accelerator and four times the networking bandwidth compared to its predecessor. In addition, the company claims that the SN50 accelerator offers five times more compute than ‘competing’ offerings (presumably the B200, but we may be wrong), without disclosing which offerings it compares the SN50 to. The company also boasts a threefold lower cost of ownership for inference compared to GPU-based systems.

In line with the latest industry trends, SambaNova positions the SN50 RDU mainly as an ingredient of its SambaRack SN50 rack-scale solution rather than a separate processor, which is how these AI accelerators will be primarily marketed. Each 20 kW SambaRack SN50 packs 16 SN50 RDU processors, and 16 racks can interconnect up to 256 accelerators using a multi-terabyte-per-second fabric. The company stresses that at 20 kW per rack, the SambaRack SN50 operates within existing data center power envelopes and relies on air cooling, eliminating the need for liquid cooling or data center modifications.

A cluster of 256 SN50 accelerators is designed for extremely large models, including configurations exceeding 10 trillion parameters and context windows of more than 10 million tokens. SambaNova positions this capability as essential for reasoning-heavy and multi-model agentic AI workloads, which demand both scale and responsiveness.

On the performance side of matters, SambaNova cites results from SemiAnalysis’s InferenceX benchmark. When running with FP8 precision, a Llama 3.3 70B model with 1K input and 1K output tokens reportedly achieves 895 tokens per second per user on the SN50, compared to 184 tokens per second per user on Nvidia’s B200. Across a range of configurations, throughput per-RDU is presented as significantly higher than per GPU, with an average advantage of approximately 3X when latency constraints are applied across Llama 70B, GPT-OSS 120B, and DeepSeek 671B, which translates to improved cost-per-token economics.

The SambaRack SN50 systems will be available in the second half of 2026, pricing is unknown.

The pact with Intel

One of the key parts of this week's SambaNova announcements is arguably its pact with Intel. Under the terms of the deal, the companies will offer rack-scale solutions for AI workloads based on Intel Xeon processors and SambaNova AI accelerators for several years. SambaNova does not disclose which CPU powers its SambaRack SN50, but it looks like future racks from the company will be Xeon-based.

The joint effort between Intel and SambaNova targets select applications and types of customers, such as AI inference solutions for AI-native companies, model providers, as well as enterprises and government organizations worldwide. The latter two are Intel's traditional customers, which makes us wonder whether this is a coordinated go-to-market strategy through Intel's enterprise and cloud channels for SambaNova's production-ready inference systems, or a less harmonized approach.

In any case, an x86 Intel Xeon CPU, along with Intel networking technologies, will certainly make SambaRacks more appealing to enterprises and governments.

Notably, Intel emphasized that this agreement with SambaNova complements its existing GPU roadmap rather than replacing it, so the company will continue offering its own GPUs for inference and eventually for training.

Perhaps the most controversial part of the announcement is that Intel Capital is also participating in SambaNova's Series E financing round. SambaNova is chaired by Lip-Bu Tan, who also happens to be the chief executive of Intel. While it is common for companies of Intel's scale to make strategic investments in their smaller ecosystem partners, taking a stake in a business chaired by the investor's own top executive is far from routine.

The deal with SoftBank

A less sensitive, but no less interesting part of the SambaNova announcement is its pact with SoftBank. SoftBank will be the first to roll out SN50 in its next-generation AI data centers in Japan. These data centers will use the accelerator to drive low-latency inference for sovereign and enterprise customers across Asia-Pacific, running open-source and proprietary frontier models with strict performance requirements.

The move expands SoftBank's existing partnership with SambaNova, which already operates SambaCloud in the region. The new clusters based on the SN50 will be standard for SoftBank's new data centers, which effectively makes SambaNova the core inference platform for SoftBank's sovereign AI programs and upcoming large-scale agentic deployments in the region.

"With SN50, we are building an AI inference fabric for Japan that can serve our customers and partners with the speed, resiliency and sovereignty they expect from SoftBank," said Hironobu Tamba, Vice President and Head of the Data Platform Strategy Division of the Technology Unit at SoftBank Corp. "By standardizing on SN50, we gain the ability to deliver world‑class AI services on our own terms — with the performance of the best GPU clusters, but with far better economics and control."

$350 million in Series E funding

Last but not least, SambaNova has secured $350 million in strategic Series E funding to expand manufacturing and cloud capacity from such investors as Vista Equity Partners, Cambium Capital, Intel Capital, and Battery Ventures.

This all positions Sambanova into the AI inferencing market. As training workloads demand the best and fastest processors, inferencing introduces a different set of requirements, with the ongoing Intel partnership set to benefit the company, especially as Agentic AI inferencing workloads demand fast CPUs, in this case, from the likes of Intel.

AMD ended 2025 with fanfare as it managed to increase its market shares across all major CPU product segments, according to Mercury Research, and achieved a 29.2% share of all x86 processors shipped in the fourth quarter, which is an all-time record for the company. The company now controls its highest unit share across desktop, laptop, and server CPU markets while also capturing the most lucrative parts of these markets, and now controls 35.4% of x86 CPU revenue share.

Client CPUs: AMD gains 3.8% of the market in a single quarter

In the client PC segment, AMD finished 2025 with one of its strongest quarters ever, partly because Intel struggled to get enough client silicon from its own fabs and from TSMC, but to a large degree because of highly competitive desktop CPUs and meticulously calculated mobile CPU lineup.

AMD's client CPU unit share rose to 29.2% in Q4 2025, up 3.8% quarter-over-quarter (QoQ) and 4.6% year-over-year (YoY), driven by sales of both desktop and mobile offerings.

Intel remained the clear volume leader with about 70.8% of client CPU shipments, which is a sharp decline both sequentially and compared to the same quarter a year ago, which is not surprising as Intel had to reassign its internal manufacturing capacities to produce server CPUs instead of client silicon and could not get enough silicon from TSMC.

What is perhaps more alarming for Intel is that its client PC CPU revenue share declined to 68.8%, allowing AMD to control 31.2% of the dollar share of PC processor sales, up 2.9% QoQ and 7.4% YoY. This reflects AMD's higher average selling prices (ASPs), stronger sales of premium desktop and notebook processors, and continued gains in higher-margin segments.

Intel admits that it is hard to compete against AMD with its current lineup and hopes that things will begin to change in late 2026 – 2027, which means that AMD will likely continue to enjoy eating Intel's lunch in the coming quarters.

Desktop CPUs: A new record set by AMD

Given AMD's strong Ryzen 9000 lineup, Intel's inability to ship enough 14th Generation Core, and lack of Core 2 Ultra refresh in the fourth quarter, AMD was poised to win market share away from Intel in Q4, which is exactly what happened.

AMD's desktop CPU unit share climbed to 36.4%, increasing both sequentially and year-over-year as demand for its latest Ryzen processors remained strong among gamers and enthusiasts. Of course, Intel retained the majority of desktop shipments with a 63.6% share, but this is down by a whopping 9.5% from the fourth quarter of 2024, a bad hit for the company. The gap between AMD's and Intel's desktop CPU market shares is still around 27%, meaning that the blue company maintains its undisputable lead, but the pace at which AMD is shrinking it looks quite formidable.

On the revenue share side of things, AMD's performance was even more notable. The company's desktop CPU revenue share reached 42.6% in Q4 2025, which clearly indicates strong sales of higher-margin processors and a favorable product mix. Intel still generated 57.4% of desktop revenue overall, but mostly due to its great relations with large PC OEMs that tend to sell mainstream systems, and where Intel is a little more flexible than AMD to win contracts.

Mobile CPUs: AMD posts highest unit share ever

The mobile PC segment has always been Intel's stronghold as the company has traditionally offered a very wide range of CPUs that could power anything from an ultra-low-power thin and light laptop to a full-fat desktop replacement machine. Yet, it is getting harder for Intel to protect its stronghold with its Arrow Lake and Lunar Lake processors now that AMD has greatly broadened its lineup of processors for notebooks.

After floating around 22% of the market for several quarters, AMD delivered a strong recovery in Q4 2025, capturing a 26% unit share and gaining 4.1% of the market QoQ, according to Mercury Research. Intel remained the dominant supplier with 74% of the market, which represents roughly three-quarters of mobile CPU shipments. When compared to its result in the fourth quarter of 2024, Intel only lost 2.2%. However, it remains to be seen what AMD manages to do while Intel will be ramping up its Panther Lake and then Nova Lake CPUs in the coming quarters.

As far as revenue share is concerned, AMD also posted meaningful 3.3% sequential and year-over-year gains as its mobile CPU revenue share reached 24.9%. Intel continued to generate the majority of mobile CPU revenue, a little over 75%, but AMD's progress clearly indicates that the company is getting increasingly competitive not only in the high-volume laptop CPU segment, but also in higher-margin segments of the notebook market.

Server CPUs: Another quarter, another percent of the market for AMD

As data center CPU market is particularly conservative, it is hard to quickly gain or lose share. For AMD, this translates into 'another quarter, another percent of the market' gain, which means that the company is gaining ground from its rival slowly but surely and is closing the year with a new high.

Although Intel shipped 71.2% of all x86 server CPUs during the quarter (without taking into account shipments of Hygon Dhyana CPUs), AMD's server CPU unit share reached 28.8%, up 1% sequentially and 3.1% year-over-year as adoption of EPYC processors across cloud, enterprise, and AI/HPC deployments is accelerating.

As for revenue side of matters, AMD's server CPU revenue share climbed to a record 41.3%, which highlights its success in selling higher-priced, higher-margin processors. Intel commanded the majority of server CPU revenue overall — 58.7% — though it is evident that it is losing to its rival in the premium segments of the market.

Summary

If we were to summarize AMD's performance on the CPU market in 2025 in one sentence, we would say that the company was not only shipping more CPUs, but was increasingly capturing the most lucrative parts of all the markets it served due to its strong product mix and high ASPs. By contrast, Intel shipped fewer CPUs and increasingly lost the most lucrative contracts to its rival.

As a result, AMD closed 2025 with a record momentum as it managed to increase its market share across client, desktop, mobile, and server CPUs and reached a new all-time high in both x86 CPU units and revenue share, according to Mercury Research. In the fourth quarter of 2025, AMD shipped 29.2% of all x86 processors by volume and 35.4% of all x86 CPUs by revenue, both record numbers for the company.

While AMD's success was driven by a strong product mix, Intel's declines were a result of a combination of events, including a lack of competitive offerings for the high-end parts of the market as well as supply constraints in the low-end. Intel admits that to improve its position going forward, it will need to regain performance and process technology leadership as well as have enough manufacturing capacity to serve the market. Which is exactly what its management is working on these days.

Intel began to make Software Defined Silicon initiative (SDSi) preparations for its 4th Generation Xeon processors four years ago, with an aim to sell its processors and then earn a premium for letting customers activate accelerators for specific workloads. Eventually, the initiative got its official 'Intel On Demand' name… and vanished from the radar. Now, the iconic PC chipmaker is quietly discontinuing the program, reports Phoronix.

Intel largely stopped discussing its 'Intel On Demand' initiative publicly in recent years and the lack of new patches indicates that its development activity slowed, possibly meaning that Intel no longer considered it a priority. Phoronix now reports that the Intel SDSi GitHub repository — which contained the software components required to support Intel On Demand — was archived in November, signaling the end of active development. At the same time, Intel removed most On Demand documents from its website and for now everything that reminds of the program is old PDF documentation accessible through its website, according to Phoronix.

Taken together, the disappearance of software support, documentation, and public talks strongly indicates that Intel has abandoned the Software Defined Silicon initiative altogether and it will not be a part of Intel's next-generation Xeon platforms.

Intel positioned its On Demand initiative as a flexible way for customers to activate such accelerators as Software Guard Extensions, Dynamic Load Balancer (DLB), Intel Data Streaming Accelerator (DSA), Intel In-Memory Analytics Accelerator (IAA), Intel In-Memory Analytics Accelerator, and Intel QuickAssist Technology (QAT) in its Xeon processors without purchasing higher-tier models upfront. The model supported both permanent feature enablement through a one-time payment and a usage-based license that enabled Intel customers to pay only when additional acceleration capabilities were used.

Despite seeming technical flexibility, the initiative faced significant criticism from the industry. The main concern of the server crowd was the fact that accelerator IP blocks physically existed inside the processors but remained disabled unless customers paid to activate them, which sounds like Intel wanted its customers to pay for select features twice. Given such concerns, it is unclear whether On Demand ever took off. Given that the SDSi support has now been archived at GitHub, it certainly does not seem so.

Intel's shares fell sharply on Friday morning ahead of market open, after the company published its financial results for the final quarter of 2025 as well as for the whole year. The company's earnings contracted both in Q4 and for the year, so Intel's full-year revenue dropped to $52.9 billion, which is Intel's weakest result since 2010.

Despite dropping earnings, the company has managed to shrink its losses in the back half of the year, so the company only lost $300 million for the whole of 2025, which is a good result given that it lost $18.8 billion in 2024. There are a couple of catches with the result, though. Furthermore, it looks like Intel has a looming challenge for 2026, namely, meeting demand for its products. Intel's shares fell 13.5% on Friday morning following the news.

Intel's losses shrink to $300 million, but only with cash injections

For the fourth quarter of 2025, Intel reported $13.7 billion in revenue, down from $14.3 billion in the same quarter a year prior, representing a 4% year-over-year (YoY) decline. During the quarter, Intel lost $0.6 billion on a GAAP basis as its gross margin dropped to 36.1% from 39.2% in Q4 2024. Meanwhile, the company exceeded its expectations in Q4 amid a very tight supply of products due to its inability to get enough wafers from internal and external suppliers, which is a good sign for Intel as it signals strong demand.

"We exceeded Q4 expectations across revenue, gross margin, and EPS even as we navigated industry-wide supply shortages," said David Zinsner, Intel CFO. "We expect our available supply to be at its lowest level in Q1 before improving in Q2 and beyond. Demand fundamentals across our core markets remain healthy as the rapid adoption of AI reinforces the importance of the x86 ecosystem as the world’s most widely deployed high-performance compute architecture."

As for the whole fiscal year 2025, the company recorded revenue of $52.9 billion, which is more or less flat compared to the $53.1 billion posted in 2024. Yet, in 2024, the company lost some whopping $18.8 billion on a GAAP basis, and its gross margin was at 32.7%.

If we consider Intel's financial results for the year from a pure numbers point of view, then Intel did pretty well in 2025. However, a closer look reveals that the company received $2 billion from SoftBank, $4.46 billion from Silver Lake (for a 51% stake in Altera), $5 billion from Nvidia, and $8.9 billion from the U.S. government. In total, Intel got some $20.36 billion, and yet it still lost a moderate $300 million.

Intel re-allocates wafers to data center products, but still cannot meet demand

When it comes to segment reporting, the results were a mixed bag: Intel's Client Computing Group (CCG) somewhat disappointed, whereas Data Center and AI Group (DCAI) performed better than expected, which was likely an effect of the company's deliberate steering of capacity toward higher-margin products, which are, of course, data center CPUs. Meanwhile, Intel Foundry unit traditionally remains in the red.

Intel's CCG delivered $8.2 billion in revenue in Q4 2025, down 3.5% from $8.5 billion in Q3 2025 and down 6.8% from $8.8 billion in Q4 2024. Operating income of the group was $2.2 billion, down from $2.7 billion sequentially and $3.2 billion from the same quarter a year ago, as margins declined to 27%.

Traditionally, sales of Intel consumer products grow in the fourth quarter. However, although demand for Intel's CPUs for client PCs was strong, CCG revenue declined sequentially in Q4 2025 because the company prioritized constrained internal wafer supply toward higher-demand data center products, thus relying more on externally sourced wafers for client CPUs, which tends to hurt margins significantly.

"While maintaining support for our client OEM partners, where possible, we are prioritizing our internal wafer supply to data center and leveraging an increased mix of externally sourced wafers," said Zinsner.

Intel's DCAI group, which produces server parts, delivered $4.7 billion in revenue, up sequentially from $4.1 billion in Q3 2025 and up from $4.4 billion in Q4 2024. The unit's operating income reached $1.3 billion, compared with $1.0 billion in the prior quarter and $0.4 billion a year earlier, resulting in an operating margin of 26.4%, up from 23.4% in Q3 2025 and skyrocketing from 8.6% in Q4 2024.

Intel's efforts to reallocate internal supply from CCG to DCAI paid off, and DCAI's earnings grew 15% quarter-over-quarter and 7% year-over year. Interestingly, according to Zinsner, unit demand for server CPUs skyrocketed beyond expectations in the second half of the year.

"If you go back about six months and look at customer signals, core counts were expected to increase, but unit volumes were not," noted Intel's chief financial officer. "Every hyperscaler we spoke with was signaling that. Over the third and fourth quarters, unit demand increased rapidly, and in conversations just before this call, it became clear that this is likely a multi-year demand trend."

Although Intel is investing in additional production capacity for existing CPUs, the company admits that demand for its Xeon processors exceeded supply, and this will continue into 2026 as demand for data center CPUs is driven by AI infrastructure buildout.

Intel's All Other segment — which now includes its Mobileye business, IMS photomask printing operations, and some startups — posted $574 million in revenue in Q4 2025, down sequentially from $993 million in Q3 2025 and down from $1.113 billion YoY. For the first time in quarters, the All Other segment turned red, losing a modest $8 billion with a negative operating margin on 1.4%.

Intel Foundry: Making Intel products, absorbing all the losses

Intel Foundry posted $4.5 billion in revenue in Q4 2025, up 6.4% sequentially, driven by a higher mix of advanced manufacturing amid an increase in EUV wafer revenue due to increased supply of Intel 3-based Xeon 6 CPUs, high demand for Intel 4-based Arrow Lake offering, and early sales of Panther Lake wafers.

Speaking of EUV-based nodes, they now represent over 10% of Intel Foundry's revenue. To put the number into context, TSMC's EUV-based N5 and N3 process technologies and derivatives accounted for 63% (35% and 28%, respectively) of TSMC's wafer revenue in Q4 2025.

"EUV wafer revenue grew from less than 1% of wafers out in 2023 to greater than 10% in 2025," Zinsner said.

External foundry revenue totaled $222 million in the quarter, which was supported by U.S. government projects and the post-deconsolidation structure of Altera.

Still, Intel Foundry recorded an operating loss of about $2.5 billion, which reflects the early ramp of Intel 18A as well as continuous investments in internal capacity for existing process technologies.

Q1 2026 outlook

For the first quarter of 2026, Intel expects revenue of $11.7 billion to $12.7 billion, which means a year-over-year decline of about $0.5 billion.

This expectation reflects Intel being severely supply-constrained in Q1 as it sold its buffer inventory in the second half of 2025, and from now on, it can only rely on wafers that it can get from its own fabs as well as from TSMC's fabs.

"As we enter 2026, our buffer inventory is depleted," Zinsner admitted. "We do not have that [finished goods inventory] to rely on. So it is just literally hand to mouth — what we can get out of the fab and what we can get to customers is how we are managing it."

Meanwhile, Intel expects supply constraints to ease later in the year. "We expect our available supply to be at its lowest level in Q1 before improving in Q2 and beyond," Zinsner said.

The company also guides GAAP gross margin of 32.3%, which seems very low given the company's significant shipments of server CPUs and prioritization of high-margin products. Yet, given the severe supply constraints (particularly in the DCAI segment), it is a paradoxical yet possible situation.

Intel reported its financial results for the fourth quarter and full year of 2025, closing the year with $52.9 billion in revenue, its weakest annual result since 2010. Despite earnings declines both in Q4 and for the whole year, Intel says that its earnings in the fourth quarter exceeded expectations as demand outstripped supply, due to the ongoing AI buildout.

Furthermore, the company reports a GAAP net loss of $300 million in 2025. Compared to its staggering $18.8 billion loss in 2024, this can be framed as a breakthrough. However, this is not quite yet a turnaround, as the result came with important caveats.

"We exceeded Q4 expectations across revenue, gross margin, and EPS even as we navigated industry-wide supply shortages," said David Zinsner, chief financial officer at Intel. "We expect our available supply to be at its lowest level in Q1 before improving in Q2 and beyond. Demand fundamentals across our core markets remain healthy as the rapid adoption of AI reinforces the importance of the x86 ecosystem as the world’s most widely deployed high-performance compute architecture."

In Q4 2025, Intel earned $13.7 billion in revenue, unchanged from the previous quarter and down 4% year-over-year (YoY), as the company's shipments were constrained by wafer supply from its own fabs and TSMC. Due to strong competition and unfulfilled demand, the company reported a GAAP loss of $600 million for the quarter, as gross margin declined to 36.1%, compared to 39.2% a year earlier. For the full year, revenue was $52.9 billion, essentially flat compared to 2024, but gross margin improved to 34.8%.

However, Intel's near breakeven result was made possible by roughly $20.4 billion in external financial injections, including $2 billion from SoftBank, $4.46 billion from Silver Lake (for a 51% stake in Altera), $5 billion from Nvidia, and $8.9 billion from the U.S. government. Even with external funding, Intel still ended the year in the red, but without the injections, its losses would have deepened.

Operational performance

Taking a closer look at different business units, performance varied across business segments. The Client Computing Group (CCG) posted $8.2 billion in Q4 revenue, down both sequentially and YoY, its operating income declined to $2.2 billion as operating margin dropped to 27%. While client CPU demand in Q4 was traditionally very strong, Intel deliberately redirected constrained internal wafer capacity toward higher-margin data center products, thus increasing reliance on externally sourced wafers for client processors, which hit margins of the CCG business unit badly.

Meanwhile, this strategy benefited the Data Center and AI Group (DCAI), which posted $4.7 billion in Q4 revenue, up 15% sequentially and 7% YoY. Operating income surged to $1.3 billion, lifting margins to 26.4%, a dramatic improvement from 8.6% a year earlier and the best result for DCAI in quarters. Again, Intel had to acknowledge that demand for Xeon processors exceeded supply and expects this imbalance to persist into 2026 due to demand from the AI segment.

Intel Foundry generated $4.5 billion in Q4 revenue, up 6.4% sequentially, supported by growing shipments of Intel 3-based Xeon 6 CPUs, Intel 4-based Arrow Lake, and (to a minimal degree) early Panther Lake wafers. EUV-based processes now account for over 10% of foundry revenue, up from less than 1% in 2023. However, as usual, the foundry business posted a $2.5 billion operating loss due to a mix of factors, including ongoing capacity investments and the early ramp-up of Intel's 18A.

Q1 2026 outlook

Looking ahead into the first quarter, Intel forecasts revenue of $11.7 billion – $12.7 billion, which is down from the same quarter a year ago.

The prediction stems from continued supply constraints and the lack of buffer inventory that Intel sold in Q3 and Q4 2025. As a consequence, Intel will sell whatever it can get throughout the first quarter of 2026, something that inevitably hits margins, and they are projected to decline to 32.3% (as it will be harder to get as many of the premium SKUs out as possible). The good news is that the company's management expects supply conditions to improve starting in Q2.

Demand for Intel's processors for client and data center applications was on the rise in the third quarter of 2025, but the company could not fully capitalize on it as it faced numerous supply shortages across its business, which included shortages of its own production capacity and an industry-wide shortage of substrates, which will persist into 2026. The company is prioritizing the supply of data center CPUs, but going forward, it also plans to adjust the pricing of its products, which means increased prices of previous-generation client CPUs.

"Capacity constraints, especially on Intel 10 and Intel 7, limited our ability to fully meet demand in Q3 for both data center and client products," said David Zinsner, chief financial officer of Intel, during the company's conference call with analysts and investors.

Raptor Lake in tight supply

While the Intel 7 (formerly 10nm Enhanced SuperFin) process technology introduced in 2021 – 2022 looks ancient, it still packs quite a punch in terms of performance capability and Intel uses it to produce a host of CPUs, including 13^th and 14^th Generation Core 'Raptor Lake' CPUs as well as I/O die for Xeon 6 'Granite Rapids' CPUs and 5^th Generation Xeon Scalable 'Emerald Rapids' processors that are still in demand. Recently, prices of Intel's Raptor Lake processors rose amid supply constraints up as demand for these CPUs is still high three years after the introduction.

As the company has no plans to expand capacities for previous-generation nodes, but foresees demand for Intel 7 and Intel 10-based products to remain strong in the coming quarters, it expects these CPUs to be in short supply well into 2026. Furthermore, to capitalize on it, Intel intends to adjust pricing and produce more high-end SKUs.

"Given the current tight capacity environment, which we expect [to] persist into 2026, we are working closely with customers to maximize our available output, including adjusting pricing and mix," said Zinsner.

As for Intel 10 (formerly 10nm SuperFin), it is hard to tell which of Intel's broadly available CPUs use it, but Intel probably ships a boatload of long-life-cycle products made using this technology under long-term supply contracts.

Diverting wafers to data center CPUs

As Intel's Xeon 6 'Granite Rapids' uses an I/O die made on Intel 7 process technology, insufficient capacity hits the company's ability to ship enough expensive data center processors. On the one hand, this might be good news for Intel as demand for its server CPUs is back and it can sell them without a discount or even at a higher price. However, if it does not have enough I/O dies, it cannot ship processors at all. Therefore, it has to divert capacity to data center CPUs, thus cutting the supply of client CPUs, which is one of the reasons why Raptor Lake processors got more expensive recently and will likely gain price in the coming months.

"[In Q4] we expect [client computing group] to be down modestly and [data center and AI group] [to be] up strongly sequentially as we prioritize wafer capacity for server shipments over entry-level client parts," said Zinsner.

Intel's decision to sacrifice some lower-end client CPU volume to keep server CPU customers supplied — particularly hyperscalers and AI infrastructure buyers — has a great rationale as data center CPUs are sold at thousands of dollars a unit, whereas even the highest-end client CPU is hardly sold at $500 - $600. Given the cost of semiconductor fabs and limited production capacity at Intel's 7-capable lines, Intel's management is forced to triage output toward the most profitable products.

Shortages are here to last

In addition to insufficient Intel 7-capable capacity, Intel also blames the shortage of substrates used for CPU packages for the tight supply of its processors, which further complicates the company's supply chain.

" There is also shortages even beyond our specific challenges on the foundry side," said Intel CFO. "I think there's widely reported substrate shortages, for example. So, I think the demand, you know, there is a lot of caution coming into the year, I think across the board."

In general, Intel warns that shortages of its processors will persist through 2026. On the client side, this is conditioned by the slow 18A ramp and decent demand for Raptor Lake processors, whereas on the data center side, it will be driven by insufficient Intel 7 capacity amid the continuous ramp of Xeon 6-series products. The shortages are expected to worsen in Q1, but then there may be some relief.

 "We may actually be at our peak in terms of shortages in the first quarter because we have lived through the Q3 and Q4 with a little bit of inventory to help us and just cranking the output as much as we could with the factory," said Zinsner.

Intel on Thursday reported its better-than-expected financial results for the third quarter of 2025, marking its return to growth and profitability despite ongoing challenges. The company earned $13.7 billion, up both sequentially and year-over-year, and even posted $4.1 billion operating profit. However, the profit was not a result of a sudden turnaround of Intel's business, but was mainly driven by large one-time and non-operational gains, which helped to bring the company out of the red. Furthermore, Intel still has plenty of challenges to solve, and its Q4 outlook does not look strong.

$4.1 billion profit due to one time gains

"We took meaningful steps this quarter to strengthen our balance sheet, including accelerated funding from the U.S. Government and investments by Nvidia and SoftBank Group that increase our operational flexibility and demonstrate the critical role we play in the ecosystem," said David Zinsner, chief financial officer of Intel.

Intel earned $13.7 billion in revenue, up 3% year-over-year (YoY) and 6% quarter-over-quarter (QoQ), in the third quarter of 2025. The company's net income reached $4.1 billion, primarily due to non-recurring gains, while its gross margin increased to 38.2%. Meanwhile, operationally, Intel earned about $1 billion, while roughly $3 billion in asset-disposal gains (driven by the sale of Altera and part of its Mobileye stake) turned that modest recovery into sound profitability of $4.1 billion.

Intel's operating expenses — including research and development (R&D) as well as management, general, and administrative costs (MG&A) — totaled $4.4 billion in Q3 2025, down from $5.4 billion in the same quarter a year ago. The company spent $3.231 billion on R&D (down from $4.049 billion) and $1.129 billion on MG&A (down from $1.383 billion) in the third quarter. The company also recorded $175 million in restructuring and repairment charges.

Operational performance

Intel's Client Computing Group (CCG) posted a strong rebound in Q3 2025 with $8.5 billion in revenue, up 7.6% from the prior quarter and 5% year-on-year. Operating income rose to roughly $2.7 billion, whereas operating margin increased to 31.6%. The results were driven by a more favorable product mix, lower inventory reserves at PC OEMs, and higher average selling prices due to growing demand for CPUs and shortages of Intel's previous-generation CPUs.

Intel deliberately steered capacity toward higher-margin models like the Arrow Lake and Lunar Lake and away from previous-generation client CPUs, which increased ASPs. Intel stressed that the recovery of its CCG was a result of disciplined execution rather than volume expansion. Meanwhile, CCG's growth was constrained by a shortage of Intel 7 capacity.

Intel's Data Center and AI Group (DCAI) delivered $4.1 billion in revenue in Q3 2025, up 5 percent sequentially and flat year-over-year, as demand from cloud and enterprise customers continued to strengthen. Operating income of the unit was $1 billion, whereas operating margin increased to 23.4%, the highest result DCAI posted in many quarters.

Intel's DCAI growth was driven by AI infrastructure refreshes as well as expanding deployments of Xeon 6 'Granite Rapids' processors, which improved the company's product mix and ASP. Due to a shortage of production capacity, Intel shifted some of its capacity reserved for client CPUs to data center processors, which improved the company's results. In addition, the company's management managed discussions about multi-year supply agreements with hyperscalers and other large data center customers.

As for the Intel Foundry business, it generated $4.2 billion in revenue in Q3 2025, down $200 million QoQ and $100 million YoY. However, Intel managed to shrink losses to $2.3 billion, which may be considered a good result as the company continued to absorb startup costs for Intel 18A initial ramp amid lower-than-comfortable yields.

"Our stronger-than-expected Q3 results mark our fourth consecutive quarter of improved execution and reflect the underlying strength of our core markets," said Zinsner. "Current demand is outpacing supply, a trend we expect will persist into 2026."

Q4 outlook

For Q4 2025, Intel guided for revenue between $12.8 billion and 13.8 billion, which reflects seasonality and possible limitations incurred by shortages of production capacity. Intel's management indicated that DCAI revenue should rise modestly as shipments of data center CPUs will be prioritized, while sales of the Client Computing Group will decline, as usually happens in the fourth quarter.

When Intel introduced its IDM 2.0 strategy in 2021, a substantial part of the plan was to build custom x86 processors for clients and then produce them at Intel Foundry. However, the company has never assigned an executive to manage its custom silicon business, and the only major design wins were for custom Xeon CPUs used by Amazon Web Services. However, this month, Intel made two important steps that make it a de facto contract chip designer: it appointed an executive to lead its custom silicon business and signed a multi-year contract to build custom Xeon CPUs for Nvidia's AI platforms.

The current state of Intel's custom CPU business

Intel has been offering semi-custom Xeon processors to various customers for over a decade. These CPUs typically serve hyperscalers or large AI/data center customers who require performance or efficiency enhancements optimized for their specific workloads. These Xeon processors are tweaked from standard off‑the‑shelf Xeon SKUs with different frequency bins, power envelopes, packaging, microcode, feature sets, or even special-purpose accelerators designed for certain workloads.

When Intel discussed custom x86 processors in 2021, it mentioned customizable cores, custom IP, and customized Intel IP, which is far more impressive than its semi-custom offerings. However, the only custom products that Intel developed for a large client and disclosed publicly are the aforementioned Xeon CPUs for Amazon Web Services.

Intel has never revealed the degree of customization on the IP level with these products, though we know from AWS that its custom Xeon 6 CPU has an unknown number of cores, a 3.90 GHz all-core turbo frequency (up from 3.20 GHz for the off-the-shelf Xeon 6952P model), and faster DDR5-7200 memory support (up from DDR5-6400). However, such a level of customization is not something we usually expect from a bespoke CPU in a world where hyperscalers run dozens of highly customized models for their in-house processors inside data centers.

This is something that must change if Intel truly plans to serve a crowded market, with names like Alchip, Alphawave, AMD, Andes, Broadcom, GUC, Marvell, MediaTek, and Sondrel. This month, Intel appointed Srini Iyengar to lead its Central Engineering Group, enabling the company to build a custom silicon business serving a broad range of external customers. That job is not going to be easy, but Iyengar has the appropriate experience to do it.

Srini Iyengar has spent over two decades at Intel, with the latter half of his career focused on custom silicon architecture for infrastructure platforms. As a Principal Engineer, he has played a key role in architecting Arm-based Infrastructure Processing Unit (IPU) SoCs, defining product features to optimize performance, power, and area (PPA), and collaborating across IP vendors, verification, firmware, and manufacturing teams to deliver tailored solutions. Previously, he led the architectural development of special-purpose accelerator subsystems for server CPUs.

In addition, Intel this month disclosed its custom silicon unit's biggest win so far: a multi-year contract with Nvidia, under which it will develop and build bespoke Xeon CPUs for Nvidia's AI infrastructure. Given that Nvidia controls the lion's share of the AI hardware market, this is a significant contract both in terms of volume and in terms of Intel's public image.

Custom silicon is on the rise

When mentioning custom silicon in the context of Intel, we primarily refer to consumer and data center processors, as these are the areas where Intel excels. However, the semiconductor industry is witnessing a sharp rise in demand for bespoke application-specific processors across virtually all verticals, including AI, automotive, cloud, consumer, data centers, and consumer electronics.

Around a decade ago, only large companies could afford to develop their own custom chips, but with maturing contract chip development services, IP ecosystems, foundry yields, and a changing competitive landscape, the interest in bespoke chips is stronger than ever.

Apple's early lead in custom processors for smartphones set the tone for the consumer electronics industry, showing how proprietary silicon can deliver performance, efficiency, and product differentiation. In 2025, Google, Huawei, and Xiaomi have also developed their own smartphone SoCs.

In the data center, hyperscalers like Amazon and Google have become major drivers of custom silicon. AWS has its own Trainium accelerators for AI training, Inferentia accelerators for AI inference, and Graviton CPUs for general-purpose compute. Google produces its own chips for AI (TPUs), video (VCUs), and its own application processors for smartphones. These companies benefit from integrating hardware and software stacks, enabling better efficiency and lower costs at scale. The trend extends to other hyperscalers, including Alibaba, Baidu, Meta, Microsoft, and OpenAI.

Automotive manufacturers are also investing in their own processors (motivated by Tesla's early lead) as they shift to software-defined vehicles (SDVs). These companies are set to use multiple high-end SoCs across a vehicle, with the main Advanced Driver-Assistance System (ADAS) SoC likely using multiple chiplets. These companies are not only interested in reliability, performance, and features, but also in the long-term availability.

Advanced AI-assisted EDA tools from Cadence, Synopsys, and Siemens AI as well as simulation tools from Ansys (now part of Synopsys), greatly streamline the development of custom processors, which lowers the barrier for companies that intend to establish their own chip design division. If the return on investment looks compelling, unit costs are reduced significantly, or the total cost of ownership is lowered several times, or performance improvements are dramatic, then companies will at least consider starting an in-house chip design initiative.

However, development of chips is always a risk, both in terms of money and time-to-market. This is especially true for companies starting from scratch or lacking in-house expertise. Also, far not all companies that can benefit from custom silicon can afford an internal chip division. Finally, there are companies not willing to afford an internal chip design department for many reasons. This is where contract design-to-order service companies come into play.

What do customers want?

Companies that want the benefits of custom silicon, without the complexity of managing specifics like IP licensing, verification, or tape-out, have a very specific set of requirements for a contract chip designer, as it essentially becomes a strategic partner, not just a service provider.

One of the biggest priorities for interested companies is the experience of their partner. Customers seek design firms with a proven track record of delivering complex SoCs or ASICs, ideally in their industry domain. This includes not only silicon delivery but also successful tape-outs on advanced nodes, system-level architectural understanding, and familiarity with key verticals such as automotive, AI/ML, client PCs, and networking.

Secondly, customers expect access to a comprehensive IP portfolio. Most firms do not want to source and license every IP block individually; therefore, contract designers must provide or integrate essential IP blocks, such as PCIe, DDR, SerDes, Ethernet, USB, and security. Many customers also require the ability to integrate their own custom IP or differentiate through co-developed blocks. Therefore, the chip designer must have licensing flexibility, reuse rights, and expertise in deep IP integration.

Thirdly, clients demand a mature and automated design flow. Faster tape-outs and fewer silicon bugs are critical to stay on schedule and within budget. This also means the designer should handle validation, testbench creation, simulation, and signoff with minimal supervision.

Next, clients also value pre-existing relationships with foundries and Outsourced Semiconductor Assembly Tests (OSATs), which ensure that the designed processor will enter mass production and will ramp up to target volumes at predictable costs. Long-term support — including yield increase, silicon validation, firmware tuning, and product lifecycle management — is often a crucial factor.

Lastly, some clients prefer a full turnkey model, while others opt for joint development with an eventual handoff. Normally, a contract chip designer should support both and ensure strong IP protection, data security, and clear ownership terms.

What Intel can and cannot offer

Intel today can offer several — but not all — of the elements that customers expect from a contract chip designer. While the company is taking serious steps toward building a competitive custom silicon business, it still lags behind established ASIC players in a number of key areas.

Intel has decades of experience designing some of the world's most complex processors, including consumer CPUs for a wide range of PCs, Xeon processors for data centers, GPUs, FPGAs (via Altera), and even AI accelerators. The company clearly understands power, performance, and area (PPA) tradeoffs at scale.

For customers that require high-performance x86-based compute or custom server-class silicon, Intel's architectural know-how is likely second to none. Additionally, in recent years, Intel has gained experience in integrating chiplets made on different nodes from various foundries, a feat no one else in the industry has yet achieved in volume.

However, unlike Alchip, Andes, GUC, Marvell, or MediaTek, Intel does not have a proven track record of integrating Arm, RISC-V, or 3rd-party cores into customer designs.

Intel owns a wide range of IP, including x86 cores, GPUs (and supporting hardware like media engines, display engines, display controllers, audio codecs, etc.), AI accelerators, security engines, special-purpose accelerators (primarily for data centers), and high-speed I/O controllers and PHY (e.g., DDR, HBM, Ethernet, PCIe, Thunderbolt, UPI, USB, etc.). For customers looking to build a product around x86 and reuse trusted Intel IP blocks, the company can provide a strong starting point — particularly for data center and perhaps even for AI accelerators.

However, Intel's IP for its own 18A process technologies is relatively limited (for now), so it will have to license IPs from third parties like Synopsys, which is not a big problem, but adds complexity. While Intel has proven IPs for TSMC's process technologies, these are mostly focused on consumer solutions, not on data center solutions, which will again mean reliance on third-party IPs.

With Intel Foundry and packaging capabilities like EMIB, Foveros, and 3D chiplets, Intel can offer not only custom chip design but also manufacturing and advanced integration options. This is a strong differentiator versus design-only houses that rely on external foundries and OSATs. For chiplet-based SoCs or heterogeneous designs, Intel has a compelling packaging roadmap. Intel also has a good relationship with TSMC.

There might be a perception issue, though. Intel may favor its own IP, packaging, or node choices, which could limit design freedom. Some customers may prefer a neutral, foundry-agnostic partner that will deliver their GDSII file to TSMC.

Finally, Intel's traditional business model is focused on low-mix/high-volume chip development and production. A contract manufacturer is focused on agile development, tape-out, and low-volume production, and we have no idea how ready Intel's teams are for such work.

The first step

Intel and Nvidia have been working on the jointly developed processors for client and data center products for about a year now as both companies see huge opportunities behind their Intel x86 RTX SoCs and custom Nvidia x86 data center processors. Although the Nvidia CEO Jensen Huang said in a press call that the Trump administration was pleased with the collaboration between two leading U.S. companies, it had nothing to do with it.

Trump not involved

"The Trump administration had had no involvement in this partnership at all," said Nvidia's Huang said, during the joint press conference with Nvidia on Thursday. "They would have been very supportive, of course. Today I had the opportunity to tell Secretary [of Commerce Howard] Lutnick and he was very excited and very supportive of seeing two American technology companies working together."

The work began around a year ago, and preliminary agreements were reached by Intel's then-CEO Pat Gelsinger and Nvidia's Jensen Huang even before that. (A year ago, Joe Biden was president, though no one suggested his administration was involved, either.) Intel and Nvidia are working on custom data center CPUs that Nvidia will integrate into its AI platforms as well as GPU tiles that Intel will integrate into its upcoming client processors. In both cases CPUs and GPUs will use Nvidia's NVLink technology as an I/O interface. By now, there are three teams working together on the joint projects.

The work is ongoing

 "The two technology teams have been discussing and architecting solutions now for probably coming out to a year," said Jensen Huang, chief executive of Nvidia. "The two architecture teams… Well, it is three architecture teams are working across... the CPU architecture, as well as product lines for server and PCs. The architecture work is fairly extensive, and the teams are really excited about the new architecture. The teams have been working for a while and we are excited about the announcement today."

As Huang mentioned teams working on a CPU architecture as well as client and data center product lines, we figure out that Nvidia wants rather deep customizations of Intel's Xeons to meet the needs of its AI platforms.

The involvement of a CPU architecture team highlights the depth of the partnership between Intel and Nvidia as well as indicates that the CPU company is implementing rather deep optimizations required by next-generation AI platforms. Given Nvidia's history with Grace and Vera CPUs (custom Arm) and the high bandwidth needs of its next-gen GPUs (e.g. Rubin, Feynman, post-Feynman, etc.), it is reasonable to expect tailored cache structures, memory IO, and coherency protocols on these x86 CPUs.

Such a deep collaboration probably means that custom Intel processors will be used by Nvidia sometimes in the post-Vera Rubin platform era. We would certainly expect Nvidia's data center GPU team to work with Intel as well, but Huang never mentioned one during the call, probably because Feynman GPUs have already been defined by now.

Yet, he mentioned that there are two more teams working on product lines for server and PC products, which probably points to data center system level architecture team on Nvidia's side as well as client CPU/system level architecture team on Intel's side.

While the collaboration between Intel and Nvidia on the data center front is a multi-faceted cross-organizational effort, the timing to its fruition is tied to emergence of Intel's custom CPUs for Nvidia.

As for the joint work on client project (or projects), developing an Intel CPU with Nvidia GPU chiplet will take at least three to four years from drawing board to volume production. The collaboration requires deep integration across SoC fabrics, dimensions, performance/power consumption targets, packaging technologies (Foveros, EMIB), and software stacks from both companies. The collaboration likely began in 2024, so the first products could hit the market in late 2027 or early 2028.

Hundreds of millions of PCs

Intel pulled the wraps off its first all-E-core Xeon at Hot Chips on Monday, August 25, in Cupertino, California. Dubbed Clearwater Forest, it's the first Xeon built on the company’s next-gen 18A process.

Scheduled to ship in 2026, the processor packs a punch with 288 efficiency cores and a two-socket ceiling of 576 cores, as well as over 1,152 MB combined last-level cache. On paper, it’s Intel’s next attempt to close the performance-per-watt gap in the data center, and it’s a shot across the bow at AMD’s EPYC line.

Darkmont cores bring modest IPC gains, massive scale

Architecturally, Clearwater is a spiritual sequel to Intel’s 144-core all-E-core Xeon, Sierra Forest, but with a few notable upgrades. The new Darkmont E-cores offer a wider 3x3 decode engine, deeper out-of-order windows, and enhanced execution ports, resulting in approximately 17% better IPC than the Crestmont generation.

Four cores share 4MB of L2 cache, and the chip doubles L2 bandwidth compared to the Sierra. Multiply that across 288 cores, and you’ve got a throughput monster designed to eat multithreaded web services and AI inference jobs alive.

The choice of process matters just as much as core count. Clearwater is one of the first real-world testbeds for Intel’s 18A node, which pairs RibbonFET transistors with backside power delivery.

This is effectively Intel’s answer to the density and power efficiency questions that have enabled TSMC and AMD to dominate in recent years. By separating power and signal routing, Intel claims higher cell utilization and lower IR drop, features that hyperscalers care about when power bills stretch into megawatts.

A new definition of Xeon?

Popular free and open source archive application, 7-Zip, has completed a major milestone leap that will be welcomed by PC power-users. Version 25.00 of the application, released via GitHub this weekend, is the first Windows release to support processing across more than 64 threads. In addition to its newfound massively parallel CPU processing support, this ‘Threadripper Edition’ offers significantly faster bzip2 compression for all users.

Before version 25.00, 7-Zip was perfectly acceptable for PC owners packing the best CPUs aimed at consumers. Its multithreaded processing capabilities comfortably coped with the likes of the Ryzen 9950X with 16C/32T, and the Core Ultra 9 285K with 24C/24T. These are the top consumer processors targeting PC DIY enthusiasts.

However, some of the most potent Ryzen Threadripper, Epyc, and Intel Xeon chips would be underutilized by this archiving app. Example modern AMD and Intel chips that were left underutilized by 7-Zip would have included the Threadripper Pro 9995WX (96C/192T), Threadripper 9980X (64C/128T), the Xeon Platinum 8692+ (64C/128T), and the Xeon W9-3495X (56C/112T).

Here’s how the 7-Zip developers describe version 25.00’s new multithreaded capabilities. “7-Zip for Windows can now use more than 64 CPU threads for compression to zip/7z/xz archives and for the 7-Zip benchmark. If there are more than one processor group in Windows (on systems with more than 64 CPU threads), 7-Zip distributes running CPU threads across different processor groups.”

General optimizations and fixes

The benefits of upgrading your 7-Zip install to 25.00 don’t begin and end with improvements targeting the beefiest Ryzen Threadripper, Epyc, or Intel Xeon chips. The standout feature for the rest of us is probably the claims that “bzip2 compression speed was increased by 15-40%.”

Improvements in bog-standard zip performance would be most warmly welcomed, though, and 7-Zip says that “deflate (zip/gz) compression speed was increased by 1-3%,” which we won’t complain about. Other than that, 7-Zip 25.00 is also claimed to deliver some improved support for certain archive formats, and the quashes some bugs and vulnerabilities.

7-Zip has been a must-have staple of any PC software refresh for years now. As well as offering much broader archive file type support than the built-in Windows Zip folders feature, its performance has been a major attraction.

Windows built-in Zip folders feature remains single-threaded

Intel's next-generation Xeon processor, codenamed Diamond Rapids, will reportedly utilize a new platform with a 9324-pin LGA socket, indicating a revised memory subsystem and PCIe lane configuration. But a leaked slide published on Sunday by X86 is dead&back reveals that the new CPU could feature up to 192 high-performance cores as well as eight or 16 DDR5 memory channels. Please note that we are dealing with information from an unofficial source, so please take it with a grain of salt.

Intel's rumored specs for the Xeon 7 'Diamond Rapids' processor include up to 192 cores, an eight-channel or 16-channel memory subsystem, and a thermal design power of 500W. We already know that Intel's Diamond Rapids processors will use 2nd Generation MRDIMM memory modules, which will support data transfer rates higher than 8800 MT/s supported by existing Xeon 6 'Granite Rapids.' If these next-generation processors support 12,800 MT/s memory modules, the entire memory subsystem of these CPUs would support a peak bandwidth of over 1.6 TB/s, representing a significant increase compared to existing designs (approximately 844 GB/s for Granite Rapids).

Although AMD formally introduced its Ryzen Threadripper 9000-series processors at Computex and disclosed their specifications, the company did not reveal their performance compared to predecessors and rivals, or their pricing. This week, the company filled in one of these blanks and finally released performance results of its Ryzen Threadripper Pro 9995WX and Ryzen Threadripper 9980 CPUs compared to Intel's Xeon W9-3595WX.

With its Zen 5-based Ryzen Threadripper 9000-series, AMD did not increase core count or frequency of its CPUs for workstations and high-end desktops, so all performance increases compared to the previous generation come from micro-architectural improvements (e.g., wider core execution, improved caches, faster memory, and more efficient AVX-512 support).

AMD itself claims that its new Ryzen Threadripper 9000-series CPUs are 16% faster in workstation applications and up to 25% faster in AI/ML workloads when compared to predecessors with the same core count and clocks, which is in line with what we would expect from Zen 5-powered products. More detailed results indicate that the 96-core Ryzen Threadripper Pro 9995WX is 13% to 26% faster in workstation benchmarks and 22% to 23% faster in DeepSeek R1 compared to its direct predecessor, the 96-core Ryzen Threadripper Pro 7995WX.

Performance comparison of AMD's new flagship with its rival from the blue camp looks more impressive, as with 96 cores and 192 threads, it outpaces Intel's 60-core Xeon W9-3595X by 28% to 145%, depending on the task, across every major professional workload. Of course, the tests were conducted by AMD, so take them with a grain of salt.

In content creation and rendering (e.g., V-Ray, After Effects, Maya), AMD's lead is particularly dominant, with improvements often exceeding 100%. In CAD, AEC, and simulation-heavy applications like Solidworks, Revit, and Keyshot, AMD maintains a commanding advantage, offering faster modeling and rendering across the board.

Software compilation, scientific computing (MATLAB, Chromium, Unreal Engine), and AI workloads (LLM inference, diffusion models) also benefit from Ryzen Threadripper's wider memory interface, larger caches, and more threads, with performance uplifts between 28% and 75%. Although Intel's Xeon W9-3595X CPU can shrink its gap with AMD's offering to 22% to 34% in some cases, the Ryzen Threadripper Pro 9995WX leads in all tests conducted by AMD.

An alleged picture of the socket that is expected to host Intel's next-generation Diamond Rapids (Xeon seventhgeneration) family of server CPUs has emerged, as spotted by HXL on X. The LGA9324 socket reportedly carries over 10,000 pins, once you consider debug pins and the like. This will likely be the largest LGA CPU socket yet, unless future Venice offerings from AMD exceed this amount.

Last August, test tool listings for partners indicated that Intel's future Diamond Rapids processors will reportedly require a new Oak Stream platform with its LGA9324 socket. Under the Xeon 7 family, these CPUs are expected to supersede existing Granite Rapids offerings, across AP (Advanced Performance) Xeon 6900P and SP (Scalable Performance) Xeon 6700P/6500P offerings. Prototype cooler designs from Dynatron suggest Intel will fragment Diamond Rapids into AP and SP flavors, and so we might see a toned-down socket under the Oak Stream family for Diamond Rapids-SP.

Currently, Intel's largest socket, LGA7529, features at least 7,529 contacts, while AMD's SP5 offers 6,096. Xeon 6900P CPUs, utilizing the LGA7529 socket, offer up to 128 P-cores, support 12 DDR5 memory channels, and can reach a TDP of 500W. With a nearly 30% increase in pin-counts, expect more I/O, memory channels, increased TDPs, and even core counts. While we don't have a banana for scale, visually, this is a massive socket, dwarfing LGA1851 (used by Arrow Lake) by almost five times.

Lip-Bu Tan, the newly appointed chief executive of Intel has launched a major leadership overhaul aimed at streamlining decision-making at the company, according to Reuters. With the new changes, Sachin Katti will become the chief technology office officer of Intel and will lead the company's AI effort. Also, the new management structure will get flatter and technical leaders from key groups will get direct lines with the CEO.

"Sachin Katti is expanding his role to include chief technology and AI officer for Intel," a spokesperson for Intel confirmed to Tom's Hardware. "As part of this, he will lead our overall AI strategy and AI product roadmap, as well as Intel Labs and our relationship with the startup and developer ecosystems."

New CTO

Up until now, Sachin Katti was in charge for Intel's networking and edge computing business unit and prior to that he was CTO of that unit. However, with the new expansion of his role, he will become chief technology officer of the whole company and the head of Intel Labs, therefore responsible for all the fundamental and applied research at Intel, which includes fundamental research for Intel's process technologies.

As part of his job as head of Intel Labs, Katti will also be in charge of relationships with startup and developer communities. Furthermore, Katti will also be in charge of Intel's new AI strategy and products roadmap.

The appointment of a dedicated AI chief is perhaps a long overdue job as Intel's AI strategy so far has not exactly been a success. Perhaps the problem is that AI was a part of Intel's data center unit and was considered as somewhat of a second-class citizen and therefore competed both for resources and management attention. With a dedicated lead, this could change, but keep in mind that Sachin Katti will not be solely dedicated to AI as he will be Intel's CTO as well as in charge of the edge and networking business.

Intel's chief technology officers (CTOs) role was originally focused on traditional technology development oversight, but in the recent years it got additional roles. Intel's 'classic' CTOs were Pat Gelsinger (2001 - 2009), Justin Rattner (2009 – 2013), and Michael Mayberry (2017 – 2021), who led the company's technology strategies that included CPU, systems, communications, and process technologies for making semiconductors. Intel had no CTO between 2013 and 2017 at all.

Greg Lavender, who served as Intel's CTO from 2021 to 2025, joined the company in 2021 from VMware and among his responsibilities as CTO were defining and executing Intel's software strategy across AI, accelerated computing and confidential computing, as well as leading the Intel Labs, Intel Federal LLC, and Intel Information Technology (IT) units.

That said, Katti will not be the first Intel CTO with additional responsibilities. However, Katti's CTO and AI responsibilities are both strategically important for the company's future and the fusion of the roles may be a strategic move by Lip-Bu Tan.

Technical leaders get direct line to CEO

While the Intel CTO role at Intel has become less apparent — and the vast responsibilities of Sachin Katti just prove that — Lip-Bu Tan is taking a more hands-on approach on development of key technologies and has established direct lines of communication with key technical leaders Rob Bruckner, Mike Hurley, and Lisa Pearce.

Let us detail their roles:

• Rob Bruckner serves as CTO of client platform architecture and definition (CPAD) organization within the Client Computing Group (CCG) that earns tens of billions of dollars a year.
• Mike Hurley serves as general manager of the client silicon engineering group (CSEG), overseeing end-to-end execution for all client products. His responsibilities include silicon architecture and design engineering, hardware and firmware IP development, as well as post-silicon validation and manufacturing readiness to ensure successful product delivery to market.
• Lisa Pearce is Intel's general manager of GPU and NPU hardware and software IP. This is not a key business division, but GPU and NPU hardware is strategically important for the company's CPUs, integrated and standalone GPUs, as well as a broader AI scope.

Previously, these executives reported to Michelle Johnston Holthaus, chief executive of Intel Products group overseeing everything from controller chips for client PCs all the way to premium data center-grade CPUs and server platforms. Yet, Michelle Johnston Holthaus is not going anywhere.

"I want to roll up my sleeves with the engineering and product teams so I can learn what is needed to strengthen our solutions," Tan is reported to have written by Reuters. "As Michelle and I drive this work, we plan to evolve and expand her role with more details to come in the future."

In addition, Intel is also changing how the CEO will work with the government affairs head: the new one will report directly to Lip-Bu Tan, which reflects the strategic importance of global regulatory relationships amid rising geopolitical tensions and ongoing tariffs on China. Bruce Andrews, who had previously worked for the U.S. Commerce Department under President Obama, left Intel after the U.S. elections in November.

Summary

Arm Holdings hopes to increase its share of the global data center CPU market from 15% to 50% by the end of 2025. Mohamed Awad, senior vice president of infrastructure at Arm, made the claim in an interview with Reuters. The company pins its hopes primarily on AI servers, so consider offerings like Nvidia's GB200 and GB300 machines, custom silicon from large cloud service providers, and Ampere Computing-based systems.

Most servers today run AMD's EPYC processors or Intel's Xeon CPUs that rely on the x86 instruction set architecture, as there is more data center-grade software for x86. However, the situation is changing, and Arm says that some server programs are now developed for Arm-based processors first and then ported to x86. Google and Microsoft have also started designing data center processors with Arm's technology, although their projects are at an earlier stage compared to Amazon.

While x86 dominates the server market and will likely continue for a while, Arm adoption is growing. Arm is used by Amazon Web Services for its Graviton CPUs, which are used for many of its instances instead of AMD's or Intel's processors. Half of the processors used by AWS are indeed Arm-based Graviton CPUs.

In addition, Ampere Computing offers Arm-based CPUs for data centers. Ampere is a chip designer backed initially by Oracle but now owned by SoftBank (which also happens to own Arm Holdings).

In addition to AWS and Ampere, Nvidia is emerging as a major backer of Arm in the datacenter space. The company's Grace CPUs with 144 Arm Neoverse V2 cores power GB200 and GB300 AI servers will likely become popular with large cloud service providers.

But Arm pins its hopes not only on AWS, Ampere, and Nvidia. The company also offers compute subsystems (CSS) based on its Neoverse cores, enabling chipmakers to build their data center-grade CPUs relatively easily. Furthermore, Arm is reportedly developing its own CPUs for large cloud service providers, such as Meta. These CPUs have yet to gain market share, though if Meta deploys them in volume, they will inevitably control a significant part of the server CPU market as Meta is one of the major users of servers globally.

Intel has expanded its Xeon 6 'Granite Rapids' family of CPUs featuring high-performance cores with new offerings targeting AI, content delivery, networking, and storage applications. The new Xeon 6500 and Xeon 6700 series processors are designed for single-socket and multi-socket servers and feature up to 86 high-performance cores, an eight-channel memory subsystem, and up to 136 PCIe lanes to connect to various accelerators, such as AI processors. 

Intel's Xeon 6500 and Xeon 6700-series processors feature up to 86 cores. They are aimed at 1P, 2P, 4P, and 8P machines, thus serving a very wide range of applications, starting from entry-level single-processor machines all the way to enterprise-grade 8-way machines that are used to run business-critical and mission-critical workloads. 

The CPUs support up to 4TB of memory and feature up to eight DDR5 memory channels supporting DDR5-5200 (2 DPC), DDR5-6400 (1 DPC), and DDR5-8000 MRDIMM (1DPC) modules, up to four UPI 2.0 links at 24 GT/s, up to 88 PCIe lanes for multi-socket systems or up to 136 PCIe lanes for single-socket designs (as Intel re-used UPI links for CPU-to-CPU connectivity as PCIe links). In addition, the CPUs support 64 PCIe lanes with CXL 2.0 on top, as well as Intel AMX and AVX-512 for AI and media coding acceleration. 

As the CPUs feature up to 86 cores, the maximum thermal design power of Xeon 6500 and Xeon 6700-series CPUs does not exceed 350W. Intel says it has maximized per-core performance, which would benefit various applications. While Intel claims the new chips are faster than their predecessors by 14% - 54%, depending on the workload, the relatively low core count and frequency pretty much limit usage of Intel's Xeon 6500/6700 processors to applications that do not benefit from the extreme core count of 128 per socket and do not need maximum per-core performance.

Arguably, Intel does it to ensure that its most expensive Xeon 6900P-series processors remain CPUs of choice for performance-demanding workloads. Nonetheless, if a company wants to build an 8-way machine with the maximum possible number of cores (688), it will have to choose a Xeon 6700P CPU. 

One of the interesting features of Intel's Xeon 6500 and Xeon 6700-series processors is support of the Intel TDX Connect technology that enables encrypted connection between the CPU and PCIe devices with direct memory access and lower overhead, which allows transferring confidential data to be processed on the GPU, which will be useful for various workloads, including AI. 

Since Intel's Xeon 6500/6700-series processors feature a lower number of cores, they use fewer Granite Rapids compute chiplets: one (for SKUs with up to 48 cores) or two (for up to 86-core models). Also, the new CPUs use a smaller LGA4710-2 packaging and are compatible with Intel's Socket E2, so they are not compatible with platforms for Intel's Xeon 6700E and 6900P. 

In addition to launching Xeon 6500 and Xeon 6700-series processors for mainstream servers, Intel also unveiled Xeon 6300-series processors with up to eight cores for uniprocessor servers as well as Intel Xeon 6 SoC processors with up to 72 cores that feature Intel vRAN and Media Transcode accelerators as well as integrated Intel Ethernet for enterprise edge servers and network appliances.

Intel is working on two workstation platforms based on its Xeon W 'Granite Rapids-W' processors aimed at 'mainstream' and 'expert' workstations, according to Jaykihn, a hardware leaker who tends to have access to Intel's plans. The platforms will feature different numbers of general-purpose high-performance cores, memory subsystems, and the number of PCIe lanes but will be based on the Intel W890 chipset.

Intel's Xeon W 'GNR-W' processors will likely belong to the Xeon W-2600 and Xeon W-3600-series products unless Intel changes its nomenclature. Intel's Xeon W-2600 CPUs will target 'mainstream' workstations and feature a quad-channel DDR5 memory controller as well as up to 80 PCIe 5.0 lanes, whereas the Xeon W-3600 CPUs will aim high-end 'expert' workstations and will get an eight-channel DDR5 memory subsystem as well as up to 128 PCIe 5.0 lanes. The number of PCIe 5.0 lanes supported by the Xeon W-3600 'expert' platform will differentiate the high-end desktop Xeon W9 CPU from the Xeon 6 R1S, aimed at specialized server applications.

Both platforms will be based on Intel's W890 chipset, which uses eight PCIe 4.0 lanes to connect to CPUs and supports 24 PCIe 4.0 lanes to enable platform connectivity.

The new Xeon W 'Granite Rapids-W' CPUs will feature the company's latest high-performance cores used in Xeon 6 6700P and Xeon 6 6900P processors, though the number of cores will differ for Xeon W-2600 and Xeon W-3600 CPUs. The exact number of cores featured by these products remains to be seen. Keeping in mind that Intel has silicon that packs up to 128 high-performance cores, the company can offer something with a very high core count to better compete against AMD's Ryzen Threadripper CPUs, but since we are talking about workstations, it needs to have a balance between core count, frequency, and power consumption.

The leak about Intel's Xeon W 'Granite Rapids W' comes days after InstLatX64 discovered Intel's official mentions of Granite Rapids-W, Granite Rapids-E, and Granite Rapids-D processors. Considering that Intel has officially mentioned the new CPUs, expect them to hit the market sooner rather than later. Still, it remains to be seen when the company refreshed its workstation lineup with Sapphire Rapids-W Refresh CPUs only in the third quarter of last year.

In an unexpected turn of events Justin Hotard, the executive vice president and general manager of the Data Center and AI Group (DCAI) at Intel, left the company to become chief executive of Nokia. Intel has appointed an internal head for its datacenter and AI unit and will start searching for a new permanent general manager immediately. 

"We have a strong DCAI team that will continue to advance our priorities in service to our customers," a statement by Intel reads. "Karin Eibschitz Segal has been appointed interim head of the DCAI business and is an accomplished executive with nearly two decades of Intel leadership experience spanning products, systems and infrastructure roles. We are grateful for Justin Hotard's contributions and wish him the best in his new role." 

Justin Hotard joined Intel from HPE in early 2024. His tenure was arguably a mixed bag, though much of what he oversaw was more or less in place before he arrived. Intel successfully launched its Xeon 6 'Granite Rapids' and 'Sierra Forest' CPUs for servers,  but sales of its Gaudi 3 processors for AI missed the company's own rather modest expectations. In addition, the company had to cancel its Falcon Shores as a product and delay its Clearwater Forest datacenter CPU by at least a quarter. 

Justin Hotard has over 25 years of experience working at major technology companies. Before joining Intel, he held leadership positions at Hewlett Packard Enterprise and NCR Corporation. His background includes expertise in AI and datacenter markets, which are said to be critical areas for Nokia's future. 

"I am delighted to welcome Justin to Nokia," said Sari Baldauf, Chair of Nokia’s Board of Directors. "He has a strong track record of accelerating growth in technology companies along with vast expertise in AI and datacenter markets, which are critical areas for Nokia's future growth. In his previous positions, and throughout the selection process, he has demonstrated the strategic insight, vision, leadership and value creation mindset required for a CEO of Nokia." 

Nokia's current CEO Pekka Lundmark will step down on March 31, 2025, and Justin Hotard will take over the role starting April 1, 2025. Lundmark will stay on as an advisor until the end of the year. Hotard will be based in Espoo, Finland, where Nokia’s headquarters are located. 

Lundmark has led Nokia since 2020, a period marked by significant challenges. Under his leadership, the company strengthened its position in 5G technology, cloud-based network infrastructure, and patent licensing. With this leadership change, Nokia aims to continue its transformation, focusing on AI, datacenters, and next-generation connectivity. 

"I am honored by the opportunity to lead Nokia, a global leader in connectivity with a unique heritage in technology," said Justin Hotard. "Networks are the backbone that power society and businesses, and enable generational technology shifts like the one we are currently experiencing in AI. I am excited to get started and look forward to continuing Nokia's transformation journey to maximize its potential for growth and value creation." 

Justin Hotard leaves a couple of months after Pat Gelsinger, chief executive of Intel, was ousted by the board of directors. As a result, Intel now does not have a permanent CEO or a permanent head of its key DCAI unit.

A Chinese tech reviewer benchmarked Nvidia's all-new "for China" RTX 5090D against a variety of CPUs, from AMD's flagship Ryzen 7 9800X3D, one of the best CPUs for gaming, to Intel's Core Ultra 9 285K, and all the way down to a nine-years-old 14-core Xeon E5-2680 v4 based on the Broadwell architecture. Despite its age, the $7 chip was at least moderately competitive with modern CPUs when using DLSS frame generation, especially with DLSS4 MFG.

The reviewer tested Counter-Strike 2, Marvel Rivals, and Cyberpunk 2077 on an assortment of CPUs paired to the RTX 5090D. The list of CPUs consists of the Core Ultra 9 285K, Core Ultra 7 265K, Core Ultra 5 245K, Core i7-14700KF, Core i5-14600KF, Core i5-12400F, Core i3-12100F, and Xeon E5-2680 v4. On the AMD side, Ryzen 9 9900X, Ryzen 7 9800X3D, Ryzen 5 9600X, Ryzen 9 7900X, Ryzen 7 7800X3D, Ryzen 5 7500F, and Ryzen 5 5600 were tested. That's a wide range of processors extending back nearly a decade.

Counter-Strike 2 showcased the lowest results for the Xeon E5-2680 v4. At 4K maximum settings, the CPU's average frame rate was 33% slower than the next-closest Core i3-12100F, never mind higher performance chips like the Ryzen 7 9800X3D that were almost twice as fast. The Broadwell-based chip delivered an average frame rate of 168 FPS, with the Core i3-12100F at 248 FPS. The fastest CPUs topped out at up to 322 FPS — all without any frame generation. 1% Low framerates were even worse, with the Xeon E5-2680 v4 netting just 72 FPS, with the fastest CPU landing at 163 FPS — 2.26X faster.

The Xeon chip's awful frame rate in CS2 shows the problem with pairing such a powerful GPU with an "archaic" processor. But this testing of the RTX 5090D also serves as the foundation for the other tests.

Marvel Rivals at 4K highest quality settings almost completely reverses the CS2 results. All the CPUs, from the Core i3-12100F to the Core Ultra 9 285K, shared virtually identical frame rates of 111-115 FPS, revealing a bottleneck that's not CPU related. The Xeon E5-2680 v4 wasn't far behind, with an average frame rate of 101. That makes the fastest Ryzen 7 9800X3D only 14% quicker than the nine-years-old Xeon chip. But again, minimum FPS is important, and the Xeon only managed 65 FPS compared to 80–99 FPS on the other processors. It's up to 34% slower on minimum framerates.

Interestingly, DLSS 3 frame generation more than doubled the performance of all the CPUs, with most of the chips at 238–242 FPS. (We have to assume DLSS upscaling was also enabled, as otherwise performance shouldn't be more than 80~90 percent faster at best from framegen.) With DLSS3 framegen, the Xeon E5-2680 v4 closed the gap slightly, averaging 218 FPS. Minimums were still up to 38% slower, however.

And DLSS4 with MFG4X in Marvel Rivals pushed everything into the 400+ FPS range on average. The Xeon this time was only 6% behind the fastest chips. And of course, the 1% lows were still quite a bit worse, at 164 FPS compared to 298–308 FPS on the fastest CPUs. So that's still a big 40–47 percent deficit, and as we pointed out in our DLSS4 and MFG testing, when you divide by four to get the base framerate and input rate, it was only running at 41 FPS before framegen.

Cyberpunk 2077, at 4K maximum RT-Overdrive (possibly Psycho) settings ran at just 34 FPS on the best CPUs, including the Ryzen 7 9800X3D. The slower chips like the Ryzen 5 5600 and Core i3-12100F landed at 32 and 31 FPS, respectively. The Xeon E5-2680 v4 was the lowest again, but still with an average framerate of 29 FPS. In other words, the Ryzen 7 9800X3D outperformed the Xeon E5-2680 v4 by 17%. Minimum FPS was 19 on the Xeon versus up to 24 on the other CPUs, a 26% lead.

DLSS3 framegen and upscaling gives a massive boost to framerates, with the Xeon landing at 95 FPS compared to 125–132 FPS on the other chips. It was up to 28% slower in that case. But then DLSS 4 with multi frame generation (MFG) boosts framerates even more.

The Ryzen 7 9800X3D managed 255 FPS, with around 250 FPS on all the other AMD chips save for the Ryzen 5 5600. DLSS 4 with MFG4X on the Xeon E5-2680 v4 allowed the ancient CPU to nearly match the other Intel chips on average FPS. It scored 213 FPS, compared to 219–226 FPS on the other Intel CPUs. That's only a 6% difference, at most... unless you look at minimum FPS. In that case, the Xeon only managed 78 FPS (basically tying the 12100F), while most of the other CPUs were in the 120–150 FPS range.

In short, no, the nine-years-old Xeon processor is not going to keep up with the latest chips, with or without framegen and MFG and upscaling. But it does better than you might expect, at least in the three games that were tested on the RTX 5090D. Frame generation can prove particularly helping in games that are completely CPU limited, as that means the GPU has plenty of headroom to run the AI routines for frame generation. It's particularly helpful with the Xeon E5-2680 v4, as that's going to be a severely CPU-constrained environment.

That doesn't mean MFG and framegen are the solution to CPU bottlenecks, though. If you take some of the minimum FPS results and divide by four (like in Cyberpunk 2077), the base framerate was under 20 FPS. It might be playable, technically, after quadrupling that to 78 FPS, but it's not the smoothest experience at all.

Sales of Intel’s data center CPUs in 2024 hit their lowest level in more than a decade due to increased competition from AMD, the transition to higher-core count models amid a drop in the number of CPUs, and a market shift to AI servers that use up to eight GPUs and just two CPUs. As analysts from SemiAnalysis observed, unit sales of Intel’s data center CPUs in 2024 dropped by 20% from 2011 levels and over 80% from 2021. 

"DCAI revenue increased by $182 million from 2023, primarily driven by an increase in server revenue," Intel's recently published Form 10-K reads. “Server ASPs increased by 12% from 2023, primarily due to a higher mix of high-core-count products. Server volume decreased by 10% from 2023 due to lower demand in a competitive environment and a higher mix of high-core-count products." 

There are multiple possible reasons why Intel’s server-grade CPU sales have hit their lowest level in 13 years in 2024. 

Intel’s data center CPU sales began to ascend sharply in the mid-2010s due to the rise of cloud data centers. Back then, Intel did not have any real competitors, so the number of cores did not increase quickly, which stimulated cloud service providers to buy more CPUs to meet the performance demands of their customers. 

Then, Intel processor sales increased in 2018 due to Meltdown and Spectre mitigations that reduced the performance of already installed CPUs and prompted CSPs to buy more servers with Intel CPUs in 2018. Competition from AMD became stronger in 2019, which is why sales of Intel CPUs for data centers slightly dropped that year. 

Then came COVID-19, and demand for cloud computing increased again in 2020 and 2021, further driving sales of Intel server CPUs. 

However, in 2022, demand for general-purpose servers slowed down while AMD unveiled its 4th Generation EPYC processors with up to 96 cores, far exceeding the number of cores in Intel’s top-of-the-range Xeon CPUs. As a result, the blue team’s unit shipments dropped in 2022 and then collapsed in 2023. 

In 2024, Intel finally released its Xeon 6 processors with up to 128 high-performance cores or 144 energy-efficient cores, so unit sales of Intel server CPUs declined slightly once again as customers switched to high-core-count models. The good news is that Intel’s data center average selling prices have increased, but it isn't yet clear if the company can regain share in a market that has now shifted focus, and spend, to AI accelerators. 

AMD on Tuesday announced its financial results for the fourth quarter of 2024 and for the whole year. As expected, the company managed to post impressive results driven by its client and datacenter CPUs. Perhaps AMD's biggest achievement in the quarter is that the company managed to outsell Intel in the datacenter space for the first time in history. Yet,  sales of AMD's datacenter GPUs somewhat disappointed market observers. 

AMD's revenue in Q4 2024 totaled $7.658 billion, up 24% year-over-year. The company's gross margin hit 51%, whereas net income was $482 million. On the year basis, 2024 was AMD's best year ever as the company's revenue reached $25.8 billion, up 14% year-over-year. The company earned net income of $1.641 billion as its gross margin hit 49%. But while the company's annual results are impressive, there is something about Q4 results that AMD should be proud of. 

Datacenter business was the company's primary source of earnings, with net revenue reaching record $3.86 billion in Q4, marking a 69% year-over-year (YoY) increase and a 9% quarter-over-quarter (QoQ) rise. Operating income also saw substantial improvement, surging 74% YoY to $1.16 billion. By contrast, Intel's datacenter and AI business unit posted $3.4 billion revenue, while its operating income reached $200 million. But while the quarter marked a milestone for AMD, market analysts expected AMD to sell more of its Instinct MI300-series GPUs for AI and HPC. 

AMD's client business unit, which includes CPUs for desktops and laptops, showed exceptional growth in Q4. Net revenue climbed 58% YoY to $2.31 billion and 23% QoQ. However, the standout figure was the 711% year-over-year surge in operating income, reaching $446 million. 

Unfortunately for AMD, its gaming business struggled in the fourth quarter, with net revenue declining to $563 million, or 59% less compared to the same timeframe in the previous year. The operating income of the unit plunged 78% year-over-year to just $50 million. The major decline being the result of lower sales of Radeon discrete GPUs as well as system-on-chips for Microsoft's Xbox and Sony's PlayStation game consoles. 

AMD's embedded segment saw a moderate decline in the fourth quarter with net revenue falling to $923 million, or by 13% compared to Q4 2023, while operating income dropped 21% to $362 million. On a quarter-to-quarter basis, revenue remained flat, but operating income declined 3%.

Intel on Thursday said that its codenamed Clearwater Forest processor for data centers will only be launched in the first half of 2026, roughly two years after the company introduced its Xeon 6-series CPUs and one or two quarters behind schedule. By contrast, Intel's Panther Lake product for client PCs — which uses the same 18A process technology — is on track for a 2H 2025 launch. 

The delay of the key server processor comes amid the company's unveiling of Intel's financial results for the fourth quarter of 2024 and the entire year, which revealed massive losses. Paired with Intel's announced cancellation of its Falcon Shores AI GPUs, Intel's competitive posture for the exploding AI market is now severely weakened. 

Clearwater Forest delayed

 "We are also making good progress on Clearwater Forest, our first Intel 18A server product that we plan to launch in the first half of next year," said Michelle Johnston Holthaus, interim co-CEO of Intel, during the company's earnings call on Thursday. Holthaus cited difficulties with Clearwater's packaging technology but said the underlying 18A process node remains strong.

Currently, Intel is ramping up production of its energy-efficient Xeon 6 'Sierra Forest' and high-performance Xeon 6 'Granite Rapids' processors. It believes that these CPUs will be instrumental in stabilizing its market share this year. However, with the next-generation Xeon 7-series 'Clearwater Forest' and Xeon 7 'Diamond Rapids,' Intel probably expects to turn the tables and start regaining market share. 

However, there may be a setback to this plan, as Intel originally promised to launch Clearwater Forest in 2025, but it now says that the new CPUs will be released in the first half of 2026. The delay will affect Intel's competitive position in the data center market and postpone potential design wins with interested parties. 

Clearwater Forest holds additional significance for Intel, as this is the first data center CPU with compute chiplets manufactured on the Intel 18A process technology (1.8nm-class) and featuring a Foveros 3D base die fabbed on the Intel 3 production node. If the company can mass-produce Clearwater Forest cost-effectively, it will be a major testament to its 18A manufacturing process—which happens to be the first technology developed both for Intel and its foundry customers—as a success. This could also attract potential clients to Intel Foundry. For now, Intel is optimistic about 18A. 

"18A has been an area of good progress," said David Zinsner, interim co-CEO and chief financial officer of Intel, during the call. "Like any new process, there have been ups and downs along the way, but overall, we are confident that we are delivering a competitive process."

Intel's 2024 Revenue Flat, But Losses Climb to $18.8 Billion

The company's losses stem from major investments in new fabs and production capacity in the U.S. These investments will only pay off if Intel's execution over the next couple of years is solid and its 18A technology is competitive in terms of performance and cost. 

The delay of a key product comes at a particularly bad time for Intel. The company's revenue for 2024 totaled $53.1 billion, down 2% year-over-year, which may be considered relatively flat. However, the company's net loss climbed to $18.8 billion compared to a modest $1.7 billion profit the previous year. 

Intel's fourth-quarter results for 2024 showed that the company earned $14.3 billion in revenue, up $1 billion from the previous quarter but down 7% from the same quarter a year ago. During Q4, the company posted a $100 million loss, whereas in Q4 2023, its profit was $2.7 billion. 

Revenue for Intel's Client Computing Group (CCG) increased to $8 billion while generating an operating income of $3.1 billion, which is down from $8.8 billion in revenue and $3.6 billion in Q4 2023. Intel suspects that a portion of its Q4 revenue increase was due to its clients hedging against potential tariffs. 

Intel's Data Center and AI Group (DCAI) is less vulnerable to tariffs, so its revenue stood at $3.4 billion, up from $3.3 billion in the previous quarter but down from $3.5 billion in the same quarter a year before. However, the group's profitability hit a new low of $200 million. 

Intel's Networking and Edge Computing (NEX) business revenue increased to $1.6 billion, rising both sequentially and year-over-year. The unit's profitability also increased to $300 million, marking its best performance in recent quarters. 

Intel Foundry earned $4.5 billion in revenue and recorded a $2.3 billion loss. On an annual basis, Intel Foundry's revenue declined from $5.4 billion, while its losses widened to $2.3 billion. However, the company saw quarter-over-quarter improvement, increasing revenue from $4.4 billion and reducing losses from $5.8 billion. Intel attributes this improvement to an increased EUV wafer mix and higher equipment sales by IMS Nanofabrication. For the full year, EUV wafer revenue grew from 1% of total revenue in 2023 to over 5% in 2024. 

Altera delivered revenue of $429 million, up 4% sequentially, with an operating margin of 21% compared to 2% in Q3. Mobileye reported revenue of $490 million, up 1% sequentially, with an operating profit of $103 million.

Humble Outlook

Intel expects its revenue to be between $11.7 billion and $12.7 billion for the first quarter of 2025, down $0.5 billion from Q1 2024. Also, Intel expects its GAAP gross margin to fall to 36%.

In a surprising twist, Intel announced on Thursday that its Falcon Shores GPU for AI and HPC applications will not be released to the market but will remain an internal test processor to develop the hardware and software foundations for its successor, codenamed Jaguar Shores. This decision makes Intel's struggling Gaudi 3 processor, which has suffered from limited uptake amid the company's disclosed software issues, the company's only viable solution for AI applications for the next two years. Meanwhile, the company will work on developing rack-scale solutions, the only true way to compete with AI behemoth Nvidia.

"Many of you heard me temper expectations on Falcon Shores last month," interim co-CEO Michelle Johnston Holthaus said during the company's earnings call on Thursday. "Based on industry feedback, we have decided to leverage Falcon Shores as an internal test chip. Without bringing it to market, we will support our efforts to develop a system-level solution at rack scale with Jaguar Shores to address the AI data center more broadly." 

The company originally expected Falcon Shores to serve the AI and HPC markets currently covered by Gaudi processors. However, a quarter ago, Intel's interim co-CEO told analysts and investors to temper their expectations, as Falcon Shores would mostly serve as a vehicle to develop a hardware and software ecosystem around its hybrid processors. 

Apparently, after careful consideration, Intel decided not to launch Falcon Shores commercially at all but to use it solely for internal development to perfect hardware and software rather than launching a half-baked product commercially that could potentially damage the company's reputation. 

Intel described Falcon Shores as its first multi-chiplet design featuring Xe-HPC (or Xe3-HPC) GPU chiplets for highly parallel AI and HPC workloads. The product was meant to greatly increase performance and performance-per-watt efficiency compared to Intel's AI and HPC processors, though the company refrained from giving actual numbers. 

Oddly, Intel stated that Falcon Shores would be an "internal test chip." When developing an ecosystem, some processors that are not launched commercially are still shipped to external partners, including independent hardware vendors (IHVs) and independent software vendors (ISVs). For example, Intel's first-generation Xeon Phi processor (derived from the company's Larrabee GPU project), codenamed Knights Ferry, was not offered as a mainstream, fully supported commercial product. It was provided in limited quantities to select developers and research partners to begin porting and optimizing code for Intel's Many Integrated Core (MIC) architecture, which later became the commercial Xeon Phi product family. 

Since Falcon Shores and its successor, Jaguar Shores, have entirely new GPU microarchitectures, Intel would typically send samples of these processors to ISVs to ensure their software can work efficiently with the hardware. Also, since Intel is focusing on rack-scale solutions, it would stand to reason that it would also supply samples of Falcon Shores to its IHV partners. However, with Falcon's new designation as an internal test chip only, that strategy doesn't appear to be planned. 

In an unexpected move, Intel quietly cut the prices of its latest Xeon 6 'Granite Rapids' processors approximately four months after their formal introduction in late September. The price slash is quite dramatic as the flagship model now costs $12,460, or $5,340 less than at launch. As a result, Intel's Xeon 6 CPUs are now cheaper than AMD's latest EPYC 'Genoa' processors both in absolute numbers and in terms of per-core pricing.

Intel's Xeon 6-series 'Granite Rapids' processors were the company's most expensive CPUs ever. However, they are now considerably cheaper than they were four months ago. Intel has not officially announced the price cuts, but these adjustments are reflected in the company's online database at ark.intel.com, meaning the price changes are official. 

Depending on the model, the price reduction varies from $1,585 for the 96-core Xeon 6975P all the way to $5,340 for the 128-core range-topping Xeon 6980P. As for percentages, three out of five Xeon 6 'Granite Rapids' processors are now 30% cheaper, while two saw reductions of 13% (6972P) and 20% (6952P).

Due to the price cut, Intel's Xeon 6 processors are now significantly more affordable. The range-topping 128-core Xeon 6980P is now less expensive than AMD's top-of-the-line 96-core EPYC 9654, as are other members of the Granite Rapids family compared to their direct rivals from AMD's 5th Generation EPYC lineup. 

However, there is a major development beyond that. Perhaps even more significant is that Intel's Xeon 6900P-series processors are now cheaper than AMD's EPYC 9600-series CPUs in per-core pricing. This may not sound like a big deal in general, but it makes Intel's Xeon 'Granite Rapids' processors more competitive for cloud service providers that strive for multiple metrics, including performance per socket, cores per socket, performance per watt, and of course, total cost of ownership (TCO). As for TCO, this aspect may not be the strongest point of Granite Rapids when compared to AMD's Genoa. For example, AMD's 96-core EPYC 9654 has a processor base power of 360W, whereas Intel's 96-core 6972P consumes a rather whopping 500W, thus resulting in a higher TDP. 

It should be noted that we are dealing with Intel's Recommended Customer Price (RCP), which represents 1,000-unit purchase quantities. Big server OEMs like Dell, HPE, and Lenovo, as well as major CSPs like Amazon Web Services (AWS), Google, Meta, and Microsoft Azure, purchase Intel's processors in much larger quantities and at different prices that are often negotiated. Furthermore, large CSPs also tend to buy the so-called off-roadmap parts with specifications tailored to their performance and TCO requirements at pre-arranged quantities. Therefore, RCP pricing has little, if any, effect on actual purchase prices for the big players. 

Then again, the very fact that Intel needed to lower the prices of its leading-edge Xeon 6900P-series 'Granite Rapids' processors by as much as $5,340 per unit indicates that it is not exactly satisfied with the number of units sold and would like to increase sales. Another reason for the price reduction could be Intel's intention to stop, or at least slow down, AMD's strengthening position in the data center CPU market. AMD commanded a 24.2% share of the data center CPU market in Q3 2024, its highest share since the mid-2000s, according to Mercury Research.

High energy costs in the European Union are probably among the main reasons behind the bloc's deindustrialization. Many power-hungry production facilities relocate to Asia because it has become nearly impossible for them to stay competitive with current energy prices. Ireland is not an exception, and this makes Intel very concerned (according to RTE) as it runs its major Fab 34 near Leixlip and has to make sure that the fab produces products at competitive costs. But should Intel really be worried?

Intel's Fab 34 in Ireland is the first production facility in Europe to use extreme ultraviolet (EUV) lithography to make chips in high volumes. The fab is capable of producing microelectronics using Intel 4 (previously known as 7nm) and Intel 3 (formerly known as 5nm) process technologies and currently produces compute tiles for Intel's Core Ultra 1-series (Meteor Lake on Intel 4) and Xeon 6 processors (Granite Rapids and Sierra Forest on Intel 3). These are premium products.

Energy prices are rising across the world, in the U.S., Europe, and Asia. However, energy prices are considerably higher in Europe when compared to Asia and the U.S. For example, rates per kWh in the U.S. range from 8.57¢ in Texas to 11.41¢ in Oregon to 12.31¢ in Arizona. By contrast, electricity costs in Ireland vary from 15¢ (night rate) to 26¢ (day rate) for commercial customers. In South Korea and Taiwan, electricity for large commercial users costs 13¢ after increases in late 2024. Therefore, it is more expensive to make chips in Ireland than in the U.S. or Taiwan, at least with respect to energy costs.

Energy Costs

Electricity cost source links: Arizona, Ireland, South Korea, Taiwan

When it comes to multibillion-dollar semiconductor fabrication facilities, the vast majority of their costs are represented by capital expenditures, depreciation, materials, and labor. Utilities, such as electricity, water, and cooling, account for a relatively small — single-digit to low double-digit percentage — of microelectronics production costs, according to some industry estimates.

For example, Intel consumed around 9.1 billion kWh of electricity in 2023, according to the company's Corporate Responsibility Report (CSR). Intel uses green energy across all of its facilities in the U.S., Europe, Israel, and Asia, so its energy prices are a bit higher than those of average businesses. But if we assume that Intel paid 13¢ per kWh on average, then the company paid approximately $1.183 billion for electricity in 2023. Meanwhile, Intel's total revenue in 2023 was $54.2 billion and its total costs were around $32.5 billion (that includes R&D, CapEx, SG&A, depreciation, etc.).

Therefore, energy accounted for 3.64% of Intel's costs and 2.18% of Intel's product revenue. It is plausible to assume that energy costs account for approximately 5% of Intel's product costs, but that probably depends on actual products. For products like Intel's Xeon 6980P, which sells for over $12,000, the contribution of energy costs is probably negligible.

But Intel is still concerned about energy costs in Ireland, according to the report. In fact, a 'senior source' in Davos told RTE that lower labor costs in Ireland are offset by high energy costs. These high costs stem from delays in renewable energy infrastructure and the fixed expenses of offshore wind farms, which are often passed on to customers, RTE claims. To address this, Intel is advocating for the state to assume part of these costs during the development phase to ease the financial burden on manufacturers like itself, the report says.

Qualcomm has hired Sailesh Kottapalli, a former chief architect of Xeon server processors at Intel, to lead the development of the company's data center CPUs, reports CRN. Kottapalli spent 28 years at Intel and worked on various projects, including x86 and Itanium, as well as CPUs and GPUs. More recently, he was responsible for multiple generations of Xeon processors. 

"As we head into 2025, I am excited to share that I have joined Qualcomm," Kottapali wrote in a post on LinkedIn. "The opportunity to innovate and grow while helping to scale new frontiers was immensely compelling to me, a once-in-a-career opportunity that I could not pass on. The start of this new chapter also coincides with the closing of a previous one at Intel that lasted 28 years. This experience was tremendously gratifying, and I would like to acknowledge it." 

Kottapalli joins Qualcomm as a senior vice president and will lead the company's data center CPU efforts. Qualcomm's upcoming server CPUs are expected to use cores developed by engineers from Nuvia, a company Qualcomm acquired for $1.4 billion in 2021. Nuvia originally designed its Arm-based Phoenix (now called Oryon) cores with data centers in mind, but Qualcomm uses them for Snapdragon X system-on-chips (SoC) for consumer PCs, which upset Arm and led to litigation between the two companies. 

This is not Qualcomm's first foray into server CPUs. The company previously attempted to enter the market with Centriq but abandoned those efforts in 2018 and laid off its development team. This new initiative marks a return with a stronger focus and expanded resources. 

It should be noted that a wider range of data center software now supports the Arm instruction set architecture. Furthermore, as Amazon expands its Graviton-based offerings, the data center industry's confidence in Arm processors increases, so Qualcomm has every reason to assume that demand for its upcoming server processors will be higher than it was back in the day. To some degree, the hire of Sailesh Kottapalli serves the same purpose as people tend to trust server industry veterans. 

Just yesterday we also learned that Qualcomm is looking for an SoC Security Architect for its Data Center Team.

Qualcomm is assembling a team of developers to design server processors for the data center. Evidence of this comes via a vacancy posted on the company's own website (noticed by Longhorn). The company is looking for a server system-on-chip (SoC) security architect, and the details of the listing outline that the company is "developing reference platforms based on Qualcomm's Snapdragon SoC, delivering a comprehensive solution that includes hardware, software, reference designs, user guides, SDKs, and more."

The job listing confirms the existence of a 'Qualcomm Data Center' team that is designing a 'high-performance, energy-efficient server solution for data center applications.' While we are, of course, speculating, Qualcomm may plan to use the high-performance energy-efficient cores designed by its Nuvia team for data center applications. This same team developed the company's Snapdragon X processors for laptops, but it originally designed server processors before it was brought into the Qualcomm stable. 

In fact, Qualcomm used to develop and sell Arm-based data center CPUs back in the day without much success, which is presumably why it stopped. However, Amazon’s Graviton processors have proven that Arm-based solutions can thrive in the data center, and the market is wide open for more innovative entrants. Apparently, Amazon's success made Qualcomm rethink and return to the drawing board with data center CPUs. 

"We are seeking experienced SoC Security Architects to join our team," the job listing reads. "If you possess a deep understanding of hardware security architecture and are passionate about architecting and designing complex SoCs at advanced process nodes, we would be pleased to hear from you. This critical role involves architecting the next-generation security system and hardware infrastructure by collaborating with other platform architects to optimize overall Power, Performance, Area (PPA) efficiency and security assurance while ensuring compliance with industry standards."

Interestingly, when acquiring Nuvia, Qualcomm specifically noted that it planned to use Nuvia's Phoenix cores in its processors for client PC and not data centers, despite the fact that Nuvia originally designed its cores with the data center in mind. Nowadays, the cores dubbed 'Oryon' power Qualcomm's Snapdragon X processors for client PCs.

But now that Qualcomm has apparently changed its mind about data center products and is assembling a team of SoC developers (the core team is already there), it is reasonable to expect the company to develop a data center solution within the next couple of years. While we do not know for sure, the first devices to use Qualcomm's CPUs would likely be the company's platforms for 5G and then eventually 6G base stations, a space where the company controls the hardware and software stack. As for Qualcomm's development of chips for data centers currently dominated by x86, only time will tell if that is the company's ultimate intention. 

Dutch high-end audio company Taiko Audio sells a fanless music server designed for the most dedicated audiophile. The Taiko Audio Extreme Server, which FanlessTech shared on X (formerly Twitter), is intended to store lossless audio files and stream music from services like Tidal. It starts at €28,000 or over US$29,600 with 2TB of storage. Its other specifications include two Intel Xeon Scalable 10-core CPUs and a custom, entirely passive cooling system, ensuring your listening pleasure isn’t disturbed by fan noise and airflow.

Taiko’s approach of using two processors allows the Extreme Server to use dedicated servers for specific processes—one for running the user interface (which is still based on a custom Windows 10 Enterprise LTSC 2019 operating system) and one for exclusively running the Roon music management app. According to the company, “The choice to design a dual CPU system was largely fueled by finding a way around the impact Roon’s luxury interface has on sound quality. It does enable Roon processing to become virtually inaudible, a world’s first in our experience.”

Aside from this, the other specifications of the Extreme Server include a 280 GB SSD for the operating system and a base storage capacity of 2 TB for your music files, which you can expand up to 64 TB (but will cost you an additional €1,855 or more than $1,960). It’s also equipped with 48GB of RAM, which, amazingly, is divided into twelve 4GB custom-made industrial memory modules. Taiko says that “fewer and lower speed DIMMs are better for sound quality,” which is why it didn’t use the best RAM for gaming.

Of course, we cannot forget about the specialized power supply that ensures the best sound quality. It also includes multiple audio and peripheral connections, including five USB ports, two copper Ethernet ports, a fiber SFP open slot Ethernet port, a VGA port, a S/PDIF port, and a single AES/EBU port (which is optionally available in dual or quad setups).

This isn’t the only audiophile server to come on the market, with the $3,699 Nucleus Titan audiophile media server—powered by a standard NUC—arriving to market early this year, and the $1,795 Undentia Cirrus7-SE music server has been available since 2021. However, the Taiko Audio Extreme Server takes an audiophile music server's performance (and price) to the extreme. These unbelievable prices align with other audiophile equipment we find in the market. While many of these specialized devices do have an extra layer of care and research, which could justify their hefty costs, some other devices, like the LAN iSilencer, Innuos Phoenix audiophile network switch, and this ‘audiophile’ SSD, are just dubious snake-oil equipment.

The two Intel Xeon processors and the custom cooling solution will make the Extreme Server more expensive than your average gaming PC. But we wonder: does the eight-fold price increase between Nucleus Titan and the Extreme Server deliver an eight-fold jump in sound quality?

Pat Gelsinger, the CEO of embattled tech company Intel, praised the xAI team after visiting Elon Musk’s Memphis Supercluster. He posted on X (formerly Twitter) that xAI uses Intel Xeon processors for its AI head node — the dedicated server that manages the entire 100,000-GPU-strong cluster — and that it’s “incredible what’s been built in such a short amount of time!”

After losing over $1.6 billion in its data center and foundry businesses, Intel is struggling. It has also missed the AI bandwagon, especially as its Gaudi 3 AI accelerator still suffers from issues.

On the flip side, Elon Musk has so far spent around $10 billion on AI training hardware this year, allowing his team to set up 100,000 Nvidia H200 GPUs in just 19 days — a process that usually takes four years, according to Nvidia CEO Jensen Huang. Although Nvidia powers Elon’s AI processors, he still needs a CPU to direct the AI cluster’s massive processing power. Pat Gelsinger’s post confirms that the xAI team chose Intel Xeon processors to drive their AI head node. Team Blue launched its latest 128-core flagship CPU called Granite Rapids in September 2024, but Gelsinger did not confirm which model the team uses.

The Intel CEO also praised Michael Dell, the founder and CEO of Dell Technologies and the current provider of xAI’s head node servers — at least those pictured here. Musk previously purchased systems from Supermicro, but it's unclear if the Dell servers are used in place of other Supermicro offerings — it is entirely possible that the company chose to use Dell head nodes while continuing to outfit the rest of the data center with Supermicro gear. The use of Dell head nodes will further rumors that Supermicro's legal issues have pushed xAI to switch suppliers, but that might not be the case.

Aside from exploring xAI’s massive AI cluster, we don’t know if Pat Gelsinger had other reasons for visiting the Memphis data center. Musk plans to double the GPUs on the site to 200,000 shortly, and he even mentioned plans to go as high as 300,000, although it seems that it will be a later phase of expansion. All these additional GPUs will still reportedly be Nvidia AI accelerators and could be Blackwell GPUs, so it’s unlikely that Pat is selling Elon some of Intel’s Gaudi 3 chips.

However, such a massive GPU purchase means that xAI would also need many CPUs, so he might try staying in Musk’s good graces to sell more Xeon chips. After all, even though xAI isn’t buying Intel’s AI chips yet, it still would do the company well if it could move its data center CPUs, helping it recover from its financial troubles revealed in August this year.

Clearwater Forest is turning out to be an entirely different beast. It will incorporate not only the latest goods from Intel Foundry—like Foveros Direct 3D, RibbonFET, PowerVia, and EMIB 3.5D—but also 3D cache, which Intel calls "Local Cache," per an interview with Intel's Florian Maislinger conducted by der8auer and Bens Hardware. And sadly, Team Blue has no plans to introduce AMD 3D V-cache-esque capabilities in its desktop CPUs.

Intel's next-generation E-Core, a Xeon-only series codenamed "Clearwater Forest," will leverage the flagship 18A node on which Pat Gelsinger has staked the entire company's future. Clearwater Forest is expected to use Atom Darkmont cores, succeeding the already-fast Skymont featured in Lunar Lake and Arrow Lake CPUs.

From an architectural and packaging standpoint, Clearwater Forest uses three "active" Base tiles - each hosting four CPU chiplets or tiles for 12 CPU tiles connected via Hybrid Bonding (Foveros 3D Direct). On the outskirts lie two I/O chiplets - connected to the CPU tiles through EMIB 3.5D. The entire package is expected to feature almost 300 billion transistors.

"For us, [gaming] is not an extremely large mass market," Maslinger said. "We sell a lot of CPUs that are not necessarily used for gaming. We still have [3D Stacked Cache] technologically. This means that next year there will be a CPU [Clearwater Forest] for the first time that has a cache tile, but not on desktop."

The interview confirms something we've missed: how the cache is structured. A quick look at Intel's white paper clarifies that the SRAM is packaged into the Base tile, which Intel calls "Local Cache." Until now, even with a disaggregated design, Intel has employed "Compute Tiles" featuring all cores alongside their respective caches linked via the Ring Bus. Clearwater Forest shifts the cache to the Base tile beneath the CPU chiplets, which now only hosts the CPU cores—and the entire assembly acts as a "Compute Module." This is unlike AMD's X3D approach, since the CPU chiplets are mutually dependent on the Base tile.

Afterward, Maislinger asserted that Intel's gaming market is relatively small, and designing an X3D competitor would be pointless if it could not be reused for servers. On a side note, AMD is also looking to introduce 3D V-Cache in Threadrippers.

The conversation shows that Intel (or rather Intel Foundry) does have the technology to combat AMD's 3D V-Cache: Clearwater Forest. But it isn't planning to make that technology mainstream anytime soon.