Owner of original Intel 8080 pre-production layout seeks restorer — handcrafted Rubylith mask shows 5,000 transistors and interconnect patterns of the fabled 2 MHz CPU
The same computing history artifact was previously pictured alongside Andy Grove, Robert Noyce, and Gordon Moore in 1978.
The owner of what is claimed to be “the original engineering copy of the Intel 8080 rubylith mask” has shared a social media shout-out, looking for a skilled restorer. From the shared photograph, this important artifact from the history of computing looks like it would benefit from remounting and reframing. Hopefully, the hand‑crafted, large‑scale sheet of red film (Rubylith) has remained in good condition under glass, though. The framed artifact is likely genuine and original, as its current owner is thought to be related to Internet Hall of Fame inductee Dan Lynch, a pivotal figure in the early Internet’s success.
Hey uhh long shotBut i own the original engineering copy of the intel 8080 rubylith maskI need to get it restoredAnyone know the right guy? pic.twitter.com/ckqcSylvV6August 3, 2026
In you unfurl the tweet above, you can see Tom Lynch, a self-described arborist and the owner of an AI infrastructure startup, standing behind the framed chip artwork. Folks comment on the Rubylith looking just like the one that the Intel Trinity: Andy Grove, Robert Noyce, and Gordon Moore, were photographed beside in 1978.
Rubylith is simply an adhesive, peelable red film that found favor in graphic arts and chip design before designers went digital. Engineers could cut away parts of the film to define where light would be exposed during photolithography processes. Rubyliths would often be marked with pens, tape, and overlays, especially as designs were iterated and refined ahead of tape-out.
The Intel 8080’s primary architect was Federico Faggin, and it was manually drafted in the age before modern CAD. This human-scale draft is likely 100x magnification compared to the finished processor die. Even scaled this large, it would still be quite an intricate drawing as it had to map around 5,000 transistors, traces, etc., into an approximate 20- x 16-inch sheet. The commercial Intel 8080 release ended up being manufactured on a 6 μm silicon gate process. It originally ran at 2.0 MHz clocks, but later revisions would boast clock speeds up to 3.125 MHz.
Intel’s 8080 was an important 8-bit microprocessor for both the company and the advancement of personal computing. This 8-bit CPU was the one chosen for the Altair 8800, was the original target architecture for the CP/M operating system, and would be a big influence on the later x86 architecture. We also recently wrote how the 8080 bottlenecked the Space Invaders arcade design, unintentionally resulting in the space shoot-em-up’s thrilling increase in pacing as aliens were zapped from the sky.
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Mark Tyson is a news editor at Tom's Hardware. He enjoys covering the full breadth of PC tech; from business and semiconductor design to products approaching the edge of reason.
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Geef Imagine if a processor was really that big! The size and weight of the heatsink! :unsure:Reply
Then imagine what a current day CPU of that size could do. The processing power! 🤯
A 128 thousand cores ... with 512 TB of level 3 cache...
Wonder if it will run Crysis...
(random numbers, wasn't thinking in reality.) -
usertests Reply
1. Wafer Scale Engine shows what you can get out of a 300mm wafer. WSE-3 is made with TSMC 5nm. It has ~900,000 very small "cores", and 44 gigabytes of SRAM. You can look into the cooling solution, which is monstrous, since it needs to handle 23 kW.Geef said:Imagine if a processor was really that big! The size and weight of the heatsink! :unsure:
Then imagine what a current day CPU of that size could do. The processing power! 🤯
A 128 thousand cores ... with 512 TB of level 3 cache...
2. Rectangular panel substrates are being researched as a potential replacement for 300mm wafers, yielding more usable area and looking even more like a gigantic mask.
3. TSMC is aggressively increasing maximum interposer size, to about 9.5x reticle limit now, 14x and larger in the future. Roadmap at the top of this TH Premium article.
4. We need some form of 3D to realistically hit terabytes of SRAM. It seems plausible, but an expensive technical challenge. -
steve schmidt there should be 6 masks, not one.... the one shown appears to be the top metallization layer as you can clearly see the bonding pads around the perimeter.... wonder what they want restored? Cant be used for anything... its just a wall hangerReply -
ezst036 ReplyGeef said:Imagine if a processor was really that big! The size and weight of the heatsink! :unsure:
HDMkw6lnzmIView: https://www.youtube.com/watch?v=HDMkw6lnzmI -
Eximo Reply
I believe there were two recent explorations in bonding entire wafers to form layers. One approach was building transistors in 3D using whole wafers. And the other was just vertical stacking like AMD and Intel have been doing with silicon via as a way to build out massive chips at scale. (I think it was this Samsung article)usertests said:4. We need some form of 3D to realistically hit terabytes of SRAM. It seems plausible, but an expensive technical challenge.
https://semiconductor.samsung.com/news-events/tech-blog/from-gaa-to-3d-stacked-fet-expanding-the-transistor-into-the-third-dimension/
And this one out of the UofI in Champaign
https://spectrum.ieee.org/3d-chips