A Reddit user shared the 16TB SSD they bought on eBay for less than $30 (EUR 25), which only contained a board and a microSD card hot-glued with some weights to make it feel like a legitimate drive. u/Hartkralle shared their find, saying that they buy from these suspicious listings when they come across them. Since eBay has a robust consumer protection policy, they get their money back while the seller loses their account.

16 TB SSD for only 25€? What could go wrong? from r/pcmasterrace

"I buy one, check if it's legit or not, and if not, [I] report the seller to eBay. I get my money back, and they (the seller) lose [their] account,” u/HarkKralle said in a comment. “If I couldn't ensure that the money would flow back, I wouldn't do it.”

Another Redditor said that they appreciate what the OP was doing, but they were “99.99% positive” that the scammer would have another account in an hour. The OP replied, saying, “Possible, but even that it's an hour they cannot use to scam people and proof/information for more people that scams like this exist.”

Scams like these have been around for decades now. One commenter even added that back in the ‘90s, they used high-quality 60-minute VHS tapes for their work, but one time received cheap, low-quality tapes that could only hold five minutes of footage instead. The sample that u/Hartkralle showed is also relatively low effort. Because of the ongoing memory and chip shortage, we’ve seen exceptionally good clones of Samsung 990 Pro SSDs, one of the best SSDs you can buy today. They have become so sophisticated that the most reliable way of spotting if they’re fake is to check them on CrystalDiskInfo.

One of the downsides of these fake drives is that you won’t get the read and write speeds that you’d expect from a modern SSD. But the bigger issue here is that using them could lead to complete data loss. For example, the fake drive that u/Hartkralle bought reports a capacity of 16TB, but the microSD card inside it is only 60GB. So, if an unsuspecting user transfers more than 60GB of data, they’d end up corrupting everything stored in the drive.

A 2TB Amazon Basics Portable SSD already costs almost $360, while an 8TB SSD from reputable brands like SanDisk, Crucial, or Lexar already hit $850. So, someone who doesn’t follow developments in the tech industry and stumbles across this cheap drive might think they’re getting a steal, when, in reality, they’re the ones being stolen from. Thankfully, eBay’s consumer protection allows people who were scammed, intentionally or otherwise, to get their money back — that is, if they know they were scammed in the first place.

We've seen a lot of dead GPUs around here, some of which have been brought back to life in the most fascinating ways possible — this one we found on the r/SerbiaGaming subreddit is no different. An unlucky gamer found himself a savior when their RTX 3070 died, and a repair shop demanded 12,000 Serbian Dinars, or roughly $120, to repair it. That savior was none other than the OP's own father, who fixed his dead GPU with a salvaged capacitor from an old radio, as you can see in the embedded post below. We reached out to the poster for additional details.

Stara škola električara - najbolja from r/SerbiaGaming

u/External_Length_8877 explained how their GPU died in the first place. It was a pretty easy deduction since they found a capacitor knocked out of place, between the card and the radiator. Fallen capacitors can't just be put back; you need a proper replacement, which in this case would be a 16V, 270 μF hard polymer capacitor, no longer than 3mm.

Since the actual capacitor is not that easy to find in the region, the OP's father came up with a temporary solution instead. His son tells us that, aged 55, Alexander has been working as an electrician and a welder for the past 35 years, so he carries a lifetime of experience with him. Today, he works as a brigadier maintaining power lines in Serbia. His son describes him as a "real family man" who knows how to work on pretty much anything. Apparently, that list includes highly delicate graphics cards as well.

Alexander used a different, cheaper, and larger capacitor to replace its fallen comrade. It sticks out from the card, yet it works. Some people in the comments even said it fits the Gigabyte's variant's futuristic aesthetic, but the capacitor itself isn't suited for long-term usage because of its higher resistance, which would let the clocks run unchecked.

Moreover, the Redditor's father also replaced the old thermal paste with a "special" one that is designed for the high-voltage lines he works on at his job. They replied to a few comments saying the GPU's peak temp during gaming doesn't exceed 80°C. That may sound high, but keep in mind that everyone has different ambient temps. As we mentioned, the new capacitor also has significantly higher resistance than the original one, so perhaps that contributes, too.

Oftentimes, we just have to look inward to find inspiration, and this story is surely serving as bonding material for the Russian father-son duo. OP is still trying to find the right component, so this serves as only a temporary solution to what is a $120 problem otherwise.

AMD continues to squeeze more life out of its AM4 platform as a newly listed prebuilt gaming PC has been spotted powered by the Ryzen 7 4700LE. This OEM-exclusive CPU is based on AMD's Zen 2 (Renoir) architecture, all the way back from 2019, and was silently released by the company back in March 2026. The prebuilt gaming PC featuring the CPU is currently listed by Chinese system integrator Qehi on Amazon with a price tag of $799.99. It additionally comes with an Nvidia RTX 3050 8GB graphics card, 16GB of DDR4 memory, and a 512GB M.2 NVMe SSD in a fish-tank style chassis loaded with six RGB fans.

Glancing over the specifications, the Ryzen 7 4700LE comes with eight cores and 16 threads, along with a maximum boost clock speed of 4.2 GHz. The chip also packs 12MB of total cache and a rated TDP of 65W, meaning that it generates less heat and requires a less demanding cooling solution. This should make it suitable for small form factor builds, although one should note that it does not come with onboard graphics, thus relying on a discrete GPU.

In a similar move, AMD had announced the return of the Ryzen 7 5800X3D last month as a special 10th Anniversary Edition, giving its popular AM4 gaming processor a second lease on life. By doing so, the company not only offered gamers a potent yet affordable CPU amid rising component prices, but it also allowed existing AM4 users to upgrade their CPUs without switching to a whole new platform.

While it won't rival AMD's modern processors, the Ryzen 7 4700LE should still be capable of handling everyday workloads and potentially some modern games when paired with the right GPU. OEMs and system integrators additionally gain benefits by making use of existing AM4 motherboards and DDR4 memory inventory, allowing them to build systems at a much lower cost compared to AM5-based systems. The CPU could also help make entry-level gaming PCs more accessible by giving budget-conscious gamers another option at a time when pricing for components like RAM, SSD, and GPUs continues to rise, thanks to the AI boom.

Intel is working on a version of its Nova Lake-S processor platform codenamed Dunlow that will offer up to 28 cores and will target entry-level server and workstation applications, according to shipment manifests located in the NBD database by @x86deadandback.

Formally, Intel's codenamed Dunlow platform will succeed the company's Catlow platform with Xeon 6300P-series CPUs and will support Xeon E-class Nova Lake-S processors (presumably) with up to 28 cores that feature a dual-channel memory subsystem, come in an LGA1954 form-factor, and have a processor base power of 95W, according to shipments manifests at NBD data.

Intel's next-generation Core Ultra 400-series platforms for desktop computers, codenamed Nova Lake-S, allegedly feature up to 52 cores, which include up to 16 high-performance Coyote Cove cores and up to 32 energy-efficient Arctic Wolf cores in the compute tile, as well as four low-power Arctic Wolf cores presumably in the SoC tile. These Nova Lake-S CPUs are aimed at enthusiasts and reportedly pull up to 474W with a single purpose: to offer unbeatable performance and feature set to put Intel back on the map of enthusiast-grade platforms currently dominated by AMD.

By contrast, the Dunlow platform seems to be a completely different kind of animal. The CPU deliberately features 28 cores and up to 95W PBP (TDP). All Xeon processors except Xeon 6700E, Xeon 6+, and some Atom-based solutions for specialty applications released to date have only featured high-performance cores. Even Intel's Xeon 6300P-series 'Raptor Lake-E' based products feature up to 12 P-cores to offer higher sustained all-core frequencies. Therefore, unless Intel plans to offer energy-efficient cores in its next Xeon CPU aimed at entry-level servers and workstations, we may be dealing with a very special processor that features 28 P-cores that is designed to beat all desktop-grade platforms in demanding applications.

While, for now, 28 P-cores inside Nova Lake-S processors for the Dunlow platform is speculation, it should also be noted that 28 cores do not naturally derive from a 16P+32E desktop design and are impossible to derive from a notebook-grade 8P+16E design. Also, Intel typically does not create server/workstation products by fusing off nearly half a desktop die (it does not even matter whether it disables some P-cores and some E-cores, disabling 20 cores in a 48-core tile hardly makes a lot of sense).

A Nova Lake-S CPU for Dunlow featuring a compute tile with 28 P-cores would resemble the abandoned Raptor Lake-32C, which featured an all-P-core design aimed at workstations and entry servers before being canceled. It is also possible that this could be a derivative of a small Xeon die adapted to an LGA1954 packaging and dual-channel memory to reduce platform costs. At the end of the day, many server applications like storage or web hosting do not need extremely high memory bandwidth, so two DDR5 channels could be enough.

Another reason for Intel to release a Nova Lake-S CPU with up to 28 P-cores is to fill the gap between high-end enthusiast-grade desktops that feature up to 16 P-cores and expensive Xeon 6 server and workstation CPUs that may start at 16 cores, but feature an octa-channel memory subsystem that is costly and is an overkill for many applications. Also note that since Xeon 'Diamond Rapids' processors with an octa-channel memory subsystem have been canceled, the gap between desktop and high-end server CPUs just gets way too wide in 2028, making Nova Lake 28 P-core silicon a potentially viable option.

Nvidia is making a new set of cards, and no, they won't make it among the best graphics cards. The aptly-named GeForce Trading Cards Series 1 are a set of limited edition trading cards that feature graphics cards, games, and tech demos from Nvidia's history, and the company is giving out packs of them for free at upcoming events throughout the summer.

Nvidia shared a short teaser showing off some of the designs, which feature some iconic demos like Nvidia's Chameleon and Medusa demos, along with photos of iconic Nvidia GPUs like the NV 1 and GeForce 3. There are 11 designs in total, including one "checklist card" for keeping track of the cards you've gotten.

The cards feature a black, PCB-like design with a GeForce logo, and the cards are numbered on the front (one card shows 01/11, again pointing to 11 unique designs). On the face of the cards is a border reminiscent of a PCIe connector. Here are all of the designs:

• NV1
• GeForce 256
• GeForce 3
• GeForce 7800 GTX
• GeForce 10 Series
• Bubble, Chameleon, and Medusa demos
• 'The Way It's Meant To Be Played' card
• GeForce RTX 2080 Ti Cyberpunk 2077 Edition

Although there's plenty of money in collectible card games, Nvidia is giving away the GeForce Trading Cards for free. The company says they'll be available at upcoming live events, as well as giveaways throughout the Summer of RTX.

Calling the cards "Series 1" implies Nvidia plans on making more collectible cards in the future, likely as party favors during Summer of RTX, which has become a staple giveaway event over the past several years. There are certainly far more tech demos and GPUs to pull from than what are featured in this short teaser.

Nvidia has yet to update its event calendar on the Summer of RTX page, which is filled with events from the last month, like Computex and Summer Game Fest. Nvidia says it will be giving away packs at Bilibili World, QuakeCon, and Gamescom.

Outside of events, you can keep an eye on the GeForce X account, which has been posting giveaways (amongst plenty of direct GeForce promotions) over the summer. Currently, Nvidia is giving away 10 packs on the GeForce subreddit, as well.

Brown University professor Roberto Serrano suspected that his students were cheating when he gave them a take-home midterm exam, so he decided to make the final exam in-person. According to Inside Higher Ed, out of the 86 students enrolled in his class, 18 dropped from the class after he made the announcement, and nine skipped the final exam. Out of the 59 remaining students, three scored zero, and only two students received a grade that’s within 10% of their midterm score, with only one of them performing better in the finals.

Prof. Serrano, who taught Welfare Economics and Social Choice Theory (Econ 1170), usually conducted in-person exams for his class. However, the mass shooting on university grounds that happened last December made many students anxious about staying in classrooms, so he thought that it was just appropriate to let them take home exams. When news spread that the professor had such an arrangement, enrollment for his class ballooned to 86 students — more than double the usual 30 that he teaches in a particular semester.

The first sign of trouble came when he gave the take-home midterm exams. “Historically the average grade in the midterm of this course has ranged between 65 and 80 [percent], and this exam was harder than the exams I wrote in the past, because … take-home is an opportunity to challenge the class a little bit more, given that you’re giving the students unlimited time,” Serrano said, according to the publication. But this time, his class scored an average of 96%.

While some of the students might argue that he just happened to have a particularly gifted set of students this semester, the professor said that most of the answers were “kind of correct, but very off, and with a very convoluted style.” While they were technically correct, Serrano suspected that they were sourced from AI, especially after he ran the test through ChatGPT and received similar results.

Because of this, he emailed the class telling them about his suspicions — he made the final exam in-person and said that if the distribution is similar to the midterm exams, then he would count it towards their final grade. Otherwise, the midterms are void, and he’ll “reweigh the final accordingly.” But, as the data showed, it seemed that the majority of the class used AI during the midterm exams.

Prof. Serrano raised the issue with the university’s Standing Committee on the Academic Code, but it seemed that it didn’t take action until the story broke. Now, it seems that the university is going to review each case individually. In the meantime, Serrano is worried about the future. “We cannot afford to have a society in which a significant fraction of our best young minds think that cheating is OK,” the professor said to Inside Higher Ed. “That leads to a declining society, to a failed society … We cannot choose to become idiots.”

Nvidia and Sega have scheduled an event next week to celebrate their history and longstanding friendship. The invitation-only shindig takes place at GiGO Akihabara, Tokyo (you can apply via Twitter/X). Nvidia CEO Jensen Huang will star at the July 15 event, officially unveiling the RTX Spark for the first time in Japan. Attendees will also get a chance to win a GeForce RTX 5090 FE in a raffle.

If you will be in Tokyo on July 15, it might be worth pitching for an invite, and if you’re exceptionally lucky, you might visit the event, then go home with one of the best graphics cards available in 2026. The GeForce Japan social media managers are asking for comments that encapsulate 'memories of Nvidia or Sega' with photos, videos, anecdotes,” and so on (machine translation). You have until sometime on July 12 to concoct your invitation pitch. Remember, Japan time is about half a day ahead of the mainland US time zones.

Though it is clearly spelled out what the Nvidia side of the celebration will present on the day (the RTX Spark and a raffle RTX 5090 FE), no such specific teases have come from the Sega camp.

The lack of any teaser might make you think that Sega isn’t going to reveal anything new at the event, or conversely that something big is on the horizon. But if Sega were to pull a hardware surprise out of the bag, it could make quite a splash.

The Japanese gaming icon exited the console race back in 2001, when it ceased production of the Dreamcast. However, it released rehashed mini consoles like the Genesis Mini and Game Gear Micro at the beginning of the 2020s. More recently, some Mini Arcades (like Sonic, OutRun, and Golden Axe) have been released in partnership with MyArcade. It would be great if Sega could do something ambitious again, or even come out with a mini console capable of handling Saturn or Dreamcast titles. With some kind of lightgun support, please.

Nvidia and Sega – an enduring bond

As mentioned in the intro, Nvidia and Sega are old buddies. Nvidia nearly collapsed in 1996, just three years after its founding, and only the belief and generosity of a senior Sega executive at the time saved Nvidia from the graveyard. This is according to Huang’s recollections of a very difficult time for Nvidia, shared in interviews in 2024.

The story goes that Nvidia’s work to design a GPU for a next-gen Sega console fell through largely due to incompatibility with the emerging DirectX API. Sega’s management appreciated the efforts, though, and believed in young Mr. Huang enough to invest $5M in the green team. This investment gave Nvidia the breathing room to pivot from its previous graphics architecture and come out with the DirectX-friendly RIVA line (1997), followed by the unstoppable GeForce series (1999).

AMD is expected to announce its next-gen mobile CPUs at CES 2027, but leaks have already started to pour in, giving us a decent idea of the performance we can expect. Codenamed "Medusa Point," the Red Team's upcoming lineup will likely be based on the Zen 6 microarchitecture, and one of the SKUs has just popped up on Geekbench. It scored much better than the previous leak, beating most of its contemporaries.

The part showed up as "AMD Eng Sample 100-000001713-33_N" and was marked under "AMD Plum-MDS1," which we know is the platform associated with Medusa Point. It's a 10-core (4+6) chip, with 20 threads, clocked at roughly 2.0 GHz, carrying 10MB of L2 cache and 32MB of L3 cache. The L3 cache and clock speeds might be misreported. Currently, AMD only makes two other 10-core mobile parts — Ryzen AI 9 365 and Ryzen AI 9 465, so we're most likely looking at a purported Ryzen AI 9 565 here.

Coming to the scores, the chip netted 3,174 points in the single-core test and 15,092 points in the multi-core test. Both of those numbers are higher than the Strix Point flagship APU, the Ryzen AI 9 HX 370. On average, that SKU sits around 2,600 single-core points, so the Medusa Point score is 22% higher. In multi-core, the AI 9 HX 370 gets 13,400 points, making our main contender 13% faster on average.

It even beats the Strix Halo flagship, the Ryzen AI 9 Max+ 395, by over 400 points in the single-core benchmark, but loses in the multi-core test. Of course, the onboard graphics is no comparison between the two. Compared to a prior leak also showcasing a 10-core Medusa Point APU, this new listing is significantly better. The previous one came in at only 2,300 single-core and 13,002 multi-core points.

It seems like Zen 6 offers a noticeable leap in performance based on architectural improvements, since the core count between the chips we compared is identical. It's too early to judge anything, though, since Medusa Point is months away at this point, and this is just one SKU from the lineup. The top-end parts almost carry a mandate to be faster than their direct predecessor to be even worth releasing; it's the midrange where the real value proposition lies.

Ever since the advent of agentic AI, security researchers have been yelling from the top of their lungs about how it's a bad idea to grant user-level permissions to an LLM — for all purposes, a program with non-deterministic outputs and inconsistent handling of inputs. A research paper on HalluSquatting from researchers at Tel Aviv University, Technion, and Intuit, shows how easily one can fool modern AI bots and harness them into a massive army of AI agents, with the research showing that agents can hallucinate potentially malicious code repositories up to 85% of the time.

The mechanism for HalluSquatting (aka "adversarial hallucination squatting") is surprisingly simple, and takes advantage of the fact that when met with unfamiliar terms, bots will not know they're incorrect and hallucinate a "correct" answer. Adding to that, the methods the bots use to come up with said answer are predictable, for example, owner/repository or toolname/toolname GitHub URLs. This is different than just standard typo-squatting, as it exploits the hallucination mechanism itself.

An attacker first identifies an application, code repository, programming library, or bot skill that's gained popularity only in recent months or years — let's say, a new GitHub repo with the URL OriginalOwner/WindowsTelemetryOff. As the bots' training data is not recent enough to contain information about it, GitHub URLs owner/repo combinations SuperHacker/WindowsTelemetryOff , and WindowsTelemetryOff/WindowsTelemetryOff look just as peachy. Likewise, WindowsTelemetryOf and WindowTelemetryOff (note the typos) will be valid candidates.

The attacker then creates a malicious repository using those generated names. When Claude or another code agent is asked to "run the windowstelemetryoff scripts" or a similar instruction, chances are they'll hallucinate the repo name (sometimes even having run a web search), run into the malicious version that looks like the original, and happily run whatever's in there.

From that point, all bets are off now that the attacker's code is running on the user's machine. The most obvious outcome could be creating a reverse shell (the user's machine opens a command line that's controlled remotely). Now having access to the user's account, the attacker can siphon off their data and passwords, install software, run crypto miners, or harness their AI agent for further malfeasance, all with the power of entire data centers at their disposal.

And here's the kicker: just the one HalluSquatted piece of software has the potential to bait and reel in tens of thousands of bots, if not more, in a proverbial blink of an eye. A crafty attacker would be kind enough to include all the original code in their poisoned version, adding yet another layer of unawareness to the mix.

The research team found that an LLM will hallucinate the location of a recent code repository up to 85% of the time, a figure that can reach 100% for trending agentic skills. Every single model is widely affected, up to and including Anthropic's mighty Claude Opus 4.5. At the application level, the figures are better, but still pretty bad.

The scientists are working on common LLM-backed programming applications, including Cursor, Windsurf, and OpenClaw, among others. In this scenario, the bots stand a better chance given they're working with more context information, but even still, the success rates for hacking ranged from 20%-35% for Cursor, Gemini CLI, and Copilot, and increased massively to close to 80-100% on OpenClaw and its variants. The exploit mechanism doesn't even need to be crafted specifically for any bot; the researchers' results show it's universal and transferable, too.

The mean hallucination rate for names of sample GitHub repositories published in 2025 is 92.4%, while predictably, bots get the URLs wrong 0.9% for those from 2019 or earlier, though that's arguably still a concerning figure. The most effective mitigation is adjusting workflow: instructing bots to always run web searches before installing software, and providing them with additional context. Unfortunately, that's not the default way most people appear to use them.

Cybersecurity professionals have long advocated for not blindly trusting a bot's actions and severely restricting the access level granted to AI agents. And yet it's not uncommon to see bots with wide-ranging permissions over users' machines, API keys, access keys, and service accounts, to name a few — all in a bid to make it "easier" for the bot to vibe-code their pointy-haired-boss' latest brilliant idea.

Flipping the infamous early 1990s anti-piracy campaign messaging on its head, the Future Nostalgia Project is asking retro hoarders to Copy That Floppy! Backed by the Cambridge University Library and supported by the Digital Preservation Coalition, the project went online late last year. The project includes an extensive, indexed how-to guide to preserving data currently on your dusty old floppy collection. It covers a plethora of removable media from 8- and 5.25-inch floppies to the iconic 3.5-inch ‘save icon’ diskettes. I’ve been archiving my own very poorly labeled collection of diskettes before bit rot gets them, and while the necessary hardware remains affordable.

The published guide focuses mostly on saving the material stored on the old removable media. Rewriting the disks to new media and/or accessing the old data that was squirreled within is beyond the scope of the still extensive guide. However, there are links provided to further guides and documentation that cover those subsequent steps.

My 3.5-inch floppy jumble

I originally acquired a good-condition working USB floppy drive from the iMac era to image my collection of 3.5-inch floppies dating back to the 16-bit era. Buying a USB-attached optical drive has already been great for accessing and imaging old CDs and DVDs. However, due to the mix of (poorly labeled) Atari ST, Amiga (OFS, FFS, PFS), PC, Mac, and even Archimedes floppies, I have the USB floppy, which doesn’t cut it. I had to acquire a Greaseweazle because a PC‑compatible USB floppy drive cannot read or write the raw, low‑level disk formats used by Amiga, classic Macintosh, and many other vintage systems.

It’s a bit of a rabbit hole in a minefield, but some vintage used drives you can get via places like eBay are better than others at reading flux transitions (the raw magnetic pulses on the disk) on non-IBM formats. Then, when you image disks, and it isn’t 100% successful, you wonder if your drive is the problem or if it’s the old media…

My first diskette archiving tests immediately hit a speedbump. After a lot of forum reading and investigating, I determined the used 3.5-inch floppy drive I’d sourced to pair with my Greaseweazle had one malfunctioning head. Having the other USB floppy drive allowed me to verify that using a standard PC disk.

My second used floppy drive appears to be OK. I’ve managed to image some Amiga and Atari ST disks and access them, reading files and running programs within the respective emulators. If you don’t know what format the source floppy is, Greaseweazle can handle it by doing a complete flux copy. Then you can look at raw data in tools like HxCFloppyEmulator to understand the original format and make disk images for common emulators. These can be saved to backup disks, as well as the current PC SSD. That’s what I’ve been doing.

I’m also currently digitally archiving compact cassette audio tapes (Yamaha Natural Sound deck), and scanning 35mm film (Canoscan film scanner), among other things, when I’m not writing here. In all these cases, the media is getting so old now that it could be degrading, if not already useless. Moreover, the devices you can wrangle these old formats with are also often nearing the ends of their service lives.

It’s been over 30 years since the cringeworthy Don’t Copy That Floppy campaign hit the airwaves. You can watch the Software Publishers Association-backed video online anytime now, as it's been digitally archived on YouTube. The messaging was clear: copying software results in a loss of income for artists, writers, designers, and programmers, meaning there will be fewer software products in the future.

After announcing it last month, the first AMD EXPO Ultra Low Latency (ULL) memory kits are finally available; and with up to an 80% jump over already inflated RAM prices in tow. HardwareLuxx was able to snag a kit of G.Skill's new Trident Z5 NeoX RGB memory to see how ULL performs, and the results don't quite justify the extra cost. At most, the publication found just a 4% improvement compared to non-ULL kits.

That aligns with AMD's original claims about ULL. When the company announced the initiative last month, it also cited a 4% improvement over standard EXPO. However, AMD claims that ULL offers a 4% improvement on average, while HardwareLuxx only found that large of an improvement in a single game: F1 25.

HardwareLuxx tested a 2 x 16GB kit at 6,000 MT/s with primary timings at 36-36-36-76. Compared to standard EXPO/XMP DIMMs, a lot of the optimization with ULL DIMMs comes from tuning the subtimings. The primary timings are largely the same as what you'll find on a standard EXPO kit, short of tWR (write recovery), which is lower on the EXPO ULL kit. Better binning of the memory ICs allows for more aggressive subtiming optimization, as HardwareLuxx notes, rather than relying on timings primarily concerned with stability.

In games, the ULL kit showed clear performance improvements, no matter how minor they were. In F1 25, the ULL kit outclassed a DDR5-6000 CL26-36-36-96 kit by 4.2%, and beat out JEDEC standards at 5600 MT/s by nearly 14%. Similarly, in Cyberpunk 2077, the ULL kit was around 3.7% faster than the standard EXPO kit, and 12.7% faster than JEDEC standards. The outlet also tested Arc Raiders, Baldur's Gate 3, and Counter-Strike 2; however, the ULL kit didn't offer a meaningful performance improvement in any of these titles.

The outlet also tested 7-Zip, though with only minor differences between ULL and non-ULL memory. The most interesting results are from the microbenchmarks available in AIDA64, which HardwareLuxx also ran. ULL showed largely similar copy and read throughput, but write throughput was 9.4% higher with ULL compared to stock EXPO.

Although there's a performance benefit, it's minor, and HardwareLuxx notes that "manual tuning still allows for the maximum possible optimization."

The particular kit that HardwareLuxx tested doesn't have the extreme ULL price increases we've seen elsewhere. It's currently available for sale for $530, which is only $20 more than a kit of G.Skill's Trident Z5 Neo RGB memory at DDR5-6000 CL36. It's actually gone down in price (it was originally listed at $550), while kits with more aggressive timings have increased in price.

The NeoX DDR5-6000 CL26 kit, for example, has jumped up $50 to $1,150 — yes, that's for a 2 x 16 GB kit still — while the CL28 kit has jumped up to $1,030 (a $30 price increase). Two weeks ago, we saw non-ULL kits selling at $560 and $700 for CL28 and CL26, respectively, creating a large delta in price between ULL and non-ULL kits. Now, those kits are selling for $700 and $900, respectively.

The introduction of ULL couldn't have come at a worse time, as the ongoing DRAM shortage continues to raise the cost of building a PC around the world. Adding a premium on top of those already inflated prices is tough to justify, even if that premium is modest — especially for mainstream CL36 and CL30 kits, the "ULL tax" is essentially null. The good news is that you can largely achieve what ULL offers on your own, at least given that you have the patience to sit through tuning your memory for single-digit gains.

Global data center electricity consumption will grow 26% in 2026 to reach 565 terawatt-hours (TWh), up from 447 TWh in 2025, according to a recent Gartner forecast that names power availability as a binding constraint on AI expansion. Worldwide power demand is set to rise 27% to 132 GW over the same period, up from 104 GW in 2025, with consumption projected to exceed 1,200 TWh by 2030. The gigawatt figure measures peak capacity that has yet to be built, permitted, and connected, while the terawatt-hour figure measures the electricity actually drawn over the year. Both, however, are climbing faster than utilities can add supply.

"Surging demand for compute-intensive AI workloads is driving unprecedented data center power growth, while AI capacity is now constrained by power availability, making data center power security the new battle ground for scaling and protecting margins in the global AI race," said Gartner's Direct Analyst Linglan Wang.

AI-optimized servers consumed about 95 TWh worldwide in 2025 and will draw 175 TWh in 2026, an increase of roughly 84%. Gartner expects that figure to reach 258 TWh in 2027, the point at which AI-optimized hardware will consume more electricity than conventional servers for the first time. By 2030, AI-optimized servers are forecast to account for close to half of all data center power consumption.

Conventional servers are effectively flat by comparison. They grew less than 1% in 2025 and are projected to rise 1.2% in 2026 to around 195 TWh, reaching 200 TWh in 2027. Gartner estimates AI-optimized servers will make up 31% of total data center power consumption in 2026, up from roughly 20% a year earlier. Cooling, of course, represents a growing share of the total, with electricity used by cooling systems forecast to climb 22.6% in 2026 to 195 TWh, reflecting the thermal load of denser AI racks and continued capacity expansion.

The U.S. accounts for about 204 TWh of the 565 TWh total in 2026, or 36% of worldwide consumption. Of that U.S. figure, dedicated AI data centers consume roughly 68 TWh, or one-third of the national total, while non-AI data center demand in the country has grown only marginally over the same period.

Regional grids are already feeling the strain, and more than 75 data center projects worth $130 billion were blocked in the first months of 2026 amid opposition over power and water costs, while some operators have turned to on-site gas generators to bring capacity online without waiting for grid connections. In Virginia, one county asked employees to conserve power as data center demand pushed utility rates higher.

In its report, Garner warns that grid supply will be insufficient to meet demand once consumption passes 1,200 TWh by 2030, a shortfall that will affect all data center users, not just AI operators. The forecast accounts for parts and supply shortages, delayed or cancelled projects, and geopolitical disruption, including conflict involving Iran. Wang said infrastructure and operations leaders should prioritize efficiency upgrades, secure grid access, and invest in high-efficiency cooling and edge computing to manage the constraint.

Hyperscalers have moved in the same direction, with Meta having signed deals for more than 6GW of nuclear power to supply its upcoming data centers, and one firm repurposing retired U.S. Navy reactors for an AI site in Tennessee. Those projects will take years to deliver, with recommissioned nuclear plants and the earliest small modular reactors not expected online until 2028 or later, leaving power availability as a near-term limitation on the seemingly unstoppable AI build-out.

While most of the Western world has been grappling with publishers and big tech companies about digital ownership, a Redditor who claims to be married to a Chinese lawyer and certified Chinese-English translator said that multiple Chinese families have successfully sued “for the right to inherit their deceased relatives’ game accounts.” u/Slawrfp shared summaries of three rulings favoring a gamer’s estate with regards to digital ownership on a subreddit. These cases go beyond game ownership, too, as they also tackled digital assets, in-game purchases, Bitcoin, and even social media accounts.

Chinese gamers have successfully managed to sue for the right to inherit their deceased relatives’ game accounts from r/pcmasterrace

“Chinese courts view game accounts and microtransaction purchases as something of monetary value, and therefore gamers have rights related to those assets,” u/Slawrfp wrote. “Chinese courts reject the idea that standard non-transferability clauses can stop you from inheriting or bequeathing a game or even individual microtransactions (of the same nature as CS:GO knives or skins in other games) and have made this ruling in multiple cases.”

u/Slawrfp cited several cases — the first one is called “the Golden Blade case," which arose out of a dispute between two parties in 2009. The issue started when the wife (Li Lan) of a deceased gamer (Lu) wanted to sell the “Golden Blade” he acquired in the game Zhengtu, a now-defunct MMORPG. However, Lu required the cooperation of his “in-game wife,” Yang Yuan, to get the item, and therefore argued that she should get ownership.

In the end, the court ruled that since Lu put in the effort, paid for internet access, loaded up with in-game credits, and that buyers were willing to acquire the item for around RMB 50,000 (around $7,350 at the current exchange rate), then it had the attributes of property and could be inherited by his legal wife. Aside from that, DeHeng Law Offices [machine translated] said that the “in-game marriage” between Lu and Yang had no legal bearing, so Li Lan stands as the inheritor of Lu’s properties. But because Yang spent a similar effort in helping Lu to acquire the artifact, its ownership belongs to both, so both Li Lan and Yang Yuan are entitled to 50% each of the asset’s price.

Another case in 2024 tackled a deceased user’s Bitcoin holdings, a gaming account worth nearly $30,000 (RMB 200,000), and a social media account. According to Chinese lawyer Wang Lianghua on the Chinese social media platform Toutiao [machine translated], the inheritor’s lawyer argued that virtual property has attributes of legal property because it could be traded, has value, and could even generate profits, which meets the “scarcity, disposal, and value” definitions of property. On the other hand, the platforms holding these digital assets argued that ownership belongs to them based on the agreements that the user accepted when signing up for the account.

The court judged that virtual assets, including Bitcoin, game equipment, social media commercial rights, and domain names, among others, are included in the deceased’s estate and are inheritable, and that operation of social media accounts can also be passed on to the heirs. However, private content, such as chat records and other “purely personal interests,” cannot be passed on and are instead archived by their respective platforms. Lastly, the “inheritance prohibition” included in most license agreements is invalid as they violate statutory rights — platforms are required to assist with inheritance requests and could ask for supporting documentation as well as charge reasonable costs.

Aside from these cases, there was another one where a mother lost her son and asked a gaming platform to give her access to his accounts. The court ruled similarly as the previous case, saying that the gamer’s accounts, character data, virtual items, and other assets are virtual property, and thus, inheritable. The company was then obligated to cooperate with the mother and transfer all inheritable rights to her.

These court cases offer a stark contrast in most of the rest of the world, where publishers could cut you off from your media library the moment their licensing contracts expire. The Steam subscriber agreement also prohibits the transfer of a Steam account — and with U.S. courts counting games as digital licenses, then Valve cannot be compelled to pass them on to the user’s heirs. Digital rights are a hot topic among gamers and consumers, especially as many big tech companies transition from selling physical copies of games to going all digital, and preservationists fight to keep game archives alive.

China’s National Vulnerability Database (NVDB) said in a statement that Claude Code, Anthropic’s popular AI coding tool, contains “security backdoor vulnerabilities,” and warned users to either uninstall it or update to its latest version. According to the Wall Street Journal, versions of the tool released between April and June 2026 “can send sensitive information such as user location and identity to remote servers without the user’s consent due to a built-in monitoring mechanism.” It should be noted, though, that the Chinese government released this guidance even though the AI tool isn’t approved for public use in China. Anthropic has also restricted the use of its AI tools in the region due to national security risks.

It seems that this directive stems from the revelation by developer Troye Sivan that Claude Code is covertly sending information like time zone and domains, targeting Chinese users. Anthropic engineer Thariq Shihipar confirmed on X that it was an experiment the company launched in June “to prevent account abuse from unauthorized resellers and protect against distillation.” He also added that “this should be fully rolled back in tomorrow’s release.”

Anthropic has already accused Chinese AI labs of distilling Claude twice — it said earlier this year that DeepSeek, alongside other Chinese developers, created 24,000 fraudulent accounts to train smaller models. It once again claimed in late June that Claude was distilled, this time by Alibaba. There have also been several reports that Claude API access is being resold in the grey market at 90% off through proxy networks.

It seems that Anthropic’s experiment has already concluded and that its tracking functions will no longer be hidden and will be baked directly into Claude Code, based on Shihipar’s statement. This is probably why the Chinese cybersecurity agency recommended that users update their Claude Code apps to the latest version. However, this is still a curious guidance — even though Claude Code is not directly banned in China, the government still requires all AI LLMs to undergo review, which Anthropic’s AI models did not go through.

Still, despite the dual bans, Chinese developers are finding ways to access Claude Code. More than that, Beijing is seemingly acknowledging this fact with its directive, telling people who use the AI tool to update their apps.

The CERT Coordination Center (CERT/CC), a U.S. government-backed cybersecurity group at Carnegie Mellon University's Software Engineering Institute, disclosed a firmware flaw on July 6 that can hand attackers full administrative control over several Tenda networking devices. The vulnerability, tracked as CVE-2026-11405, is an undocumented authentication backdoor in the affected models' firmware that bypasses the normal login process and grants access to the devices' web management interface without valid credentials. Compounding the risk, there is currently no security patch available, as Tenda — a Shenzhen-based budget networking brand with a large presence in India and other markets — is yet to respond despite CERT/CC reaching out on the issue.

CERT/CC lists five affected firmware versions spanning the FH1201, W15E, AC10, AC5, and AC6 router families. The advisory, which credits an anonymous researcher for the finding, does not describe this list as exhaustive. The list covers only the specific builds the researcher reported to CERT/CC, as there is no vendor-confirmed scope. According to the advisory, the flaw resides inside the routers' built-in web server, where an undocumented authentication routine allows administrative access without requiring the configured administrator credentials.

Like most consumer routers, Tenda devices provide a password-protected web management interface for configuring Wi-Fi settings, firewall rules, DNS servers, firmware updates, port forwarding, parental controls, and other core networking features. Because these interfaces control most aspects of a router's operation, they are typically protected by authentication mechanisms designed to prevent unauthorized users from making changes that could compromise an entire home or business network.

According to the advisory, the affected firmware initially performs authentication as expected, verifying the administrator password with a standard MD5-based check. However, when that verification fails, the login routine quietly follows a second, undocumented code path. Instead of immediately rejecting the login attempt, the firmware retrieves another password stored internally under the configuration key sys.rzadmin.password and compares it directly against the user-supplied password using the standard C library function strcmp().

If the supplied password matches this hidden value, the firmware immediately creates a valid administrator session with full privileges. Even more concerning, the associated username is never validated, meaning any username can be used as long as the hidden password is supplied. As a result, the mechanism effectively bypasses the router's configured administrator account altogether.

While CERT/CC did not disclose the hidden password itself, the existence of an undocumented secondary authentication path significantly weakens the security model of affected devices. Unlike conventional authentication vulnerabilities that stem from implementation errors, this is a separate login path rather than a flaw in the existing one, granting administrative access through credentials that are neither documented nor exposed through the router's management interface. Whether that path was placed there deliberately or left in as a forgotten development feature is unclear. CERT/CC draws no conclusion on intent, and Tenda's silence settles nothing.

Successful exploitation grants an attacker unrestricted control over the router's configuration. With administrator access, an attacker could modify network settings, change DNS servers to redirect internet traffic, disable security protections, replace administrator credentials, or enable additional remote access features. As routers serve as the gateway between local devices and the internet, compromising one can expose every connected system on the network to further attacks.

Pending official Tenda firmware updates, CERT/CC recommends disabling remote web management wherever possible to prevent attackers from reaching the administrative interface over the internet. The organization also advises limiting local network exposure, noting that while changing a router's default LAN IP address may reduce opportunistic discovery by automated scanning tools, it does not protect against determined attackers performing targeted network reconnaissance.

The disclosure echoes the concerns the Federal Communications Commission (FCC) cited when it added certain foreign-made networking products to its Covered List in March, preventing new models from receiving the authorization required for import and sale in the U.S. The FCC argued that compromised consumer routers can provide attackers with a foothold into home and small-business networks. An undocumented administrator backdoor in widely sold networking equipment — combined with the absence of a vendor patch or response — illustrates the type of supply-chain security risk regulators seek to address.

After ravaging the PC market for both DIY builders and OEM buyers, wrecking the game console ecosystem, and savaging the enterprise server landscape, the global memory shortage is officially claiming its next victim: the budget smartphone. According to new market analysis from tech research firm Omdia, the smartphone market, particularly the entry-level market, is on the brink of a massive contraction. Omdia projects that global shipments of smartphones priced below $400 will plummet by over 22% this year, dragging the entire global smartphone market down by 12% year-over-year. The culprit? Skyrocketing contract prices for DRAM and NAND flash memory, which have turned the razor-thin margins of budget phone manufacturing into an impossible financial math problem, especially given that memory alone now comprises up to 64% of the total cost of lower-tier smartphones.

To understand why cheap phones are vanishing, you have to look at the Bill of Materials (BOM). That's the raw physical cost to manufacture a device. In the tech industry, this is governed by the "cost floor." Even if a manufacturer puts a low-capacity memory chip into a phone, the baseline cost to produce, test, and package that silicon has skyrocketed over the past four quarters because memory giants like SK hynix, Samsung, and Micron have aggressively redirected their manufacturing wafer starts away from standard commodity memory and toward High Bandwidth Memory (HBM) to feed the insatiable, high-margin demand of AI data centers. Commodity smartphone memory is effectively being starved out of existence.

Omdia's latest Quarterly Smartphone Technology Trends report reveals just how destructive this conversion has been to phone BOMs. Between Q3 2025 and Q1 2026, the share of manufacturing costs dedicated to memory nearly doubled for sub-$400 devices, where memory chips now account for nearly 60% of the total physical manufacturing cost. In the sub-$99 ultra-budget phones, memory has apparently breached a staggering 64% of the entire BOM budget. When two-thirds of a budget phone's manufacturing cost is tied up in RAM and storage chips, there is simply no money left to pay for the processor, screen, battery, camera sensors, or chassis.

In normal market cycles, handset makers offset expensive components by trimming costs elsewhere, but entry-level devices are already stripped to the bone. Budget champions, including Chinese value brands like Xiaomi (Redmi/POCO), OPPO, Vivo, and Transsion (Tecno and Infinix), have zero structural wiggle room left. As Omdia principal analyst Zaker Li notes, manufacturers are being forced to significantly raise retail prices on low-end models just to maintain microscopic profit margins.

The problem is, entry-level consumers are notoriously price-sensitive; when a $150 phone suddenly costs $220, demand evaporates. Facing unviable economics and weakening buyer demand, smartphone vendors are quietly initiating a tactical retreat from the bottom of the market, scaling back or entirely abandoning low-end handsets to focus on more lucrative price brackets.

Now, while the sub-$400 market collapses, Omdia predicts that smartphones priced above $400 will actually prove resilient, growing by 5.7% this year. However, surviving in this higher bracket requires intense component gymnastics. To keep devices like mid-range "flagship killers" affordable without taking a massive hit on memory costs, manufacturers are quietly downgrading other hardware. Chinese vendors are stepping back from advanced LTPO OLED screens in favor of older LTPS OLED panels on sub-premium models, scraping together $3 to $5 in savings per unit. Because the SoC remains the single largest cost expense in phones over $600, builders are reusing previous-generation processors to slash chip costs by 30% to 40%. Finally, Omdia says to expect mid-range phones to drop redundant macro or ultra-wide lenses entirely, or potentially to revert to smaller image sensors.

True top-tier flagships like the iPhone 17 Pro or Galaxy S26 Ultra are mechanically immune to these compromises. Because their total BOM includes expensive titanium frames, custom silicon, and periscope cameras, memory makes up a much smaller percentage of their overall build cost. However, they aren't immune to the broader economics: premium buyers are simply being handed the bill directly. With memory costs up sharply across the board, industry-wide retail price hikes on high-end hardware are already becoming the new normal.

If you're waiting for phone prices to drop back to Earth, you'll need to be patient. There is relief on the horizon, but it won't arrive in time to save this year's buying cycle. Recognizing that the memory bottleneck is now a threat to the broader tech economy, memory vendors and government regulators are throwing unprecedented billions at the problem. In a historic public-private initiative, the South Korean government recently unveiled an $870 billion (1,350 trillion won) 10-year investment framework with Samsung and SK hynix. The aggressive plan includes breaking ground on multiple mega-fabs in Yongin and Cheongju, with the explicit government-mandated goal of doubling national memory output within five years. Meanwhile, SK hynix is fast-tracking advanced packaging and NAND facilities, and Micron is heavily building out its leading-edge DRAM campuses in the U.S. and Japan.

The problem is, semiconductor fabrication plants take years to build, equip, and scale. Most analysts agree that meaningful, high-volume memory relief won't realistically hit consumer supply chains until mid-2027 at the earliest, with full normalization stretching into 2028 or later. Until we see a major market realignment (or failing that, until those mega-fabs come online), the RAMaggedon will continue to dictate what handsets you can buy in the smartphone aisle.

JEDEC has released its new specification that aims to push down the pricing of the ultra-expensive HBM that powers the fastest AI processors. While the new standard will not help relieve the DRAM shortage as it uses large HBM4 DRAM devices, it can make high-bandwidth memory a bit cheaper as it enables attaching SPHBM4 memory stacks without advanced packaging and using inexpensive organic substrates.

The standard's body published the specification of SPHBM4, Standard Package High Bandwidth Memory (JESD330-4), that combines HBM4 DRAM ICs with standard packaging and a fast 'narrow' 512-bit interface. Here are the details.

HBM4 performance with a 512-bit wide interface

Although 1024-bit and 2048-bit interfaces used by HBM3 and HBM4 memory deliver unbeatable performance, their wide interfaces consume significant silicon area inside processors, they require expensive interposers, and advanced packaging technologies with limited capacity, such as TSMC’s CoWoS, for integration with host processors. The upcoming SPHBM4 memory continues to use the same HBM4 DRAM stacks as JESD270-4, but swaps the conventional HBM base die for a new SPHBM4 PHY/buffer die featuring a narrower 512-bit interface that enables mounting on standard organic substrates without using sophisticated packaging methods for integration. To offset the effect of the narrower interface, SPHBM4 supports considerably higher data transfer rates ranging from 22.4 GT/s to 46.0 GT/s.

Instead of connecting to the host processor using a 2048-bit memory interface like HBM4, SPHBM4 uses 32 independent 16-bit DDR channels organized into eight Quad Channels. Since 'Quad Channel' is a new term, let us explain how things work. Internally, an HBM4 stack contains 32 memory channels, each 64 bits wide, for a total external interface width of 2048 bits. SPHBM4 needs to 'convert' the 2048-bit internal I/O onto a 512-bit external interface, which is why it groups every four HBM4 channels into a Quad Channel. As a result, externally, a Quad Channel exposes 64 data pins (4 × 16 bits), which replace the 256 data pins (4 × 64 bits) that those four HBM4 channels would normally require. To preserve bandwidth, these 64 pins operate at four times the data rate of the original HBM4 interface.

While SPHBM4 dramatically increases I/O bandwidth, it does not make the DRAM array itself faster. The HBM4 memory core retains the same fundamental architecture and timings, including core frequency, row activation, precharge, and refresh operations, though the additional PHY is expected to introduce some latency. For example, the DRAM core runs at only one-quarter of the external interface frequency, which means 2 GHz in the case of SPHBM4 with a 32 GT/s speed bin.

The major change is the new base die, which implements a high-speed SerDes-like PHY that maps each 16-bit external channel to four conventional 64-bit HBM4 channels. As a result, SPHBM4 introduces equalization, lane training, BER requirements, and other high-speed signaling features that are unnecessary in HBM4’s slower, wide parallel interface. To support transfer rates of up to 46.0 GT/s/s per pin, each Quad Channel uses a shared command/address interface protected by forward error correction (FEC), while data transfers rely on dedicated differential write (WCK) and read (RCK) clocks, as well as ECC and error-reporting signals.

When it comes to capacity, SPHBM4 can use stacks containing 4, 8, 12, or 16 DRAM dies featuring 24 Gb or 32 Gb densities, so the largest standardized SPHBM4 configuration is a 64 GB memory stack built from sixteen 32 Gb DRAM dies, identical to the maximum capacity supported by HBM4E.

Cheap HBM at last?

The standard supports bump pitches greater than 90 µm and channel reaches up to 20 mm, which are two features that enable dropping the expensive interposer and using less-expensive organic substrate routing. However, getting rid of the interposer and CoWoS (or similar) packaging does not automatically make SPHBM4 inexpensive. SPHBM4 still requires massive HBM4 DRAM ICs, 2.5D packaging, a complex base die (which is likely costlier than the one used by conventional HBM4), and advanced package assembly with through-silicon vias. In addition, SPHBM4's narrow interface consumes significantly less die perimeter and silicon area inside processors, which makes it more attractive to companies that strive to install more compute capability and/or intend to install more memory stacks around their processors. However, we are still talking about a niche high-performance memory technology that will address select applications and will barely rival HBM4 directly.

When it comes to maximum performance, HBM4 moves the data at 8 GT/s (though most controllers and chips support higher data rates), so one HBM4 stack can offer bandwidth of 2 TB/s. HBM4E is set to up data transfer rate to 12 – 12.8 GT/s, therefore increasing peak bandwidth to 3 – 3.3 TB/s per stack. By contrast, one SPHBM4 with a 46 GT/s interface can hit 2.944 TB/s, though do not expect the initial versions of SPHBM4 to hit the maximum speed. Therefore, it is likely that HBM4, HBM4E, and C-HBM4E will maintain a performance lead in terms of bandwidth over SPHBM4 in the foreseeable future.

HBM4 latency will still probably have an edge over SPHBM4. HBM4 essentially connects to its host processor almost directly through a very simple interface. By contrast, SPHBM4 inserts a much more sophisticated PHY that performs serialization/deserialization, lane training, FEC handling, and other operations that can add a few nanoseconds of latency. This may not be a big problem for some applications, but inference benefits a lot from low latencies.

When it comes to power and voltages, HBM4 and SPHBM4 share the same DRAM core voltage because SPHBM4 reuses standard HBM4 DRAM stacks. However, I/O is different: HBM4 leaves the interface voltage up to memory vendors and allows implementations at 0.7V, 0.75V, 0.8V, or 0.9V, depending on the desired balance between power, speed, and signal integrity. By contrast, SPHBM4 standardizes the external I/O at 0.75V.

Also, HBM4 moves data over a very wide interface with many slow parallel links that tend to be very energy efficient. By contrast, SPHBM4 moves the same amount of data through one-quarter as many wires, which run roughly four times faster. High-speed data transfer tends to be less energy efficient than 'slow' data transfers over a wide interface. Keeping in mind SPHBM4's rather sophisticated PHY that converts a wide interface into a narrow interface, which is likely a power-hungry process. Nonetheless, the 4X lower number of drivers and receivers could tangibly reduce the power consumption of SPHBM4. That said, without implementation details from DRAM makers or a processor developer, it is impossible to conclude which memory type has lower power consumption.

Last but not least, SPHBM4 essentially trades manufacturing challenges that arise from using silicon interposers for an engineering challenge of developing an extremely sophisticated base die/PHY. Developing and manufacturing such a base die should not be a problem for foundries. However, it remains to be seen whether DRAM makers can design and produce SPHBM4 with decent power efficiency. After all, both Micron and SK hynix work with TSMC to build C-HBM4E and HBM4E base dies, whereas Samsung's memory division uses base dies produced by Samsung Foundry.

China factor

One interesting aspect of SPHBM4 is whether Chinese developers of AI accelerators can benefit from this technology. In theory, Chinese developers like Biren, Huawei, Moore Threads, and other blacklisted companies that cannot use TSMC's chip manufacturing or packaging services could become one of the biggest beneficiaries of SPHBM4, perhaps even more so than the U.S.

First up, a smaller shoreline directly benefits chips that are made using trailing nodes, as it enables packing more compute capability into them without sacrificing memory bandwidth or capacity. Secondly, Chinese OSATs currently do not offer CoWoS-like technologies, so eliminating the interposer and using advanced organic substrates is a benefit.

However, SPHBM4 still requires HBM4 DRAM stacks, and today, Samsung, SK hynix, and Micron are the only companies capable of producing them, while China-based CXMT can barely make HBM2E. Furthermore, building a 46 GT/s PHY is very hard and will likely be challenging for Chinese IC developers.

Nonetheless, assembling SPHBM4 packages on organic substrates is arguably more aligned with China's existing manufacturing base, so if local DRAM makers eventually develop competitive HBM4-class memory, SPHBM4 could substantially reduce one of the country's remaining infrastructure gaps.

Summary

JEDEC's SPHBM4 looks like a promising standard that can potentially address a broader range of applications than HBM4 itself due to lower integration cost. Still, HBM4, HBM4E, and C-HBM4E will maintain performance leadership, which will make them a preferable choice for flagship AI accelerators in the coming years.

The Wi-Fi router market is facing headwinds as consumers pull back on spending. According to a new report from Counterpoint, we’re witnessing a softening in global consumer Wi-Fi router shipments, with a 6 percent YoY decline in Q1 2026. This decline follows an explosion of market growth during the COVID-19 pandemic, when consumers upgraded their Wi-Fi hardware to enhance their work-from-home capabilities.

Counterpoint notes that global Wi-Fi router shipments peaked in 2021, which was at the height of consumer hardware spending during the pandemic. There were some positive points in the report, with Asus and Google seeing global shipment increases of 3.8 percent and 1.2 percent, respectively, during Q1 2026. However, Xiaomi had a 1.3 percent shortfall, Netgear was down 3 percent, while TP-Link fell by 5.4 percent. Counterpoint also notes that “Others,” which includes dozens of other hardware vendors whose sales aren’t significant enough to be broken out individually, fell by 10.4 percent.

Since 2021, global shipments have declined by almost 34 percent, and a couple of factors explain this turn of events. For starters, many people who upgraded their Wi-Fi hardware in 2021 or 2022 simply see no reason to shift to newer technology. Even though the best Wi-Fi routers use the Wi-Fi 7 (802.11be) standard, offering multi-gig speeds across the 6 GHz and 5 GHz bands, those performance benefits are not enticing consumers on the sidelines because of rising costs for more essential goods.

Another reason global shipments of consumer routers have seen a steady decline is that ISPs have become more adept at bundling higher-end networking hardware with their services. Whether you’re signing up for new fiber, cable, or 5G home internet service, ISPs are including routers with integrated Wi-Fi 6, 6E, or 7 wireless connectivity. For customers with non-demanding network needs, this ISP-provided hardware is sufficient. For example, T-Mobile provides a Wi-Fi 7 gateway with its $60/month 5G home internet plan and a Wi-Fi 7 gateway plus a mesh extender with its $70/month plan.

Speaking of mesh systems, this is one of the few bright points for hardware vendors. Counterpoint notes that mesh Wi-Fi systems have seen significant growth as consumers seek to blanket every area of their homes with wireless coverage to support a substantial number of connected devices. Amazon’s Eero and Google’s Nest mesh Wi-Fi router systems were called out specifically for their strong performance (driven in part by high brand recognition and heavy sales promotions). The gaming router segment also bucked the decline in the broader Wi-Fi router market, as online gaming enthusiasts seek a competitive edge with lower latency and higher available network bandwidth.

There’s a possibility we could see a rebound in sales in the second half of 2026 and into early 2027 as the first Wi-Fi 8 hardware enters the market. However, Wi-Fi 8 is seen as more of a quality-of-life upgrade than another leap in performance over previous Wi-Fi generations.

Portland General Electric (PGE), Oregon’s largest electricity supplier, will increase its rate for large power consumers by 29.7%. Oregon Public Broadcasting (OPB) reports that the state’s Public Utility Commission (PUC) unanimously approved the increase, which will primarily affect large industries, data centers, and cryptocurrency mining operations. Meanwhile, costs for residential users will decline. The higher rate class, which was created last year under the state’s POWER Act, will be applied to developments that use more than 20 MW of power, which is about what a large paper mill consumes, and is way lower than the target capacity of some of the largest data centers.

“These changes ensure that costs created by data centers in PGE’s territory are more accurately reflected in their rates,” PUC Chair Letha Tawney said in a statement. “By putting this structure in place now, we are getting ahead of a bigger issue, enabling responsible data centers to pay their own way, and protecting customers from higher costs in the future.” Oregon Governor Tina Kotek called this move “a win for Oregonians.” “The POWER Act was intended to ensure fairness and accountability when large energy users, like data centers, take up more load on Oregon’s electrical grid,” Kotek said. “We must continue to do whatever we can to keep working families and small businesses from absorbing the costs of data center energy use.”

This is the first piece of good news to come out of electricity and data centers for residents, at least for the state of Oregon. Opposition against data centers has steadily been increasing, especially in the last few months, with more than 70% of Americans pushing back against data center developments near their communities. This is primarily driven by the massive power consumption that these projects require, leading to unprecedented price hikes in the regions they’re located in. This increase in utility costs isn’t just caused by the massive amount of electricity that data centers use, but also by the huge investments that utility companies must make to upgrade their capacity to account for this increased use.

By forcing large customers to pay for these upgrades through increased rates, ordinary consumers won’t have to face higher energy bills. President Donald Trump has previously summoned AI tech giants to the White House and made them promise to “pay their own way” through the “ratepayer protection plan.” However, some experts were skeptical about this move, as it doesn’t have any teeth and cannot be legally enforced.

On the other hand, Oregon’s POWER Act (HB 3546), which the state passed in April 2025, codified this into law. “HB 3546 is a simple and straightforward bill to ensure that large energy users served by investor-owned utilities pay their own way. We aren’t asking them to subsidize other users, and we aren’t challenging the tax benefits that are often associated with development. We just want their bills to reflect the true costs of their electric service,” State Representative Pam Marsh, D-Ore. (HD-5) said when it passed.

We have yet to see if other states will follow and pass similar laws that will reduce the burden on the general consumer. While this move might feel counterintuitive for data centers, as they will end up paying more in electricity costs in the long run, this would help ease the public opposition against their developments. By ensuring that the general consumer is protected from unwarranted price increases, they might be more receptive to having data center developments built near their homes.

A software house (if you can call it that) known as 'Slopfix' has launched a fixed-price service that refactors AI-generated codebases, charging $10,000 for one week of work and getting paid according to how much code it deletes. Its three engineers agree to a line-reduction target before starting, with a stated example of whittling a 100,000-line project down to 35,000 while maintaining the same functionality. The best part? Slopfix uses AI coding agents itself to do the trimming.

According to its website, Slopfix analyzes its clients' repos for free and walks away if it decides it can't make a dent. When it does take a job, the first step is a written inventory of what the application does, screen by screen and endpoint by endpoint, effectively doubling as a regression checklist before any changes are made. Clients keep the slimmed-down codebase, that checklist, and a set of guardrails meant to slow future bloat, including a CLAUDE.md instruction file, lint rules, and CI checks. A two-week warranty covers any issues that arise from a previously working component.

The company's founder, who posts on Hacker News as 'zie1ony,' wrote in the launch thread that Slopfix commits to a reduction target and the client pays in proportion to how much of it the team hits, adding that "we get paid to delete code." The engineers lean on coding agents to find and collapse redundancy, describing the tools as a power source kept "on a very short leash" rather than the thing making the calls.

Duplicated code blocks are now appearing at the highest rate code-analytics firm GitClear has recorded across 623 million changes, up 81% since 2023, per the company's 2026 Maintainability Gap report. Refactoring has cratered over the same window, making up 21% of changed lines in 2022 and sits below 4% so far in 2026. Developers are now roughly five times more likely to copy and paste than to refactor, a reversal from 2022.

With AI-generated “vibe-coded” code, issues tend to start showing up several months into a project once agents stop holding the whole context of the codebase in their immediate memory and begin reinventing logic. It's the same failure mode behind the vibe-coded OS that scored five out of nine on a basic functionality test earlier this year, and the unsupervised setup that let a coding agent wipe a company's production database in seconds.

Slopfix's business model isn't anything new. Decades ago, consultancies built businesses untangling offshore-outsourced code, then cloud migrations, then crypto integrations. AI-generated code is just the latest iteration of that, but it's accumulating faster than any of those, meaning Slopfix can charge a serious premium for its services. That said, it simply undoes agentic output with the same class of agent that produced it in the first place, and anyone who has spent any time on the Internet recently will immediately flag the marketing copy on its own landing page as the type of AI slop it promises to clear out — naturally.

Smart pet technology firm Fi has launched the Fi Ultra Dog Tracker today. This new wearable device is claimed to be “the world’s first consumer wearable powered by T-Satellite with Starlink.” There seem to be a few qualifications in that statement, but they should not be necessary, as, according to our searches, this is indeed the first dog tracking wearable with Starlink integration. To be clear, the dog wears the Fi Ultra, not the owner.

Getting a collar-worn device for your faithful friend, integrating T-Satellite with Starlink, could deliver an important additional layer of security for dog owners. Previous products available in the pet tracker market could be of limited value in areas with spotty or absent LTE or GPS coverage. Satellite-grade dog tracking may therefore be a boon to adventurous dogs and owners who live and explore beyond the reach of traditional networks.

"Fi Ultra has transformed what's possible for dog owners," said Jonathan Bensamoun, co-founder and CEO of Fi. "Our mission has always been to strengthen the human-animal connection via data, to give dogs more freedom while keeping them safe, and with the power of T-Satellite with Starlink behind Fi Ultra, that mission now extends to every corner of the country and soon, every corner of the world."

Fi Ultra also features automatic switching between LTE and satellite coverage for continuous location tracking in remote areas. This new tracker can work in concert with the previously launched Fi Series 3+ and Fi Mini dog tracker devices.

Now, to what some will feel is a drawback, Fi Ultra is bundled with a subscription service. This might be inevitable due to the use of partner satellite and cellular connectivity, though. The scale of the fees is said to be $199 plus a $189 per year membership for new customers. Established Fi tracker customers can buy in for a flat $299 fee. The bottom line is, with a tracker like this, your dog should never have to face the perilous journey dramatized in Lassie Come Home.

Game anti-tamper app Denuvo has been completely bypassed in pre-release versions of Assassin’s Creed Black Flag Resynced, allowing pirates to distribute copies of the game days before its official release. A cracked version of the remake has been circulating since June 7 — more than a month before its July 9, 2026, release date. While the game is a remake of the original Assassin’s Creed Black Flag, which launched way back in 2013, it’s still expected to offer new content and enhanced graphics brought by newer, more capable hardware.

This isn’t the first major title to be hit by a leak before its official release day this year. Forza Horizon 6 leaked four days before early access and more than a week before its general launch date of May 19. LEGO Batman: Legacy of the Dark Knight and Subnautica 2 also suffered similar leaks, with playable versions of the games circulating online even before early access was opened to players. While Forza Horizon 6 and Subnautica 2 aren’t protected by Denuvo, LEGO Batman: Legacy of the Dark Knight and Assassin’s Creed Black Flag Resynced use the controversial anti-tamper DRM tool.

Denuvo has been in hot water among gamers, especially as it was blamed for performance issues plaguing games that used it. Aside from that, many consider its mandatory 14-day online checks as intrusive, especially for story-driven single-player games where cheating won’t affect the gaming experience of other players. While a few users might’ve understood the studios’ need to protect their titles and reduce piracy, the fact that Denuvo has been cracked in all single-player games that had it felt like its addition to games is pointless.

This is especially true now that we’re seeing pirated pre-release versions of games that are supposedly protected by Denuvo. While it’s unclear how Assassin’s Creed Black Flag Resynced leaked, the fact that the app that reduces performance and reminds gamers that they don’t own the games they buy has seemingly failed at its one job is making users think that it’s unnecessary.

Game studios need to protect their intellectual property, which is why it’s understandable that they’d want to deploy tools like Denuvo. However, they shouldn't do so at the expense of gaming performance and the user experience, which are some of the primary reasons why gamers are pushing back against Denuvo. If these anti-piracy measures don’t punish legitimate players with reduced FPS and always-online requirements, among other negative side effects, then most gamers will have zero problems with using apps that protect the makers of their favorite titles.

DLSS Swapper is an open-source app that does exactly what it sounds like — it swaps out the appropriate DLSS files for any game, helping downgrade or upgrade its native DLSS version. While the tool itself is safe, along with the verified files it hosts, users can also upload their own DLLs to the app's GitHub repo. Unfortunately, it seems like some of these files can contain malware, disguised as helpful solutions.

To understand how this can even happen, we need to look at the way DLSS Swapper is set up. The app uses a manifest file to dig out DLLs from verified DLSS, FSR, and XeSS libraries. The verification process is thorough, and you won't see any file pop up in-app until its security hashes match official sources. However, it can also detect unknown files from new game releases installed on a user's computer.

These files are automatically uploaded to the repository as "issues," and the app also includes an option to upload your own DLL to help out fellow gamers. As you can probably guess by now, this is where the problem lies. These files are not vetted and remain in a grey area. DLL files are basically executable code, so if any of them were modified to include malware, you wouldn't even be able to detect it before it's too late.

The file would've already executed malicious code and installed a crypto-miner, for instance, in the background that hogs your PC's resources until you finally notice something's off. As such, the creator issues a clear warning to not download random files that show up on the GitHub repo, especially if they include comments that claim some sort of miracle cure. Stick to only the sources you trust if you must go outside of the officially supported libraries.

Previously, the developer already warned against the fake DLSS Swapper website posing as the real thing. Let this serve as your reminder that the app's GitHub page is the only place you should download DLSS Swapper from. Moreover, keep in mind that hardware support is just as important as software support, so if you have an older GPU that doesn't support the latest upscaling tech, a DLL swap cannot magically fix that.

Gamers who find themselves “limited” by SteamOS capabilities can now more confidently install Windows on their Steam hardware. Valve just released the Steam Hardware - Windows Resources page on Steam, which contains Windows drivers for the Steam Deck LCD, Steam Deck OLED, and Steam Machine. This means that those who want to replace the stock SteamOS with Windows 11 on their devices can now do so more easily, and they don’t have to hunt around the internet for drivers just to ensure that all the parts and components on their console will play nicely with Windows.

The drivers on the page include those for the APU, graphics, SD Card reader, Wi-Fi, Bluetooth, and Audio, depending on which Steam hardware you’re driving. However, Valve said, “We are providing these resources as is and are unfortunately unable to offer 'Windows on Steam Hardware' support. If you get stuck and need a way back to the default SteamOS, please follow these recovery instructions.”

This is the main reason why Valve refuses to subsidize the Steam Machine — since owners can essentially do whatever they want to the living room PC console, selling one does not automatically guarantee that the company will make back any discounts it offers through game sales. This is why even though the Steam Machine is highly rated for Steam Deck users who want to upgrade to a more powerful device, its relatively high price puts it at a disadvantage compared to competitors like the PS5 or Xbox.

Many gamers would likely prefer SteamOS over Windows, especially as it offers far less bloat than Microsoft’s operating system. Valve is in fact working on SteamOS to make it more compatible with a general release and allow it to be installed on hardware that features Intel CPUs/GPUs and Nvidia GPUs. But because many anti-cheat apps still aren’t compatible with Linux (hence, SteamOS), installing Windows on Steam hardware is currently the only way that gamers can enjoy titles that require them.

It’s unfortunate that SteamOS doesn’t have any dual-boot capabilities at the moment, as that would give gamers the best of both worlds — use Windows and accept the performance hit if they want to play games that require specialized anti-cheat apps and then switch to SteamOS for all the other titles they enjoy. Valve said that it’s already working on this capability, but hasn’t given a fixed timeline for when it will arrive.

Only a little while back, Phoronix got the chance to test-drive one of Nvidia's upcoming Arm-based Vera CPUs. In certain approved workloads, the chip put up an impressive showing, nipping at the heels of its Xeon and Epyc x86 competitors. In specific single-threaded scenarios, Vera "absolutely dusted the competition" (our words). But AMD had some things to say about the Phoronix test, firing back with its own metrics of a 3.3x performance gain over Vera for the projected output of a 100 kW rack of its hardware.

And Nvidia is already thinking about this future. It revealed that its next-gen Rigel Arm v9.2 CPU core, shipping as part of its Rosa CPU, will deliver even higher per-core performance than Vera's Olympus core within the same silicon footprint via "better instruction delivery," more L2 cache, and better memory handling.

Now, Nvidia is reasserting Vera's advantage for AI work by describing it with a new product category: a "max single-threaded CPU at scale" rather than a parallel-processing beast. Instead of simply maximizing the core count per socket, Nvidia says Vera's monolithic 88-core design is meant to provide strong performance per core under load, enough memory bandwidth per core to keep active cores supplied with data, and predictable latency.

Nvidia describes AI inference workloads as being bound by single-thread speed. For example, a reasoning AI will run the model for one step, and will run the model again as many times as it takes until the answer is generated. Since each step needs the output from the previous one, no amount of parallelism will help — the speed at which one thread can run is most important. The situation is similar in agentic workloads, as agent B can't get its work started without knowing what happened with agent A.

Vera's design, then, appears to be one aimed at both having and eating the proverbial cake: high single-thread speed with a large number of available threads. Vera is an 88-core design with SMT support for 176 total threads. And to supply each of those cores with adequate bandwidth, Nvidia says Vera talks to LPDDR5X RAM at 1.2 TB/s, and that its monolithic compute die keeps cores well fed and avoids bottlenecks thanks to 3.4 TB/s of core-to-core bandwidth. The company says the latter figure is 3x that of "any other data center CPU."

There are many ways to measure inter-core bandwidth, so direct comparisons are tricky at best, but given the bespoke design of Vera for AI inference tasks, the claim is at least plausible.

The company's latest blog post about the new silicon reiterates this point, claiming its new silicon delivers 1.8x higher performance versus its x86 competition in "loaded CPU workloads that represent agentic execution," 1.5x higher perf in coding workflows, and 3x faster work in database analytics.

The numbers Nvidia touts purportedly come from real-world scenarios, starting with those from Perplexity, whose usage of Vera in coding agent work delivered a claimed 1.5x performance increase over x86, and a 1.9x speedup running concurrent sandboxes.

The claimed speed increases are wider still in database workloads, with Starburst (federated database firm) clocking a 3x uplift in large-scale SQL analytics, while Redpanda's real-time analytics saw a claimed 6x latency drop. According to Nvidia, all this purported performance is delivered by Vera's particular architecture, one that aims to deliver maximal single-thread performance with high thread counts.

We should note that vendor-approved benchmarks should always be taken with a bucket of salt, particularly those for hardware in a field that can shuffle trillions of dollars in a single day. The company doesn't say which precise x86 chips it tested Vera against, but it's a fair guess that they're mid- to high-end Intel Xeon and AMD Epyc models.

Nevertheless, in the blog post, Nvidia describes a conundrum that's familiar to most any server administrator: big-iron server chips can pack obscene amounts of cores, making them ideal for processing many tasks at once. However, the more cores you add, the slower they need to be to keep thermal performance and power draw in check. But that scale is an obstacle for tasks that need to be done now, parallelization be darned.

And the architectural decisions involved in using chiplets to scale to high core counts aren't free, either. Nvidia calls this "chiplet tax", and it says that scaling using chiplets creates memory access and performance inconsistencies that Vera's monolithic design is specifically meant to avoid.

We've long emphasized the importance of high single-threaded performance for a fast and responsive experience for client PCs, and it seems like AI agents are going to end up placing similar demands on hardware as they do their thing. If that's how the agentic AI future plays out, Nvidia's particular design optimizations for Vera make greater sense than prioritizing core count above all, as it might be for a general-purpose server chip meant to satisfy different economic and customer demands.

We'll have to see if Intel and AMD respond with "max single-threaded CPUs at scale" of their own.

The Internet is buzzing over news that 19-year-old Estonian "hacker" Peter Stokes got nabbed by the authorities and extradited to the U.S. on digital crime charges, mostly thanks to Microsoft Windows' built-in telemetry. The FBI seemingly subpoenaed Microsoft, which coughed up telemetry logs that contained both Stokes' GDID (Global Device Identifier) and websites he visited using his main Windows machine.

The existence of GDID isn't new by itself, as Windows telemetry's data collection has been extensively analyzed and reported on. It's also been known, and publicly explained by Microsoft, that the extended telemetry modes (Full/Optional instead of Required/Basic) can upload lists of URLs analyzed by SmartScreen and Defender, together with the GDID. In fact, using the Edge browser in this setup can even send every visited URL. The court documents do not reveal which exact mechanism triggered the telemetry upload, though.

This data collection has long been the source of heated debate and general public disgust. Even though the data is genuinely useful and necessary for debugging (by Microsoft or systems administrators in enterprise environments), the fact that it comes enabled by default in Windows Home and Professional editions is questionable. The fact that those versions don't have a simple, user-facing "Off" switch to fully disable telemetry also adds insult to injury.

The Peter Stokes arrest appears to be the first public case where these Windows GDIDs were both used as a tracking identifier and contained telemetry data including some of the URLs the defendant visited. The case also prompted a renewed analysis of the GDID by a security researcher that you might want to look into. From what we can ascertain, it's likely Stokes had his Windows telemetry set to Optional/Full, as Required/Basic doesn't appear to transmit URLs by default.

Using the telemetry GDID, the FBI easily connected the dashing rogue to his ngrokaccount, because he used that tool in the same session in which he accessed his Facebook and Snapchat accounts. The agents also established a link between travel records, a New York IP address, and a rental at the Empire Hotel, likely facilitated by the photos Stokes posted of his hotel room. The criminal mastermind was equally sneaky (read: not) in his visit to Thailand.

As many hackers do, he enjoyed some time off playing an obscure game, in this case Ubisoft's Growtopia, shortly before accessing his Apple logins, as well as the aforementioned Facebook and Snapchat logins over the following weeks. Besides Microsoft, Google and Apple also collaborated on the hunting effort, with Google linking Stokes' phishing phone number to the same exact IP address and date where he created the ngrok account. Ever the stealthy craftsman, Stokes had created the ngrok account using the same GMail address connected to a second phone number where he made phishing calls from.

While it's easy and arguably quite necessary to hoist pitchforks at Microsoft for collecting detailed information about billions of computers by default, security professionals will be quick to remind users that Windows' telemetry is merely one of the many ways to track a user. Even if not by malice, a lot of software simply requires GDID-like identifiers for things like tracking usage, subscription and licensing limitations, activation requests, and hardware detection. And every company behind such software can be subpoenaed by authorities, as exemplified in Stokes' case by Microsoft, Google, Apple, ngrok, and others. Even privacy-oriented services like Proton are careful enough to describe what they can and cannot reveal to authorities under a court order.

If you're wondering the steps Stokes took to cover his tracks, though, you'd be looking at a small list. He did route his connections through a VPN hosted at servers from Tzulo along with the developer-oriented ngrok tunneling service and teleport.sh. Unfortunately, the modern digital world allows for many forms of identification, and hiding one's source IP address is merely one of them.

Using a VPN is recommended for digital anonymity, but it's merely the first of many necessary steps and can even backfire when not set up carefully. If misconfigured, a VPN may allow certain applications and operating system features to talk to the outside world using the original IP instead of the hidden one. Plus, the VPN will not stop the operating system or any application from sending out identifying information to begin with.

Perhaps more worryingly still, modern-day device and user fingerprinting is far more insidious and hard to counter. For example, plain web browsers are notorious leakers of personal information, as data-harvesting companies can weaponize features like TLS levels, HTML5 Canvas functionality, the fonts list, and even Widevine DRM in a combination that uniquely identifies a visitor. Stokes now has plenty of time to read up on the EFF's surveillance self-defense guides and get acquainted with the scripts at the Privacy Is Sexy website.

U.S. Space Force Combat Forces Command has announced that the first Meadowlands Counter Communications System (CCS) has been delivered for operational duty. This is a powerful new electromagnetic warfare (EW) device in a wheeled mobile and air-transportable form factor, designed to detect, deny, disrupt, and degrade adversary capabilities around the globe and in space. To be clear, Meadowlands isn’t a laser, microwave, particle, or plasma weapon. Instead, its highly targeted electromagnetic warfare abilities rely on a muscular array of directional antennas and high‑power RF amplifiers.

“We have exceptionally trained and skilled electromagnetic warfare professionals who are highly motivated and excited about integrating this new Meadowlands capability,” said U.S. Space Force Lt. Col. Ryan Skilling, 4th Electromagnetic Warfare Squadron commander. “This upgraded system enables us to more effectively and efficiently support the joint scheme of maneuver across the continuum of conflict.”

Meadowlands arrives to provide a critical upgrade to the existing Counter Communications System (CCS) 10.2, notes Space Force. The new system’s advances are described as a “huge milestone” in capability, as well as being lighter, more compact, and more easily transportable. Meadowlands is set to be part of a robust toolkit that will help deliver “spectrum dominance” to the U.S. Space Command and Department of War.

The efficacy of systems like Meadowlands has already been demonstrated in joint force applications like Operation Midnight Hammer. In this example, EW systems were used to successfully create a “silence zone” over Iran for hours to ensure secure bomber ingress and egress during that operation. Meadowlands units can operate in both forward austere environments and from secure rear echelons.

In addition to silence zones, typical EW tasks Meadowlands will be used for include interference with enemy satellite functions, and jamming uplink and/or downlink signals. More cunningly it can change or corrupt data packets, initiate feedback loops, and spoof enemy assets.

While it celebrates the arrival of its first operational next-gen CCS, Space Force Combat Forces Command intends to build its Meadowlands fleet to 32 units in due course.

The GeForce RTX 50-series desktop graphics lineup has remained unchanged for just over a year now (since the introduction of the RTX 5050), and none of the conversations we've had at major trade shows suggests that a mid-cycle Super refresh will occur any time soon. But there are still signs that such an update could still happen at some point, and the latest sign comes from Seasonic, which has listed an RTX 5080 Super, an RTX 5070 Ti Super, and RTX 5070 Ti Super in its PSU wattage calculator.

You can click through the calculator and assemble a hypothetical system with these unannounced products inside.

To be useful, this calculator also provides board power numbers for these as-yet-unreleased cards, and that gives us another bit of juicy info. Given that no official specifications for these GPUs exist, it's impossible to say whether these figures are accurate. But it does allow us to speculate a bit on how they might stack up to existing products.

*As listed in Seasonic PSU calculator. Unconfirmed by Nvidia.

Seasonic gives this purported RTX 5080 Super a board power of 415W in its calculator, or 15% higher than the existing RTX 5080's 360W envelope. That makes sense, because the RTX 5080's GB203 GPU is already fully enabled, so any Super version of that card would have to lean on higher power limits and more aggressive clock speeds to see any baseline performance benefit.

That figure could also partially account for slightly higher power usage from 8 GB more GDDR7 memory on such a card. Past RTX 50 Super-series rumors have suggested that Nvidia will boost VRAM capacity on those products by moving to higher-density GDDR7 modules with 3GB of capacity each. GDDR7's power consumption as part of the overall board picture is relatively small, but more of it will still matter.

If Seasonic's figures are accurate, we should also expect a similarly sized TGP increase out of the RTX 5070 Ti Super, whose 350W rating is 17% higher than that of the RTX 5070 Ti. The RTX 5070 Super, meanwhile, gets only a 10% TGP bump over the RTX 5070, from 250W to 275W. Both of these cards rely on GPUs that are slightly cut down from their full available resources, so it's possible that Nvidia could boost their performance through a balance of enabling more Streaming Multiprocessors (SMs) in addition to boosting clocks through higher power envelopes.

Beware of extrapolating performance improvements directly from these percentages, though. Our own testing has shown that any real-world performance benefits from these power limit increases are likely to be smaller than those figures would suggest.

As our review of the MSI RTX 5090 Lightning Z showed, the largest performance boosts from higher power limits are likely to be concentrated in ray-traced and path-traced games, whose computational intensity is significantly higher than pure raster titles and is more likely to run the GPU into its power limits.

In any event, we shouldn't expect to see these products any time soon. Nvidia has instead been focused on getting more out of existing Blackwell silicon with software improvements such as DLSS 4.5 upscaling and Multi-Frame Generation multipliers up to 6X.

These technologies enable higher output frame rates and image quality with lower input resolution than past DLSS technologies, and the boost to both performance and image quality from those technologies in tandem has certainly made existing Blackwell products more appealing than they were at launch.

But as monitor refresh rates continue to climb thanks to ongoing improvements to OLED and LCD panels, and next-generation HDMI 2.2 connectors looming over 2027, a hardware update of some kind that boosts baseline performance and potentially implements support for those standards seems practical at some point. Given these primarily consumer-focused improvements, an announcement at CES 2027 or Computex 2027 might make sense. As with any future product rumors, however, only time will truly tell.

Shenzhen Longsys Electronics, the Chinese parent company of Lexar, announced that it’s expecting a net profit of $1.36 to $1.62 billion (or 9.2 to 11 billion yuan) for the first half of 2026, smashing its year-ago profit of just $2.2 million. This represents an incredible jump of 61,818% to 73,636%, and it comes on revenue forecasts of $3.24 to $3.68 billion (22 to 25 billion yuan) — more than double the $1.5 billion it achieved last year, according to the South China Morning Post (SCMP).

This massive growth is attributed to the increased demand for—you guessed it— memory and storage chips due to the global AI infrastructure buildout, and all that demand is competing for limited memory wafer capacity. Longsys says that it has signed long-term agreements and memoranda of understanding with global memory wafer suppliers to ensure supply stability.

The company did not specifically say which memory and storage chip suppliers it has contracted with, but many Chinese memory brands have been ditching the three mainstream suppliers — Micron, Samsung, and SK hynix — for CXMT and YMTC silicon. U.S. manufacturers like Corsair, Dell, and HP, have started considering chips from these suppliers, despite being labeled as Chinese military companies by the Pentagon. Even Apple, which used to have massive sway on its suppliers, has started lobbying Washington for access to CXMT chips as Samsung and SK hynix say that the AI-driven shortages could last until 2027 or even longer.

Longsys’ unprecedented growth has resulted in a 12.5% jump on its stock price in the Shenzhen Stock Exchange over the weekend, which has more than doubled from its lowest point just three months ago. Aside from its record earnings, the company also received the go-ahead from Chinese regulators to raise up to $544 million (3.7 billion yuan) through a private share placement. This would allow it to directly offer shares to select investors and fund research and development on high-end memory products, including AI-focused storage solutions, storage and memory controllers, among others.

The memory and chip shortage is hurting PC makers and consumers, with the PC market expected to shrink by 14% this year. As the market becomes desperate for alternative sources to mainstream manufacturers, Chinese firms CXMT and YMTC, as well as other downstream suppliers like Longsys and Biwin, are taking the opportunity to challenge established Western brands.

When Intel switched to a hybrid architecture with its 12th-Gen Alder Lake PUs, it removed AVX-512 support from the lineup entirely because the E-cores didn't support it. Since then, every subsequent generation has shipped without it... until now. Just today, a new Linux patch pushed in the RAID optimized path has revealed that AVX-512 is finally returning to Intel CPUs with Nova Lake, present on both P-cores and E-cores.

Intel has been working toward a unified AVX solution for the past few years, as it was originally a champion of the SMID extensions before running into the hybrid hurdle with Alder Lake. Getting past that hurdle is AVX10, which Intel first detailed a few years back. With AVX10.2, 512-bit instructions will run on the P-cores, while either core type can handle converged 256-bit instructions.

As such, the E-cores would have their processing width capped at 256-bit, while the P-cores would be open to the full 512-bit wide pipelines. Any thread could swiftly move between either core type with AVX10 implemented. Previously, if the scheduler shifted a 512-bit task running on a P-core to an E-core, the application would crash instantly because those E-cores couldn't process the instruction.

However, the new patches suggest that Intel has now mandated native 512-bit execution across both P-cores and E-cores, no longer requiring the latter to step down and process the data a bit slower. This is a major development over the standard we originally expected Intel to adopt; the E-cores are apparently becoming just as performant as the P-cores when it comes to SIMD instructions with Nova Lake and later.

Intel's original announcement showed that it had already uncoupled the software improvements of AVX-512 from the physical width of the register, so the new instruction features could remain present for both 512-bit and 256-bit execution. This includes things like masking, embedded broadcast for rounding math operations, and doubling the number of the registers themselves from 16 to 32.

It remains unclear if we will ever see this version of AVX10 on client CPUs, as it seems Nova Lake is going purely for 512-bit execution across both core types. AMD's current-gen Zen 5 processors also have full 512-bit wide registers, while the previous Zen 4 architecture divided a single 512-bit task across two 256-bit execution units over two clock cycles. This ensured execution remained disruption-free even if it took longer.

The last time we saw native AVX-512 support on an Intel client family was Rocket Lake (11th Gen), right before the hybrid era ushered in by Alder Lake. For modern AI workloads and other compute-heavy tasks such as encoding or simulations, AVX-512 instructions bring a huge performance benefit that's foolish to be left on the table. Keep in mind that this is just a Linux patch at the moment and that Intel hasn't officially announced native AVX-512 support for Nova Lake yet.

Unwanted ads can be one of the most infuriating parts of the modern tech experience, where hardware you already paid for is insistent on advertising even more slop to you. LG has a bit of a reputation in this regard, and it seems like the company is expanding its repertoire to even more invasive promos now. A user on the r/pcmasterrace subreddit shared that their brand-new LG monitor is showing them ads for McAfee.

Now my monitor is sending me paid ads for Mcafee?! from r/pcmasterrace

Most of us are already aware of the euphoric feeling associated with getting McAfee shoved into your face. Usually, though, it's limited to laptops and prebuilt PCs that come with bloatware, freemium software, or just outright premium software that you somehow acquired for free. It would sensibly drive a person insane if a new monitor that has no other job than displaying your GPU's output starts participating in these activities.

In this case, u/t40r just bought this monitor and plugged it into their computer for the first time. That's when they noticed a small pop-up in the corner right away. It was from the "LG Monitor App Installer," and the first thing it showed the OP was an ad for McAfee. That's right — it was something entirely unrelated to the monitor. But how did this app show up on u/t40r's PC when they didn't even set anything up yet?

The answer is apparently the great evil known as the Microsoft Store. Checking the startup apps in Task Manager confirmed that it added the LG Monitor App Installer to the PC automatically. It's similar to how motherboard software magically enters itself into your system when you reinstall Windows. That one makes a bit more sense, though, since it's supposed to help control or manage your computer.

Sure, the LG Monitor app could serve the same purpose for the monitor, but it wasted its precious first impressions on a McAfee ad instead of showing something useful to the customer. Persuasion be damned. Anyhow, we were able to confirm that this was not an isolated incident either, as another Redditor posted about the same issue just a week ago, along with the steps for the removal process via local group policy.

Windows update silently installed LG bloatware, which causes a McAfee pop up from r/pcmasterrace

Scouring through the comments also reveals other instances where users reported Alienware and Samsung engaging in similar ghost installs. It seems like a standard Microsoft policy of auto-downloading related monitor software, but it's then up to the manufacturer what they actually show in said app. Regardless, these apps don't seem to respect your preferences and just show up uninvited, even if you're already running a debloated version of Windows.

With recent discussions on just how granular Microsoft's telemetry can be, this openness starts to feel like an oversight just waiting to be exploited. Even if Microsoft thinks it's "helpful" to install utilities without consent, it should at least try to make sure those tools aren't throwing up ads. LG makes some of the best monitors on the market; otherwise, it's a shame that deeper software integration can sometimes undermine great hardware.

A Change.org petition urging Sony to keep making physical PlayStation games has passed 172,000 signatures, six days after the company announced that it intends to stop producing discs for new games in January 2028. The petition, started by Jade Pearce, CEO of Canadian retailer PNP Games, climbed from around 12,000 signatures on its first day to more than 172,000 by the morning of July 7. Sony hasn’t responded, and the factory that prints its discs has already started moving some staff and equipment onto a different product.

Pearce launched the campaign the same day as Sony's announcement, and it gathered 40,000 names within 48 hours. The petition contends that a boxed download code is a revocable license rather than owned property, references Sony's recent removal of purchased movies from customer accounts, and lists the used-game trade among the jobs at risk. "We are not against digital," Pearce writes. "We are against digital being the only option."

Niko Partners analyst Daniel Ahmad estimated that Sony sold more than 70 million physical discs in 2025, even with digital purchases sitting at roughly 80% of full-game sales. Sony's PlayStation social accounts have stayed dormant since July 1.

Sony DADC's plant in Thalgau, Austria, produces about 600,000 discs a day, roughly half of them PlayStation titles, and has begun shifting some workers onto optical microlens production, DADC CEO Dietmar Tanzer told Austrian broadcaster ORF Salzburg. The company has put €30 million ($34 million) into new equipment, according to Engadget, expects disc output to fall to about 10% of current volume by 2028, and plans to retrain roughly 300 staff rather than lay them off.

Optical microlenses steer and concentrate light across very small distances and appear in camera modules, AR and VR headsets, fiber-optic gear, and automotive lighting. Markus Streibl, head of micro optics at Sony DADC, said mass production could begin as early as 2027.

The PlayStation 6 is reportedly in development without a built-in disc drive, which would leave Sony's hardware team to reintegrate one if the company changed course. Sony's standalone PS5 disc drive has carried a one-per-order purchase cap since at least March last year, predating the disc announcement, and leaked PS6 specifications described in earlier reports frame any drive as an optional backward-compatibility accessory. Grand Theft Auto 6, easily the biggest game of the decade so far, will ship on PlayStation as a boxed download code with no playable disc, ahead of the 2028 cutoff.

Sony has told publishers they can still book disc runs for games released in 2027 or earlier, so existing physical libraries will keep working on supported consoles. Whether the fact that the petition is now pushing 200,000 signatures will compel Sony to move or abandon the January 2028 date is unclear; Sony delayed its 2021 shutdown of the PS3 and PS Vita stores after similar backlash, though that closure is now scheduled again alongside the disc decision.

Late last week, we reported on a brand-new Steam Machine getting bricked during an update, and refusing to budge from a state freshly dubbed the ‘Red Line of Death’ (RLOD). The issue stirred fear in tech enthusiasts' hearts, still scarred by the notorious Red Ring of Death (RROD) from the Xbox 360 era. But we have some good news today, as Valve’s official account on Reddit has responded to provide step-by-step instructions to get any affected Steam Machine up and running again by clearing the CMOS.

Thankfully, the pronouncement of death was definitely premature in this unresponsive Steam Machine case, and easily fixed. It wasn’t dead, it was resting, or probably pining for the fjords. It just needed to have its CMOS setting thoroughly cleared, that's all.

SteamHWFeedback directly answered the distress call of OP me_hill on Reddit. A five-step recipe to recover Steam Machines with RLOD was provided to the beleaguered gamer. However, me_hill’s own flailing machine-reset procedure had already done the trick – inspired by numerous user comments on the thread.

It is good to have an official solution to the initially scary RLOD, though. For the sake of exactitude, we have pasted Valve’s official RLOD fixing steps below, verbatim.

If you're encountering this issue, please try the following:

• Unplug the Machine, then press the power button a few times. This ensures any stored energy in the PSU gets discharged. You may see the power indicator LED blip a moment.
• Plug the Machine back in. Note if your power LED glows (breathing pattern) white or not. If yes, please submit a Steam Support ticket and tag me, or send me a chat request with the ID.
• Hold the power button down for ~6s. You should see the power indicator LED (dot) flash momentarily. Release the power button when you do.
• The power indicator LED will start to cycle some color codes. These are designed to allow you to select various options for recovery/troubleshooting purposes. When the LED turns green, short-press the power button. This should perform a full "CMOS reset."
• On the next boot, you should see the RGB bar as blue - it may take a bit longer to boot due to a memory re-training.

There’d only been two public pleas by Steam Machine users about RLOD so far, as far as we can see. Perhaps several more users resolved these issues themselves, without any social media interaction, so it is difficult to know the scale of similar experiences. Nevertheless, we are relieved to learn that these symptoms are easily fixed and users can get back up and running on their coveted new gaming hardware pretty quickly – with the benefit of an officially sanctioned cure direct from Valve.

The UK just gave Nationally Significant Infrastructure Projects (NSIPs) the right to bypass pre-application consultation with local council planning processes, meaning the green light will come directly from the national government. According to The Register, NSIPs are major projects that the state considers to be nationally important, like power plants and railways. Data centers were included in this list earlier this year, meaning these developments could now get approval directly from the national government instead of going through hoops in local councils. Still, this is an opt-in process requiring developers to apply for the status.

"Datacenters are not automatically consented as NSIPs; instead, the NSIP regime operates on an opt‑in basis for developers,” the law firm Womble Bond Dickinson told the publication. “A datacenter project may be directed into the NSIP regime where the Secretary of State considers it to be of national significance and satisfied that the statutory tests under section 35 of the Planning Act 2008 are met.” However, it also said that there are no clear guidelines yet from the government on what would make a data center qualify for NSIP status.

The Ministry of Housing, Communities, and Local Government (MHCLG) said that this change could reduce planning and application by up to one year and save developers up to USD 1.3 billion (GBP 1 billion). Aside from this, they’ll also get technical support and meaningful advice from the Planning Inspectorate before submitting applications, ensuring that the process will run more smoothly and efficiently.

This change will make it much faster for data center projects to get off the ground in the UK, with three projects already benefiting from their classification as an NSIP. It seems that the British government is learning from the chaos happening across the pond, as 7 out of 10 Americans are now against data center projects being built close to their communities. These “not in my backyard” fights are turning into costly (and lengthy) legal battles, with developers facing resistance at the town, county, and state levels. This has also resulted in a growing number of data center bans passed by local governments, with more than 75 projects worth $130 billion delayed across the nation in just the first quarter of 2026.

There are concerns that the lack of qualifications would mean that every AI data center could quality as “nationally significant.” The UK’s Department for Science, Innovation, and Technology (DSIT) is said to address this through a National Policy Statement (NPS) set to come out later this year. But, in the meantime, more than 80 projects have already sought the pre-application service from the Planning Inspectorate to help make developments like data centers get off the ground much faster.

A Spanish systems software developer has ported Linux to the Atari Jaguar console. To succeed at the task, cakehonolulu had to overcome severe memory limits, the lack of a memory management unit (MMU), and face off against a handful of unusual hardware quirks. A blog post from the dev tells us about the work to port Linux to this ill-fated 1993-launched flop, and happily ends in evidence that a working Linux kernel and BusyBox command line shell can be booted on the old Jag. Now Linux runs on both your cherished real hardware via cartridge, or in a Jaguar emulator.

Anyone wishing to port Linux to the Atari Jaguar would face numerous constraints due to the hardware. One of the first hurdles successfully leaped by cakehonolulu was the CPU used. Atari’s system designers architected the Jag using a Motorola 68000 CPU, which was already pretty old at the time, but a moderately fast 13.3 MHz version was selected. Though the gaming prowess of the console was lifted by custom co-processors dubbed Tom & Jerry, some games didn’t make much use of this graphics and DSP acceleration, as it was notoriously difficult to tap into.

For this Linux port, the general CPU capabilities of the M68000 would also be targeted to run the OS. With that in mind, and knowing that the CPU lacked an MMU, cakehonolulu was lucky to find that classic Motorola 68k processors are still supported by Linux, and also the uClinux project, which allows Linux to run on MMU‑less systems like the Jaguar.

While these prior works were helpful, it wasn’t long until the linux_jag developer needed to battle with other Atari Jaguar constraints. The console comes with just 2MB of RAM and up to 6MB of ROM, which is incredibly miserly compared to even the cheapest microcontrollers and SBCs nowadays. Much RAM and storage optimization later, cakehonolulu tripped over a few issues getting Linux to boot on the Jaguar, and ended up implementing a console driver for Tom so the OS would work on real hardware.

A brief Atari Jaguar history

Atari’s Jaguar was released with great pride by the iconic video game company in 1993. It was controversially claimed to be the world’s first 64-bit console, but it still never managed to push aside incumbent previous-gen machines from Sega (Genesis / Mega Drive) or Nintendo (Super NES).

The mass market had enough patience to largely ignore the first wave of ‘early fifth-generation consoles’ like this, the 3DO, and the Amiga CD32. They were rewarded handsomely with the launch of the true accelerated 3D gaming next-gen wave, led by the Sega Saturn (which also used an M68000 CPU, alongside co-processors), Sony’s first PlayStation, and the Nintendo 64.

History can be a little unfair to the Atari, though, as it did have some eye-popping for the time original games and ports. I owned the original console with Alien vs. Predator (1994), and it was quite a stunning, tense, and scary game. Others thought the Jag’s Tempest 2000 was a killer app. In addition, there were strong Doom and Wolfenstein 3D FPS ports from the PC.

Kioxia and Sandisk last week said they had started sampling of their latest 3D NAND memory with 332 active layers that features a combination of the industry's leading areal density and performance. The new 10th Generation BiCS 3D TLC NAND is set to address density and performance-sensitive data center applications, as well as promises to surpass Samsung’s latest V10-class 3D NAND in terms of storage density.

Unlike the previous generations, 10th Generation BiCS (BiCS10) is explicitly aimed at data center-grade storage, where bit density and performance are more important than cost. Indeed, the new type of memory features a 332-layer active layer architecture, greater than 29 Gb/mm² density, and a 4,800 MT/s data transfer rate to enable extreme performance for data center solid-state drives featuring PCIe 5.0 and 6.0 interfaces. Kioxia and Sandisk plan to offer BiCS9 NAND specifically for client applications.

When we normally describe 3D NAND memory, we usually mention all possible applications, which include high-end consumer SSDs (after all, we are Tom's Hardware, we are hardware enthusiasts!) and data center drives. We did not mention consumer applications for BiCS10 for a very specific reason: Kioxia does not position this generation for client devices and only targets data center-grade drives. Whether or not to expect BiCS10 on a high-performance SSD near you probably depends on supply and demand, given the current market circumstances.

While the BiCS10 332-layer 3D NAND boosts bit density by 59% all the way to over 29 Gb/mm², it also promises to deliver meaningful performance and efficiency gains specifically for enterprise applications. Kioxia claims read latency drops by around 4 microseconds (about 10%), while read energy consumption is reduced by 25%, from roughly 100 mJ/GB to approximately 75 mJ/GB.

According to Kioxia, these improvements stem from a redesigned read scheme that changes how unselected word lines behave during consecutive read operations. In a 332-layer NAND stack, a significant portion of read latency and power consumption is associated with repeatedly charging long word lines from ground (VSS) to the read voltage (VREAD).

Normally, NAND memory discharges its wordlines to ground (VSS) after every read, which is a general-purpose approach that works regardless of what the next operation is. However, there is no need to discharge at all times. Therefore, during continuous read operations, the word lines are not fully discharged in the case of BiCS10. Instead, they are lowered to an intermediate voltage and then raised back to VREAD for the next read, which makes a lot of sense for read-heavy applications (most cloud applications are).

After the initial read, the circuitry reduces the word-line voltage only to an intermediate level instead of completely discharging it to VSS. Before the next access, the voltage is restored to VREAD from that intermediate level rather than from ground. Since the voltage excursion is considerably smaller, the word lines recharge more quickly and require less current, which improves both read latency and energy efficiency. The approach is particularly beneficial for very tall 3D NAND stacks, where long word lines amplify charging delays and power losses during sustained sequential read workloads.

It is interesting to note that Kioxia and Sandisk plan to manufacture their BiCS9 and BiCS10 3D NAND products at different production sites. The newest Fab 2 facility in Kitakami, Iwate Prefecture, will handle production of the flagship 332-layer BiCS10 memory, while the long-established Yokkaichi complex in Mie Prefecture will continue manufacturing the 218-layer BiCS9 generation.

This manufacturing split makes a lot of sense. Fab 2 is equipped with Kioxia’s most advanced production tools, so it is better suited to manufacture the highest-density NAND from Kioxia and Sandisk. Meanwhile, the mature Yokkaichi fabs are well-suited for client-oriented BiCS9 production. The manufacturing facility has largely been depreciated, which enables the company to manufacture mainstream NAND at lower cost and reserve its newest capacity in Kitakami for leading-edge products.

No need to pinch yourself — it is, in fact, 2026, and there was a court hearing last June 22 about IBM allegedly using copyrighted source code in Unix-like products, yet again for the umpteenth time since 2003, a saga that's part of the Unix wars.

For historical context, Xinuos (formerly SCO) and IBM have been embroiled in legal battles for decades, as the companies cooperated between 1998 and 2001 on developing an Itanium variant of Unix. Since then, SCO has repeatedly and dramatically taken IBM to court, claiming the defendant misused SCO-owned source code from the collaborative effort in its AIX and z/OS products, as well as Linux. Many battles have been fought over who owns the "Unix" name, what code IBM put in Linux, and even FreeBSD.

The latest hearing pertains to a 2021 lawsuit by Xinuos, the company that acquired the remnants of Santa Cruz Operations, more commonly known as SCO. Xinuos' CEO reportedly once stated the group didn't purchase SCO just to acquire the right to sue IBM, but the company eventually changed its mind in 2021 and dragged IBM back to court on claims that its conduct and copyright infringement resulted in great damage to Xinuos' market position.

Xinuos picking a fight with a team of lawyers colloquially known as the Nazgûl is questionable on its own — yet, in the aforementioned 2021 lawsuit, Xinuos added bold claims, such as stating that IBM's purchase of Red Hat should be reversed under antitrust law, and that the company's strategy in said acquisition was to destroy FreeBSD — the variant underpinning Xinuos' wares.

How, exactly, an MIT-licensed operating system would be "destroyed" is an interesting matter. Xinuos stated at the time that "IBM and Red Hat have abused their control over the Unix/Linux operating system market for far too long." One wonders if Linux users with hundreds of distributions at their disposal would agree that IBM has been pulling their strings all along.

The lawsuit dragged on until 2025, when Xinuos voluntarily chose to drop the antitrust claim (presumably after finding little purchase from the court). It also found itself disabused of the merits behind the copyright complaint, as the New York judge in question framed the claim as time-barred: too long had passed for Xinuos to file a complaint, and original ownership of the code is murky at best. Darl McBride, the SCO executive who launched the original lawsuit, passed away from ALS in 2024.

Xinuos did, however, press on with the copyright issue and requested a hearing for an appeal. And on June 22, 2026, the firm argued in front of a three-judge Second Circuit panel that the previous judge miscast a copyright infringement claim as an ownership claim.

Save for the occasional deal, GPU prices are so high these days that they might even get you wondering if you couldn't just roll your own. As it happens, renowned hardware hacker Matthias Balwierz (more commonly known as Bitluni) elected to do precisely that, enlisting the help of a total sum of 8,192 RISC-V microcontrollers (MCUs) for this enterprise.

He originally planned to create a display of some sort, but after careful consideration regarding costs and difficulty, he elected to solder an RGB LED directly to each microcontroller chip, effectively turning his GPU into a GPU-and-monitor combo, if we're getting technical. Going for a 1920x1080 resolution would require over two million chips, so Balwierz aimed for a final-project resolution of 320x200 with 64,000 chips — familiar figures to anyone who played games in the DOS days.

Balwierz opted to make boards with 16x32 "pixels" each, in a circular arrangement reminiscent of the Cray-1 supercomputer, though with far more blinkenlights. His option to directly solder each light onto each MCU was borne out of budgetary restrictions, as the addressable-RGB variant would also prove too expensive.

For this initial stage of the project, Balwierz stuck with "only" 8,192 chips, though he made plans for the whole shebang. Perhaps the most impressive figure is the power draw, at a total of 2,161 W, or around 655 amps at 3.3 V. Each MCU only draws 10 mA, a figure that looks innocent enough until you do the actual math. To feed power into the beast, he enlisted the help of a Corsair WS3000 ATX power supply unit along with custom-designed converters to go from 12 V to 3.3 V at high current.

As for the chips themselves, they're QingKe CH570 RISC-V units, each with a 32-bit RISC-V CPU with a limited instruction set, running at up to 100 MHz. The diminutive chip contains an impressive amount of hardware, including a USB controller, a 2.4 GHz transceiver, and Bluetooth 5.0 LE support. Each of these set Balweirz back $0.13, once again a measly looking figure that will add up to well over $8,000 in chips alone for the final 320x200 array. Each set of 32 MCUs is controlled by a beefier CH32V unit.

As habitual, Balwierz custom-designed every single PCB, power delivery circuit, interface board, and testing board himself. This is apparently the first time he's designed a six-layer PCB, and he actually ran up against design limits of the JCLPCB service. He originally planned for the whole project to use immersion cooling, but decided against that for the time being due to environmental and cost concerns, though he did spec out the appropriate acrylic container for it.

Balwierz goes over each chapter of the process in detail in his video, and one of the most clever bits is how he made a 3D-printed three-prong fork-like tool to program each MCU. He then took said tool and attached it to the 3D printer's carriage, and used a Python script issuing direct G-code to the printer to precisely aim it at each MCU in the board.

It'll take a while before this is a functional CPU that can threat Nvidia, but we're looking forward to seeing Doom displayed on it. Also, it's kind of funny how one guy in a lab designed a better power delivery mechanism than the firm's 12V-2x6 connector... using just parts from AliExpress.

An Intel patent application published on July 2, 2026, surfaced by Underfox, has revealed the company's plans for a new high-bandwidth memory (HBM) architecture that aims to ease the packaging and cost bottleneck of today's interposer-based HBM. The patent application — filed back on December 26, 2024 — describes what Intel calls cross-batch memory (XBM), an "ultra-high-bandwidth memory with backend transistors" built with the goal of matching HBM4's footprint while swapping conventional DRAM and its ultra-wide interface for back-end-of-line (BEOL) transistors and serial Universal Chiplet Interconnect Express (UCIe) links.

Intel's proposed design is a memory stack that addresses the assembly costs that make conventional HBM expensive by dropping the costly silicon interposer and shrinking the package, while building in its own defect repair.

The filing lays out a stack of memory dies, each holding one-transistor one-capacitor (1T1C) DRAM fabricated in the back-end-of-line, wired together with through-silicon via (TSV) "gutters" and both-sided high-bandwidth interconnect (HBI) connections. Intel describes dies of roughly 1.5 gigabytes (GB) apiece — 768 "datablocks" arranged in a 32-by-24 grid, grouped into eight channels of eight sub-channels each — stacked eight high and scaling to 16. Data then leaves the stack over UCIe I/O bundles running at 32 gigatransfers per second (GT/s), funneled out through a base die.

To understand what Intel is changing, it helps to recall what standard high-bandwidth memory does. HBM stacks DRAM dies vertically on a base logic die, threads them together with TSVs, and communicates with the processor across a silicon interposer using an extremely wide parallel interface — on the order of 1,024 bits per stack. This width is how HBM delivers its bandwidth, but it is also what makes it expensive to package and hard to scale, as every one of those wires has to be routed through an interposer sitting between the memory and the compute die. As AI accelerators have outrun the rate at which memory can feed them, this "memory wall" has become the dominant constraint on performance, which is why nearly every large chipmaker is now attacking the interface and the stack rather than the logic.

XBM's first major change is structural. Conventional DRAM cells are built in the front-end-of-line, the base silicon layer where transistors are normally fabricated. XBM instead moves the 1T1C cell into the back-end-of-line, the metal-and-via stack above the transistor layer, using thin-film transistors. Building memory in the BEOL is what lets Intel pack the die into many small, independently addressable memory blocks, and it is the same backend-transistor direction Intel has pursued for placing memory directly over logic.

The second change is the interface. Rather than HBM's wide parallel PHY, XBM serializes data onto UCIe bundles at 32 GT/s, with the base die handling the serialize/deserialize step and routing all I/O to the compute die. Moving to a standard chiplet interconnect is what makes the design "chiplet-native" and, Intel argues, simpler and cheaper to package than an interposer-bound HBM stack. The tradeoff is that 32 GT/s is UCIe's current top data rate, so the interface is already running at the spec ceiling rather than leaving obvious headroom.

Intel also leans heavily on repairability. The base die carries dedicated spare channels, built-in self-repair (BISR), decode and debug logic, and four sub-channels of redundant memory arrays that act as fungible spares for defects in the dies above — post-assembly repair designed to claw back yield on a very tall stack.

A large portion of the patent application focuses not on the memory cell at all but on how to mount it. Intel details memory-on-package (MoP) and "reversed overhang" structures aimed at cutting the stack's Z-height — conventional MoP can add 300 to 350 micrometers (µm) — while removing the stiffener normally needed to control warpage and feeding DRAM power directly from the voltage regulator. This is the concrete basis for the "smaller, cheaper package" claim.

XBM should not be confused with ZAM (Z-Angle Memory), the architecture Intel is co-developing with SoftBank subsidiary SAIMEMORY and set to present at the VLSI Symposium 2026. ZAM's innovation is on the bonding side — a fusion-bonded, nine-layer stack of largely conventional DRAM with roughly 3-µm-thin silicon between tiers — and it reportedly targets around twice HBM4's bandwidth density, with commercialization aimed at 2029. XBM, by contrast, is an Intel-only filing that changes the DRAM transistor itself and the interface. Read together, they suggest Intel is running at least two parallel HBM alternatives, a fitting move for a company that began in 1968 as a memory maker.

The caveats on Intel’s proposed HBM architecture are the usual ones for a patent. The patent was filed 18 months ago, and there’s currently no product or roadmap, signaling potential intent rather than a shipping part. The UCIe interface is already at its rate ceiling, backend-transistor DRAM remains unproven at manufacturing scale, and the whole thing still has to justify itself against HBM4E and Intel's own ZAM timeline.

Samsung announced stellar results last night, noting a 19x quarterly increase in operating profit, allowing the firm to pass Nvidia as the most profitable in the world. Kim Yong-Kwan, president and head of corporate management, strategy, and operations for Samsung Electronics' Device Solutions (DS) division, said that the semiconductor unit's 2026 operating profit will exceed everything it has earned across roughly 40 years in the chip business at a company town hall last Friday, according to a report published Monday by Korea JoongAng Daily.

Brokerage consensus puts Samsung's full-year 2026 operating profit near 300 trillion won ($196 billion), and its second-quarter figure at about 84.6 trillion won ($55.1 billion). Samsung easily beat the consensus with $58.5 billion when it posted preliminary results on July 7, overtaking Nvidia's most recent quarterly operating profit of $53.54 billion and becoming the most profitable technology company in the world for the period, on the back of AI-driven memory demand.

Samsung's DS division booked 53.7 trillion won ($35.1 billion) of the company's 57.2 trillion won in total operating profit during the first quarter of 2026, roughly 94% of the total, which is why the division's projection sits so close to Samsung's full-year consensus.

"This year's profit will exceed the cumulative profit generated over the past 40 years since we entered the semiconductor business," Kim Yong-Kwan told staff, scoping the claim to the chip business rather than the wider conglomerate.

Samsung entered the semi space by acquiring Korea Semiconductor in 1974 and shipped its first 64Kb DRAM in the mid-1980s. SamMobile estimates the division's cumulative operating profit from 1985 to 2025 at under 300 trillion won. Samsung's smartphone, display, and appliance businesses have earned far more than that over the same period, so the record applies to memory and logic chips, not to Samsung overall.

Contract prices for DRAM and NAND have risen steeply through 2026 as AI server demand outran supply, pushing memory makers toward 40% to 50% operating margins on NAND in the first half of the year. Prices for 12 GB LPDDR5X modules have reached about $145, and Samsung is negotiating further commodity DRAM increases for the third quarter. The DS division's earnings move with those contract prices, and Samsung has told customers to expect tight supply through at least 2027.

Samsung is releasing preliminary second-quarter figures on July 7, so these record projections are still estimates. The reported profit will also absorb a profit-sharing agreement that pays chip workers 10.5% of DS operating profit as stock, worth as much as $26.6 billion this year. SK hynix is due to report its own second-quarter results on July 29, and analysts expect the two companies to post combined operating profits near 150 trillion won for the quarter.

ChangXin Memory Technologies, or CXMT, has just received official validation from MSI for its high-speed DDR5 memory modules. The manufacturer has released new beta BIOSes across its AM5 lineup, unlocking stable frequencies up to 8,200 MT/s for 3GB CXMT chips on dual-DIMM motherboards. Previously, RAM using these modules was limited to around 6,800 MT/s despite the hardware itself being capable of much more.

The test BIOS comes from MSI China — there's no announcement on global channels for some reason, and it's only available for select motherboards at the moment. MSI tested region-bound retail kits from Lexar and KingBank on boards with both two slots and four slots, but we only have screenshots for the former, courtesy of Videocardz.

One test was conducted using 24GB sticks (2x24) on the MEG X870E Unify model and a Ryzen 7 9700X CPU. This was mostly a standard kit since it came with a 6,000 MT/s EXPO profile. The other config consisted of 16GB sticks (2x16) with an EXPO profile already running at 7,200 MT/s, so it was somewhat cherry-picked silicon, paired with a Ryzen 5 9600X on a MAG B850 MPower motherboard.

The results showed that on dual-DIMM motherboards, 24Gbit (3GB) modules from CXMT were able to clock up to 8,200 MT/s, passing MemTest with 101% coverage. Conversely, 16Gbit (2GB) chips were also stable at 8,000 MT/s on the same test bench with 101% coverage. Moving over to quad-DIMM, the patch notes for the BIOS say they've "also been raised to DDR5-7200," where the limit was stuck at 6,800 MT/s prior.

This is not the first time MSI has optimized Chinese RAM for some of its motherboards. Earlier this year, the company did the same thing for Intel's 800-series models in China. Anyway, these specific BIOSes are meant for the AM5 socket and they're based on existing stable releases — just patched with unlocked memory overclocking features. More motherboards should be supported soon, but for now you can check out the MSI China's community release channel if you want to try one yourself.

Microsoft's gaming division, Xbox, will eliminate approximately 3,200 jobs over its 2027 fiscal year in an attempt to turn around its floundering business. The cuts include offloading four studios with plans to spin off another, though no announced first-party games are being canceled.

Around 1,600 of those jobs are being eliminated today, and the rest will occur throughout the rest of the year.

"We are operating at margins that are 3-10x lower than comparable platform and publishing businesses," Xbox CEO Asha Sharma wrote in a note to Xbox employees, pointing out that investments in studios and Game Pass did not add as much value as expected. She wrote that the business typically loses 64 cents for every dollar invested. "As that happened, our core business weakened, and we added more teams, more investment, and more time, hoping for a better outcome. And now the industry is facing the most severe hardware crisis in its history. We must reset XBOX." She wrote that she has a goal for Xbox to reach more than a billion people per day.

Xbox is selling Compulsion Games (South of Midnight) and Double Fine (Psychonauts, Kiln), back to their management as independent studios, along with their catalogs, intellectual property, and funding for their next games.

Meanwhile, Ninja Theory and Undead Labs are being sold to unidentified "new ownership" and will continue to work on Senua and State of Decay 3 with Xbox, respectively.

The fifth studio, Arkane, is entering consultation to review options due to France's strict labor laws. The company is currently working on Marvel's Blade and previously worked on Redfall and Deathloop.

In Sharma's letter, she wrote that changes will come to Activision, Bethesda and ZeniMax, Blizzard, King, Mojang, and Xbox Game Studios. Some will focus more on popular franchise games. Bloomberg reports that ZeniMax will focus specifically on its biggest names, such as Fallout, Doom, The Elder Scrolls, Quake, and Wolfenstein.

Mojang and King will report directly to Sharma, who wrote that those two studios are the largest in terms of monthly active players, and bring "critical geographic, demographic, and differentiation to XBOX." But in other areas, Sharma is greatly reducing the amount of management for a flatter organizational chart.

Xbox has also found its first-ever chief operating officer. Helen Chiang, the corporate vice president of the Minecraft business, was promoted to streamlining changes to how the business operates, including "end-to-end P&L responsibility across content, hardware, platform, and services."

"These changes are about a bigger future for XBOX, not a smaller one," Sharma wrote. "The next decade of gaming will be larger, more global, and more creative than anything we’ve seen before. This year, we’ll invest as much in XBOX as we ever have, but we’ll invest with greater focus, greater discipline, and greater clarity, all in service of making XBOX where the world plays and creates."

Microsoft's other recent moves include bringing more games exclusively to Xbox consoles, such as Gears of War: E-Day, returning to an all-caps "XBOX" brand, and more public discussion of Project Helix, the company's next home console that's also set to play PC games.

Sharma was named CEO of Xbox (then Microsoft Gaming) in February, succeeding Phil Spencer. Spencer built up Xbox with major acquisitions of Game Studios and a push to bring Xbox games everywhere with Game Pass.

Nobody loves their printer. Decades of DRM chips, subscription ink, and firmware that bricks non-branded cartridges have made sure of that. But now, Paris-based Open Tools wants to hand the hardware back to the people who paid for it. The start-up has shared its first video of a working prototype and announced that its 'Open Printer' has been nominated for two French Design Awards, though the repairable, open-hardware inkjet still carries no announced price, ship date, or print speed, roughly nine months after it first appeared on Crowd Supply.

The machine runs on a Raspberry Pi Zero W, takes refillable HP cartridges with no DRM, and prints to cut sheets or paper rolls through an integrated cutter, with its design files available under a Creative Commons license that prohibits commercial reuse.

A Raspberry Pi Zero W runs the print server, while an STMicroelectronics STM32 microcontroller drives a separate cartridge board. Control comes from a 1.47-inch TFT LCD and a jog wheel, with USB-C, USB-A, Bluetooth 4.1, and a 24V DC input. The manufacturer's recent progress update reported that the prototype can now print in both black and full color.

In terms of printing, that runs through CUPS, the open-source Common Unix Printing System, meaning the hardware works with Windows, macOS, Linux, Android, and iOS without any vendor drivers. Open Tools quotes resolution at 600 dpi for black and 1200 dpi for color, with the machine accepting HP 63 cartridges in the U.S., HP 302 in Europe, and HP 803 in Asia. Each is refillable, and black and color run independently rather than blocking printing entirely when one of the tanks empties.

Open Tools licenses its electronics, firmware, mechanical files, and bill of materials under Creative Commons BY-NC-SA 4.0, a noncommercial term that allows owners to repair, modify, and share the design, but bars anyone from building and selling the printer.

However, Open Printer only uses HP cartridge bodies with integrated printheads, so its refill freedom will only last for as long as HP keeps selling those cartridges in a form that accepts third-party ink. It's an odd choice for Open Tools, given that HP is the vendor that's by far the most associated with cartridge lockouts, having tied cheaper printers to its HP+ and Instant Ink programs before discontinuing those online-only models in 2024 after a backlash.

Wi-Fi and Ethernet are still being integrated, according to the update, alongside work on ink drying, printhead cleaning cycles, paper insertion, and dithering algorithms. The spec sheet lists Wi-Fi 5, which exceeds the 802.11n radio built into the Raspberry Pi Zero W, so networking will probably rely on an added module, but that remains to be seen.

Open Tools has published no funding goal to date, and says the final price depends on production volume, component costs, certification, and remaining engineering, with the figure to be revealed when the crowdfunding campaign opens in the coming months.

Sony makes some of the best headphones on the market, and some of their recent models even include a myriad of sensors for spatial audio. These are standard gyroscopes and accelerometers capable of precise tracking, so why keep them limited to just audio features? That's exactly what developer Nicholas Slattery has done with his new project called "Sony Head Tracker" — it's an app that turns your Sony headphones and earbuds into a real-time head tracker for PC games.

I made Sony headphones work as a free head tracker for 200+ PC games from r/pcmasterrace

The app essentially acts as a bridge between the hardware and the software, which is OpenTrack. Sony baked the Android Head Tracker protocol into its headphones' firmware, which is what enabled spatial audio to expand the soundstage on supported devices. This data is ignored by Windows, but Slattery figured out a way to tap into the protocol and read everything it's capturing.

That includes rotation vectors, gyroscope fields, and Euler Angles (live calculation of yaw, pitch, and roll). The raw data packets are then packaged into a UDP stream that the OpenTrack software can read and understand. OpenTrack supports over 200 PC games and usually works with phones, webcams, and specialized eye or IR trackers, but Slattery's app opens it to an entirely new and ingenious set of devices.

Currently, Sony's WH/WF-1000XM6, WH/WF-1000XM5, and Sony ULT WEAR (WH-ULT900N) are officially compatible. Older models like the WH-1000XM4 or XM3 won't work because they lack the hardware (sensors) required for the head tracking. Apple's AirPods, which popularized Spatial Audio, use the company's proprietary protocol that doesn't open itself up on any device, as you'd expect, so they're also ruled out.

Once everything is set up, you just wear your Sony headphones and the in-camera will respond to your head movements, turning around with you. If you look to the side or glance up, the camera will peep there as well, as if you were wearing a VR headset. But keep in mind that this is not a VR replacement as the screen in front of you is still stationary. Regardless, this unlocks another level of immersion for race and flight sims.

The creator has tested the app to work flawlessly with Microsoft Flight Simulator, Elite Dangerous, and Assetto Corsa already. For those of us not rocking elaborate multi-monitor configs, something like this can serve as a middle ground between a true 6DoF setup and a simple helmet cam in-game, all for free. Sony Head Tracker is also open-source, so we only expect it to improve over time and expand its compatibility.

Update 7/6/2026 4:10pm PT: An Nvidia representative responded with a short statement to Tom's Hardware: "Our roadmap is intact." Nvidia provided no further details in response to our follow-up questions. As such, it is unclear if Nvidia's statement refers to its original roadmap, planned delivery schedules, and hardware, or if those particulars had already been changed and the statement refers to a newly updated roadmap.

Original Story:

Nvidia reportedly won't ship its Kyber NVL144 rack until 2028, a delay of more than 12 months that pushes the cabinet meant for 2027's Rubin Ultra GPUs into the following year, according to a SemiAnalysis thread on X. The holdup is ostensibly being caused by manufacturing challenges with a PCB midplane that connects eight Oberon racks between the NVSwitches, which Nvidia calls the orthogonal backplane. Nvidia is also understood to have killed NVL72x2, a stopgap rack designed to tide customers over, and that no proven alternative is now available to widen Rubin Ultra's scale-up in 2027.

The orthogonal backplane sits between Kyber's vertically mounted compute trays and the switch trays behind them, replacing the cable harnesses of earlier racks with a rigid board that carries the all-copper NVLink fabric. Kyber runs liquid cooling by default and stacks 144 Rubin Ultra packages, double the 72 packages in a current Oberon NVL72 rack. Every GPU-to-GPU link inside the cabinet runs through that board, and copper traces lose signal integrity as layer counts increase, alongside power delivery and thermal design challenges. Jensen Huang held up the gray backplane on stage at GTC back in March.

Trade analyses of the board describe three 26-layer sections laminated into one 78-layer stack close to a square meter in area, with trace spacing at or below 25μm and impedance held within a tolerance of 5% to keep 448 Gb/s-class signaling intact. A cabled version of the same interconnect would need upward of 20,000 discrete cables, which is why Nvidia is moving the wiring onto a single passive board.

NVL72x2 would have bolted two Oberon racks back-to-back to reach Kyber-class density over copper NVLink, per SemiAnalysis, which said Nvidia abandoned the stopgap after its largest customers balked at running two linked cabinets as a single unit. NVL576, a separate configuration tying eight racks together through co-packaged optics, is likely to slip too or ship in low volume until that optical technology matures.

These cancellations leave Nvidia with "no proven solution to expand the scale-up world size for Rubin Ultra," meaning the largest single Rubin Ultra domain in 2027 could match, but not exceed, what Oberon already delivers.

Nvidia dropped the quad-chiplet Rubin Ultra GPU for a dual-chiplet part last week over manufacturing execution concerns, halving the accelerator's per-package compute. SemiAnalysis has also placed a fully production-ready co-packaged optics NVSwitch no earlier than the Feynman generation that follows Rubin, which leaves copper as the only near-term solution for linking Rubin Ultra at rack scale and thereby puts even more weight on the PCB midplane.

The delay only applies only to the Rubin Ultra phase and its Kyber rack. Nvidia's 2026 Rubin GPUs, which reuse the current Oberon rack, aren't part of the reported delay. We've reached out to Nvidia for comment.

Nvidia shouted proudly in a recent blog post that its network of American manufacturing partners and suppliers now spans 43 states, that TSMC's Phoenix plant is producing Blackwell wafers at volume, and that it plans to produce up to $500 billion of AI infrastructure in the U.S. over four years with partners including TSMC, Foxconn, Wistron, Corning, Coherent, and Amkor. Intel has made its own case in an America 250 post presenting end-to-end U.S. capabilities across design, manufacturing, and advanced packaging.

Both accounts hold up at the wafer stage but omit the same downstream step: every Blackwell die that leaves TSMC's Arizona fab still crosses the Pacific to be packaged, no HBM is manufactured or packaged on U.S. soil, and the facilities intended to close those gaps won’t start production until 2028 at the earliest.

Lofty projects

Foxconn is building a Houston factory to produce GB300 tray modules for Nvidia, and Wistron will assemble and test Nvidia AI systems at a new facility in Fort Worth, Texas. Coherent broke ground in June on an expanded Sherman, Texas, plant that the company describes as the first volume-production 6-inch indium phosphide fab, supplying the lasers and optical components that link AI systems together.

Corning is adding more than 3,000 jobs across optical manufacturing sites in North Carolina and Texas. The post also cites an estimate from consultancy Public First that Nvidia-driven AI demand will contribute $485 billion to U.S. GDP in 2026 and support over 100,000 jobs. “AI is driving a once-in-a-generation opportunity to reinvigorate American manufacturing and supply chains,” said Nvidia’s Jensen Huang in the post.

Meanwhile, Intel's post lists R&D and manufacturing across Oregon, Arizona, New Mexico, and California, describes Ohio as “a planned site,” and devotes most of its length to workforce programs, K-12 AI education, and the company’s America250 partnership. Neither post addresses where the most advanced AI processors are actually assembled into finished chips.

The Pacific round-trip

Nvidia and TSMC produced the first Blackwell wafer at Fab 21 near Phoenix last October, and the site has since moved to volume output of Blackwell silicon on TSMC's 4NP node, the custom 4nm-class process built for Nvidia. On the other side of the Phoenix metro area, Intel's Fab 52 became fully operational in the same month as the first high-volume home of Intel 18A, and Naga Chandrasekaran, Intel's chief technology and operations officer, told CNBC in December that the fab is capable of more than 10,000 18A wafer starts per week. Panther Lake reached broad availability in January, Clearwater Forest is due in the first half of this year, and 18A yields are expected to reach industry-standard levels in early 2027, which I covered in my examination of Intel's fab roadmap.

This ultimately means that leading-edge logic wafers are now being fabbed in the U.S. by two companies on two competing nodes. That’s a genuine change and, by any measure, a monolithic achievement when compared to the start of the decade, and neither company overstates that in their corporate blogs.

However, a Blackwell data center GPU pairs two reticle-sized compute dies with eight stacks of HBM3e on a silicon interposer using TSMC's CoWoS-L packaging, and all of TSMC's CoWoS capacity is located in Taiwan. TSMC’s U.S. facilities currently send 100% of their chips to Taiwan for packaging, including wafers fabbed in Phoenix. A Blackwell die fabbed in Arizona therefore travels roughly 7,000 miles to be diced, stacked, and mounted, then travels onward through system assembly before any of it returns to a U.S. data center.

As for HBM, every stack in production today comes out of SK hynix and Samsung facilities in South Korea or Micron's fabs in Taiwan and Japan, and the ABF substrates beneath the interposer are similarly concentrated in Japan and Taiwan. No U.S. facility currently manufactures or packages HBM. The one company running advanced packaging at scale on U.S. soil is Intel, whose Foveros operation in New Mexico handles its own 3D-stacked products and has started attracting outside interest; Google has reportedly booked Intel to package more than 3 million TPUs in 2028. Intel doesn’t currently appear anywhere in Nvidia's list of manufacturing partners.

Nothing before 2029

Amkor also broke ground on its Peoria, Arizona campus last October, a $7 billion, two-phase project with up to 750,000 square feet of cleanroom, roughly $400 million in CHIPS Act funding, and Apple and Nvidia signed as lead customers. Its first factory will be completed in mid-2027, with production beginning in early 2028. TSMC formalized the relationship on June 16th, signing a 10-year agreement under which it will procure packaging and test services from Amkor, while TSMC executives said in April that the foundry's own Arizona packaging facility will bring CoWoS and 3D-IC capacity online before 2029.

SK hynix began initial work in April on its $3.87 billion advanced packaging plant in West Lafayette, Indiana, targeting mass production of HBM4E and HBM5 in the second half of 2028, the same window Amkor’s aiming for. The timing means the entire Blackwell family, and likely the first Rubin generation, will complete their product lifecycles without a fully domestic manufacturing path. The first AI accelerators that can be fabbed, packaged, and fitted with U.S.-packaged memory without leaving the country will be HBM4E-era parts arriving around 2028 to 2029.

Unfortunately, the Section 48D advanced manufacturing tax credit, raised to 35% last July, doesn’t apply to projects whose construction begins after December 31st, 2026, which gives Coherent's June groundbreaking, SK hynix's April piling work, and Amkor's October start a shared fiscal deadline if they want to benefit from it.

As for Foxconn and Wistron’s Houston and Fort Worth plants, they’ll receive GPUs packaged in Taiwan and assemble them into trays, racks, and systems on U.S. soil. It’s that type of assembly work that’s carrying most of the $500 billion figure, which counts the value of AI infrastructure produced rather than capital spent on factories. Wafers are American, racks are American, but everything in between isn’t. Whether that changes on schedule is a question for 2028, and it depends highly on two packaging campuses in Arizona and one in Indiana meeting their deadlines.

Quantum Systems Group reckons it has broken the flight speed record for an electric drone. During internal testing last month, the Munich-based firm recorded its Apex Recordhunter drone hitting a top speed of 699 km/h (434 mph) in straight and level flight. That incredible result convincingly outpaces the current world record holder with a recorded top speed of 657.59 km/h (409 mph). However, a Guinness World Record entry is pending, with a formal attempt to crack that achievement expected to take place in the coming weeks, reports ComputerBase (machine translation).

According to the official press release, the Apex Recordhunter drone was developed over the last year and serves as a technology demonstrator for next-gen electrically powered drones. Tellingly, Ukrainian engineers are also working on this project under the auspices of WIY Drones, a branch of Quantum Systems. It will also be attempting record-breaking speed challenges in Ukraine, as the Apex Recordhunter is being assessed for future interceptor drone programs.

Specifically, the WIY Drones plans include record attempts to break speed records for an FPV interceptor drone carrying a 0.5 kg payload, and for an anti-aircraft class FPV interceptor drone. These could well become the Ukrainian answer to the increasingly fast and maneuverable aerial threats that the Russians are sending over the border.

So, we might have a flurry of new drone speed records on the way, and it wouldn’t be a great surprise if the Apex Recordhunter drone pushes past the 700 km/h (435 mph) milestone.

Kiwi speed challengers

The Europeans aren’t the only ‘Recordhunters.’ In May, we reported on another unofficial drone world speed record. Drone builders Aidan and Ben from New Zealand recorded maximum speeds of up to 453 mph (730 km/h) in tests of their Blackbird drone, which leverages exotic sawtooth carbon fiber propeller blades.

Like with the Apex Recordhunter drone, the Blackbird speed record remains unofficial, as they haven’t had a verification that requires a certified independent observer, verified measurement equipment, documentation including a submission, followed by a controlled two-way run.

Huawei is planning to enter South Korea's AI accelerator market in the fourth quarter of 2026 with its Ascend 950 series processors and Atlas 950 SuperPod AI computing platform, according to a report by Korean publication ETNews last week. The move would mark Huawei's first major push into one of Nvidia's strongest overseas AI markets, with the Chinese company reportedly planning to undercut Nvidia on price while pitching its hardware as an alternative for customers seeking to reduce dependence on the US chipmaker.

The chips spearheading the move are the Ascend 950PR and the Ascend 950DT, the latest models in Huawei's Ascend line of neural network processing units (NPUs) for AI computing. The Ascend 950PR, an inference-focused chip, entered mass production in April, while the Ascend 950DT, designed for AI training workloads, is scheduled for release in the fourth quarter. Both processors are expected to debut in Korea together with the Atlas 950 SuperPod, an integrated AI computing platform that Huawei says can scale to as many as 8,192 Ascend processors in a single deployment.

According to the report, Huawei Korea has completed master distributor agreements with two local partners, Hansol PNS and longtime Huawei collaborator SK Shieldus, and has already begun preparations for commercialization, including technical training, pricing policies, marketing strategies, and localized branding for the Korean market. Huawei is reportedly building its Korean campaign around aggressive pricing and processing power.

The company claims its Ascend 950PR delivers approximately 2.87 times the inference performance of Nvidia's H20 AI accelerator while costing around one-quarter as much. The H20 is Nvidia's export-compliant AI processor developed specifically for the Chinese market after US export restrictions prevented sales of more powerful GPUs. Huawei concedes its chip falls short on raw performance compared to Nvidia's flagship H200, but argues the gap can be closed by clustering thousands of Ascend processors together via the Atlas 950 platform.

The Ascend 950 series uses Huawei's "self-developed" high-bandwidth memory (HBM), which the firm constructs from dies obtained from foreign sources. The 950PR uses Huawei's HiBL 1.0 memory and the 950DT its HiZQ 2.0 standard.

Huawei's strategy for the South Korea move, which comes as the country's demand for AI infrastructure surges, appears aimed at competing on both cost and ecosystem maturity, positioning its hardware as a viable Nvidia alternative. Nvidia's flagship accelerators reportedly command tens of thousands of dollars each, with supply remaining tight. A chip at one-quarter the price of the H20 gives Korean buyers a real incentive to seek a second source. Huawei also says it is improving compatibility between its Compute Architecture for Neural Networks (CANN) software stack and Nvidia's CUDA programming ecosystem to ease migration for developers.

Huawei is not new to penetrating South Korea's market, having successfully entered the country’s highly competitive LTE equipment market in 2013. However, past experience is not a guarantee of future success. ETNews notes that industry observers expect Huawei to face resistance in Korea, citing local sensitivity toward Chinese technology, security concerns, the power and heat overhead of high-density Chinese silicon, and the vendor lock-in risk of adopting a proprietary stack. There is also a domestic dimension, as the Korean AI-chip scene is made up largely of accelerator startups, making Huawei's arrival — backed by its supply scale and software depth — read as a competitive threat.

Controversy due to AI data center buildouts generally centers around their massive power usage and draining of local water reserves, but noise is a third torment to nearby residents, and one that is arguably much harder to correct. Residents of Sturtevant, slightly south of Milwaukee, Wisconsin, filed a class-action lawsuit against Microsoft due to the excessive noise produced by the company's Fairwater facility. CEO Satya Nadella described the project as "the world's most powerful AI data center," projected to generate 865,000 tokens per second and have a final bill of $7.3 billion.

The Sturtevant residents live just 1.5 miles (2.4 km) from the facility. The lawsuit was filed by three citizens and represents the households within this distance, reportedly amounting to over 1,000 homes, including areas in Mount Pleasant. The filing describes the noise situation as "not only excessive, but consistent and pervasive," and claims Microsoft did not "implement adequate acoustic barriers, shields, or walls that absorb, mitigate, and/or prevent the escape of noise, thereby resulting in the offsite emission of excessive noise beyond its property." One resident claims he had to change his shift at work to be able to sleep at all.

Nearby residents also complain about excessive dust and traffic stemming from the construction work, as well as light pollution. One resident says he often can't see his house coming into town, while another claims that before the data center arrived, the sky was dark and full of stars, now mostly gone due to the bright lights.

To some credit, Microsoft appears to have been trying to improve the situation, judging by a fairly detailed blog post on its community website. On June 18, the company said its engineers applied several measures that "fully resolved the issue," and that it would apply additional mitigations over the following months, including "additional sound reduction components."

The backstory in the post says the firm was aware of the issue back in April, and "[it] did not expect the tonal quality of the sound to travel as far as it has," attributing the decibels to cooling fans operating at too-high speeds, now purportedly corrected. In an earlier project update about the data center, Microsoft says it would have street sweepers working 10 hours a day and limit construction to hours between 6am and 10pm.

The lawsuit was filed on July 1, indicating that either the issue isn't resolved, or that the particularly short distance between Fairwater 1 and Sturtevant might make for a conundrum that's exceedingly tricky to solve. Some Mount Pleasant residents even live across the street from the campus, too. Before the Fairwater data center arrived, the land was already zoned for heavy industrial use back in 2017 to Foxconn, a status that carried over to Microsoft upon purchase. Notably, Wisconsin's "direct legislation" apparently does not allow amending or repealing existing ordinances, and is only available to cities, not towns.

E-ink displays have come a long way since their introduction, with advancements in refresh rates and colors allowing them to be used as monitors for PCs. Bigme is once again pushing e-ink monitor technology with the 25.3-inch Bigme B251 Pro, which is on sale on its website for $1,279.00 (down from $1,599.00). This isn’t the first color e-ink monitor, as Dasung previously launched the first one in 2023, while e-ink device manufacturer Boox also debuted its 25.3-inch option last year. Nevertheless, what made the B251 Pro different is its claimed 60 FPS refresh rate.

This is the fastest claimed refresh rate we’ve seen so far on an e-ink monitor, with the previous record sitting at just 33 Hz. That doesn’t mean that you can start gaming on an e-ink display, though. VideoCardz points out that displays like these still face slow pixel response rates, latency, ghosting, and image quality issues, especially during fast motion, so it’s better to stick with the best gaming monitors if you need a monitor for competitive gaming. Nevertheless, this might be a viable solution if you have a text-heavy workload and have grown tired of dealing with strained eyes at the end of the workday.

Its 3200 x 1800 resolution, paired with a 25.3-inch screen size, gives it 145 DPI, which is slightly better than the 92 to 93 PPI you’d get from a 24-inch Full HD display. It also supports 4096 colors and 16 gray levels — although this is miles away from the millions of colors that modern monitors support, but that is the limitation that e-ink monitors face for now. The Bigme B521 Pro offers HDMI or DP connectivity, but also comes with wireless screen mirroring and a remote control. It also has a built-in front light with adjustable temperature, allowing you to use it in the dark without requiring an external light source.

The Bigme B251 Pro is an interesting development in e-ink technologies, and it would be nice to see if it can actually deliver a usable experience outside of reading. While we doubt its capabilities when it comes to gaming, we still want to see if it’s a usable alternative for productivity. Those on a budget will likely be deterred from buying it, though, especially as its high price point makes it more expensive than some of the best 4K gaming monitors you can buy today.