Having jettisoned 4F² memory cells from its roadmap, Micron must use different methods to continue scaling its DRAM devices in the coming years to keep up with rivals planning to use smaller DRAM transistors towards the end of the decade. Instead, Micron intends to introduce wafer bonding with its upcoming 1ε DRAM process technology and adopt High-NA EUV lithography for subsequent generations. Meanwhile, the company is developing new types of memory, including vertical high-bandwidth memory (vHBM) and vertical edge inference memory (vEIM), which will be integrated directly on top of processors.

"DRAM is nearing atomic limits at this point," said Scott DeBoer, president and chief technology and products officer at Micron, during the company's event this week. "Although we have confidence in several more planar nodes, we are very focused on making sure that we introduce 3D DRAM at the optimal time from a cost and performance point of view."

Wafer bonding, High-NA EUV, and new materials

Micron's current 1γ DRAM process is already in high-volume manufacturing, whereas its successor, 1δ, is scheduled to enter volume production in the second half of 2027. The latter promises a mid-20% increase in bit density and is optimized for future AI memory products, including HBM5, vHBM, and vEIM. Beyond 1δ, Micron plans to introduce wafer bonding with its 1ε process, which is currently under development. However, the company has not disclosed how it intends to implement wafer bonding or what improvements it expects from the technology.

For subsequent generations — ζÅ and ηÅ — Micron plans to adopt High-NA EUV lithography (ζÅ, zeta angstrom, Micron's 1^st Generation sub-10nm-class DRAM node) and new materials (ηÅ, eta angstrom, Micron's 2^nd Generation sub-10nm-class DRAM node) to continue shrinking DRAM cells. For many of its upcoming fabrication technologies that will be used over the next five to 10 years, Micron is also collaborating with Albany NanoTech. Of course, as with all organizations like Albany NanoTech, we are mostly talking about fundamental, or pre-competitive, IP that could be used for DRAM production at some point.

 "Albany NanoTech, our announced focus on advanced lithography [is] really driving High-NA EUV roadmap for DRAM," said DeBoer. "In particular at Albany with our team there, focused on the next five to ten years."

Micron is also developing 3D DRAM technologies and lists two generations — 3D1 and 3D2 — in its roadmap already. However, the company has not disclosed its architectures or launch schedules, as it intends to introduce 3D DRAM only when the technology offers sufficient advantages in manufacturing costs, complexity, and performance over conventional planar DRAM.

"When we look at three 3D DRAM we have that on the roadmap, as I mentioned, and it is shown here in between one zeta and one eta," said Micron's CTO. "But in reality, this is a parallel path, and we will implement it [3D DRAM] in a fashion that is ideal for cost, complexity, and device performance."

Going vertical, becoming critical

Beyond developing new process technologies for its upcoming DRAM products, Micron is also working on all-new types of DRAM products that are tailored for very specific use cases, including vertical HBM (vHBM), vertical edge inference memory (vEIM), and various custom HBM (cHBM) implementations.

vHBM will place memory stacks directly on top of processors (such as AI accelerators and AI GPUs) rather than next to them. This approach promises substantially lower latencies and higher bandwidth thanks to shorter connections. However, placing memory above a processor creates significant thermal challenges and limits the number of memory stacks that can be integrated on top of an ASIC. Therefore, Micron expects vHBM to complement conventional HBM, which will continue to provide the bulk of memory capacity in many AI accelerators.

Another technology under development is vertical edge inference memory (vEIM), which shares architectural and packaging characteristics with vHBM but targets different applications. Whereas vHBM prioritizes maximum bandwidth for high-performance AI accelerators, vEIM is focused on energy efficiency for edge AI processors used in autonomous vehicles, robotics, and other power-constrained devices. Nonetheless, even the 1^st Generation vEIM targets formidable 2 TB/s bandwidth at <1pJ/bit energy, which is in line with what HBM4 currently offers (at 8 GT/s over a 2,048-bit interface). Micron intends to optimize these products with customers according to their bandwidth, capacity, and power requirements.

Both vertical memory architectures will require advanced packaging technologies, particularly hybrid bonding, which enables much denser connections than conventional microbumps. Thermal management will also be critical, especially for vHBM. To meet cooling requirements, Micron is developing specialized heat-spreading structures to transfer heat from hot regions of memory base dies through the DRAM stacks.

The company has not disclosed when vHBM, vEIM, or cHBM will enter commercial production. What is important about the development of such types of memory is that it indicates that future improvements in memory performance will increasingly depend on advanced packaging and closer integration with processors, which will require collaboration between DRAM makers and logic developers. In turn, this transforms memory from a commodity to a critically important ingredient of an ASIC design.

DRAM featuring 4F² memory cells has long been considered one of the holy grails of the DRAM industry, as they promise to reduce cell area by 33% compared with conventional 6F² designs and therefore enable building DRAMs with more memory cells in the same area. However, after working on 4F² memory cells for a couple of decades, Micron has concluded that the architecture offers no meaningful density advantages, increases manufacturing complexity and costs, and has fundamental scaling limitations. This has a dramatic impact on Micron's future plans.

"Micron invented 4F² DRAM," said Scott DeBoer, president and chief technology and products officer at Micron, during the company's event on Wednesday. "The path with 4F² DRAM is always been an option through time, and we have evaluated it and not pursued it due to increased complexity and cost through this past two-decade period of time."

Interestingly, both Samsung and SK hynix still have 4F² memory cells in their roadmaps (according to TechInsights), so Micron's rejection of the technology puts the company on a unique trajectory. Several years ago, the company delayed integration of EUV lithography into its manufacturing flow, contrary to what its rivals did, and still managed to retain competitive positions both in terms of costs and in terms of performance. Therefore, skipping 4F² memory cells is not completely surprising.

4F² is not the future of Micron's DRAM

The main attraction of 4F² DRAM is its theoretically smaller memory cell. The 4F² naming refers to a cell area equivalent to four times the square of the minimum lithographic feature size (F), compared with six times F² for conventional DRAM.

At identical feature dimensions, a 4F² cell occupies approximately 33% less area than a 6F² cell, which could theoretically increase the number of memory cells per wafer by 50%. Such an improvement would reduce manufacturing costs per bit and increase per-device memory capacity even without an equivalent reduction in feature dimensions. However, to make these advantages possible, DRAM makers must develop a suitable transistor architecture and a sufficiently compact capacitor arrangement. This is not easy at all.

The CTO of Micron says that the theoretical advantages of 4F² DRAM do not necessarily translate into higher memory density in practice. DeBoer explained that dimensions and pitch of DRAM capacitors, rather than the nominal area of DRAM transistors, ultimately determine how many memory cells can fit on a wafer. Both 4F² and 6F² transistor structures must fit beneath the capacitors, which means that reducing transistor area alone does not guarantee a corresponding reduction in overall cell size because transistors need a capacitor. Furthermore, Micron believes that 4F² introduces additional manufacturing steps and complexity that increase costs without delivering sufficient benefits.

"It is important to understand the capacitor pitch, the capacitor size, and dimensions, is what sets the DRAM bit density, not whether it is 6F², 4F², 8F²," DeBoer said. "From our investigation of this technology over the past couple of decades, it is a bit of a myth that 4F² actually provides anything versus 6F². It is capacitor pitch that defines the DRAM. You can build the cells, the transistors underlying them in different ways, but they still have to fit under the capacitor pitch, which sets the DRAM [cell size]. So, some of that is just smoke and mirrors in terms of talking about 6F² versus 4F²."

4F² memory cells may curb new process technologies

Instead of adopting the 4F² DRAM cell architecture, Micron plans to continue scaling conventional 6F² DRAM. The company believes it can increase bit density by reducing capacitor pitch and shrinking process technologies even without introducing a fundamentally different transistor architecture.

Advanced lithography, new materials, and wafer bonding should allow Micron to extend planar DRAM scaling for several more generations, according to the company. For example, its upcoming 1δ process technology, scheduled to enter volume production in the second half of 2027, promises a mid-20% improvement in bit density compared with its predecessor. Micron also plans to adopt High-NA EUV lithography for future DRAM generations.

Interestingly, DeBoer fully acknowledges that 4F² DRAM is technically feasible and that Micron itself has manufactured experimental devices based on the architecture. However, its manufacturing complexity and costs become increasingly problematic as feature dimensions shrink, so essentially Micron claims that it can either adopt 4F² or use more sophisticated process technologies, a claim that perhaps implies why China-based CXMT recently praised 4F². Although DeBoer did not identify any specific physical limitations involved, he stated that 4F² has no sustainable scaling path beyond a certain point. This suggests that Micron sees little value in introducing an intermediate architecture that would eventually require another major transition.

"When you look at a scaling path, you can go back a few nodes and absolutely, 4F² can be built back a few nodes, no question about it," DeBoer noted. "It is more complicated, it is more complex, it is more costly, but you can do that. When we look at scaling 4F² beyond where we are sitting today, there it is; it is physics. There are fundamental problems with 4F² scaling that ultimately will lead to 3D DRAM coming in instead of 4F²."

3D DRAM is the future

Indeed, Micron's preferred long-term solution is 3D DRAM, which would increase memory density by stacking memory cells vertically rather than relying exclusively on reductions in their lateral dimensions. Alongside development of multiple next-generation planar DRAM process technologies, the company is already developing multiple generations of 3D DRAM production nodes (which is not surprising, as 3D NAND nodes will rely on fundamental innovations developed for planar processes), although it has not disclosed when the new architecture will enter commercial production. DeBoer indicated that Micron will make the transition when 3D DRAM offers the right combination of density, manufacturing complexity, and cost.

Although both Samsung and SK hynix have 4F² DRAM products in their roadmaps, Micron believes that the assumption that reducing the nominal footprint of DRAM cells improves manufacturing economics is wrong and that extending 6F² scaling and eventually adopting 3D DRAM offers a better long-term strategy.

The two biggest NAND flash memory manufacturers on the planet, Samsung Electronics and SK Hynix, are reportedly working to upgrade their Chinese factories to produce more advanced chips for use in AI data centers, Reuters reports. The move comes as the two companies continue to fight off competition from the fast-growing Chinese memory makers like CXMT. Fierce competition in the lucrative AI RAM market has already seen manufacturers slash consumer-focused production to allow them to increase production capacity for the more advanced — and money-spinning — components.

Citing four people familiar with the companies' plans, the report claims that Samsung Electronics aims to switch its Xian plant to the production of 286-layer flash chips by the end of the year. SK Hynix has its sights set a little lower, targeting chips with 240 or more layers at its Dalian facility. That factory was taken over back in 2021, but a timescale for the new upgrades isn't clear.

However, while Samsung Electronics and SK Hynix are well placed to deal with the growing threat from Chinese chipmakers, both are faced with additional complications in the form of U.S. regulations. Export controls on chipmaking equipment were applied in 2022, with the aim of slowing China's technological progress. Both companies, based in South Korea, must now get licenses in order to install U.S.-built hardware in Chinese factories. The report points to this as a reason for the recent growth of Chinese firms like Yangtze Memory Technologies Co. (YMTC). The company told investors at a recent IPO preparation meeting that it aims to become the world's largest NAND flash producer by the end of 2027.

While both Samsung Electronics and SK Hynix say that they are working in consultation with the U.S. authorities, there's little doubt that this extra step has hampered the companies' ability to upgrade their factories to better meet the new AI memory demand.

It's impossible to overstate just how key Samsung and SK Hynix are to NAND supply. Samsung's Xian factory produces around 40% of the company's global output. It currently produces chips that have around 200 layers, but Samsung's plans aim to boost that to 286 layers for V9 NAND chips. For its part, SK Hynix's Dalian plant currently produces chips with 192 layers, with the company's aim for 240-layer chips reportedly confirmed by three people familiar with the plans.

Meanwhile, CXMT, China's premier chipmaker, is looking to move beyond DRAM production. A report from September 2026 noted that it was eyeing production of 3D NAND memory for use in solid-state storage (SSD) products. The country's largest DRAM producer, CXMT, posted $22.41 billion in revenue and $11.57 billion in net profit in the first half of 2026 after years of losing money. But despite this purple patch, the company is still much smaller than the likes of Samsung, SK Hynix, and Micron.

Micron faces a one-day labor stoppage at its Taoyuan operations in Taiwan on October 22, Reuters reports. Micron's employees are striking for concrete terms for this year's bonus and a clearer mechanism for sharing the company's future profits. The strike's teeth come from the resultant financial impact on Micron's operations, as semiconductor fabs are supposed to operate around the clock. The scheduled protest comes amid strong demand for memory chips and will have a minor impact on Micron's memory output.

The Taoyuan union wants Micron to present a specific proposal for this year's additional employee bonus and establish a transparent formula for distributing a portion of future profits. Previous negotiations between the company and the union ended unsuccessfully in September, which prompted employees to approve industrial action in early October. Nonetheless, the union stresses that the October 22 strike is intended to pressure Micron into reaching an agreement rather than terminate negotiations. The union is prepared to conclude a deal if the company presents terms acceptable to employees across its Taiwanese operations.

The situation could become more serious if employees at Micron's Taichung operations, its largest manufacturing site in Taiwan, decide to join the action. A separate labor organization that represents workers at that facility is scheduled to meet with Micron for mediation on October 22, the same day as the Taoyuan protest. However, the Taichung union has not yet authorized a strike.

Micron's fabs in Taiwan produce commodity DDR5 and LPDDR as well as expensive high-bandwidth memory (HBM) for AI accelerators. Amid record demand for memory of all types, even a one-day suspension of operations would have a material impact on Micron's output and earnings.

Modern semiconductor fabs are supposed to work 24/7/365, as many processes cannot be halted. However, if management has sufficient time and personnel to prepare, a one-day warning strike does not necessarily mean a complete shutdown of Micron's Taoyuan manufacturing operations, not to mention permanent damage to wafers or equipment. The actual consequences of the strike will depend on employee participation, which manufacturing operations are affected, and Micron's contingency plans. While it is likely that the output will drop, the decline will likely be negligible.

Micron employs approximately 15,000 people in Taiwan. The workers point to compensation arrangements at Samsung Electronics and SK hynix as examples of how semiconductor manufacturers can distribute profits among employees as AI-driven demand generates unprecedented cash flows for memory firms.

What if you could buy a cheap used DDR5 SODIMM (laptop memory) kit and transform it into a super-fast DDR5 desktop kit? That’s what electronics hobbyist Blighted Agent recently did when they succeeded in converting a SK hynix 2x 16GB DDR5-5600 SODIMM kit they got from Facebook Marketplace for $120 into a 2x 16GB DDR5-7800 desktop kit, claimed to be worth around $1,000. They also had to buy some blank DDR5 desktop memory PCBs from AliExpress for around $16 each, and a set of heatsinks for around $18.

In the above video, our hero says they bought the donor laptop 2x 16GB DDR5-5600 sticks for just $120, which is a bargain. With extra bits and pieces from AliExpress (desktop DDR5 PCBs, etc.), the total bill of materials came to $175. Blighted Agent comments that the SODIMMs used what he believed to be SK hynix A-die modules, which are the same as the ICs used in expensive desktop DDR5 modules like the G.Skill Trident Royal line.

The process began with taking the memory ICs from the donor modules using a hot air station. Then they were cleaned and had 0.45mm leaded solder balls added, using a DDR5 stencil, reballing jig, and hot air. Next, the blank desktop DDR5 PCBs were prepared. A little solder was added to the plethora of BGA connectors to be ready for the memory chips to connect to.

The old DDR5 ICs and the new desktop modules could now be mated, using flux, the preheater, hot air, and watching and prodding carefully with a dental pick. Blighted Agent’s experience lets him know when the BGA chips have successfully mated with the PCB. You can eyeball when they pop precisely into place due to surface tension, and offer up a modicum of resistance to pick prodding.

Finally, the enthusiast added the SPD chip and BIOS chip from the SODIMMs to the new desktop DIMMs. These new desktop DIMMs were quickly tested in a PC before they were finished off with carefully applied thermal pads and the fancy-looking heatsinks.

Blighted Agent felt lucky that there were no issues with the newly created desktop modules. There’s a lot of intricate things that can go wrong during such a process. The initial boot verification showed them recognized in his Asus ROG Maximus Z790 Apex Encore motherboard as two “SK hynix 16,384MB 5600MHz” modules, which was correct. Some tuning resulted in rock-steady performance at DDR5-7800 CL38 and 1.40V. This was verified by stress testing for 90 minutes, which the enthusiast reckons was ample for a gaming PC. It is very likely a better result than using those mechanical SODIMM-to-DIMM converters you can buy, which can be problematic.

Blighted Agent seems to specialize in BGA soldering work, and has also successfully upgraded several graphics cards with double the VRAM. Though videos like this are edited to be brief, and they make the process look easy, the TechTuber admits there is a lot that can go wrong during this kind of rework. Moreover, with RAM modules, they lack the testing equipment to locate an issue with any particular IC on the PCB. So, if this module didn’t work, they might have ended up in a world of pain, not knowing which memory chip had an issue due to either an internal fault or a BGA soldering glitch.

Looking around at used DDR5 SODIMMs, it looks like Blighted Agent was very lucky to get a used working 32GB kit for $120. I just checked eBay U.S., and the best deal there was $320. Meanwhile, the best price for a new 32GB DDR5-6000 kit seems to be $449 at the time of writing.

We reported on Russian enthusiast VIK-on succeeding in a similar project earlier this year, but all their costing was in Rubles, and they went the extra mile in flashing custom firmware so the remade modules would be auto-detected with 6400 MT/s XMP support on most motherboards. In late 2026, DDR5 RAM continues to be too expensive.

Leading French eSports club Team Vitality has confirmed that its Paris HQ has been smashed up, with trophies, computer equipment, and more looted over the weekend. Thankfully, no team members or staff have been hurt. The team’s V.Hive premises were attacked by criminal opportunistic looters under cover of the widespread protests in France over issues related to school funding, living costs, and government spending cuts. Other shops, public buildings, and property have been smashed, looted, and sometimes burned.

Above, you can see the confirmation of the serious, unfortunate events seen over the weekend. “Our display windows were destroyed, and our trophies and computer equipment were stolen,” lamented the post [machine translation], while being thankful that no members, staff, or fans of Team Vitality were hurt. The bulletin ends with the news that the V.Hive will remain closed for now, until after damage has been assessed. More information is promised in due course.

There are a multitude of social media posts sharing images, videos, and pointing fingers at what they see as the cause of the protests, riots, and looting. Of course, fingers point in all directions, and unfortunately there are also reports of AI-generated rage-farming media, so keep a critical eye open should you dare to doom scroll.

Of course we’ve focused on the damage and looting of Team Vitality’s HQ due to the tech angle. The compendium of video clips shared by the news organization NEXTA provides evidence of the extent of the V.Hive attack. This 30-second clip appears to show rioters hammering at and kicking in the eSports HQ’s windows, taking items from the premises, and throwing gaming chairs onto bonfires in the street.

We also see accounts like ElBuni share clips of looters brandishing what appear to be eSports trophies from Team Vitality’s HQ (embedded above). The second clip shows looters with their hands inside gaming PCs opened up on the sidewalk. It looks like the hooded and gloved looter in the video is removing RAM sticks, an easily pocketable yet highly valuable PC component, as you will all know.

This morning, the French Prime Minister has called for local and partial curfews to contain the post-demonstration rioting. Meanwhile, there are concerns that there could be copycat behavior across Europe.

Elon Musk has criticized memory makers for what he calls 'extortionate' pricing amid an unprecedented shortage of both conventional DRAM and high-bandwidth memory (HBM). Although Musk did not identify the companies he criticized, his remarks seem to be directed at Samsung Electronics and SK hynix, as he praised Micron for its more 'reasonable' approach at the same time. Interestingly, Micron also enjoys exceptionally high profitability: its latest quarterly gross margin reached 81%.

"Micron has been reasonable regarding future memory prices, while others have been extortionate, which is something today's customers will not forget," Musk wrote in a post on X. "Micron is making the smart move for long-term customer loyalty."

Musk did not provide specific details of said extortionate pricing or disclose terms offered by different memory suppliers (which tend to be confidential). Consequently, it is impossible to determine whether Samsung and SK hynix charge substantially more than does Micron for comparable products. Nevertheless, Musk's remarks suggest considerable frustration with the pricing policies of South Korean memory manufacturers.

Over the past several quarters, memory has transformed from an easy-to-obtain commodity to a strategic asset, and makers of 3D NAND and DRAM have certainly benefitted massively from this shift. Historically, memory makers have responded to strong demand and rising prices with aggressive capacity expansions, which eventually led to oversupply and falling prices. This time around, however, manufacturers have raised memory prices severalfold without comparable increases in production capacity. As a result, supply still lags behind demand and will continue to do so for years to come, which puts further upward pressure on memory prices.

What makes Musk's praise of Micron particularly interesting is the company's financial performance, which clearly suggests that the company is taking advantage of the situation in the market. In its fourth quarter of fiscal 2026, Micron reported revenue of $54.23 billion and a GAAP gross margin of 81%, up from 40% a year earlier. The company's cloud memory unit earned $16.283 billion, and its non-GAAP gross margin totaled 83%; its core data center storage business sold goods worth $18.002 billion with a 90% gross margin; while sales of the automotive and embedded units totaled $6.824 billion with gross margins reaching 84%.

Perhaps the most surprising part of Micron's last quarter report was its mobile and client revenue of $13.114 billion and non-GAAP gross margin of 90%, which means that Micron earned higher profit selling memory and storage for client devices than it did for selling memory solutions for data centers. Such results clearly indicate that even supposedly reasonable memory prices can generate extraordinary profits in the current market.

Memory manufacturers are increasingly shifting toward long-term supply agreements (LTAs) that guarantee future supply and provide customers with predictable prices of DRAM, HBM, and NAND. So far, Micron has signed 26 strategic customer agreements that cover more than 35% of its expected revenue through 2030. These contracts include $32 billion in customer financial commitments, most of which consist of cash deposits. The company acknowledges that its new agreements reflect higher prevailing memory prices, and it by no means is trying to sell memory at a discount.

Samsung has reportedly secured long-term contracts covering 75% – 80% of its planned memory output in 2027, according to South Korea's ⁠Korea Economic Daily (via @Jukan05). SK hynix is reportedly pursuing similar arrangements as AI infrastructure investments continue to absorb available memory capacity.

Market insiders and analysts expect memory supply shortages to persist through at least 2028, and that gives manufacturers considerable leverage in contract negotiations. Memory suppliers have little incentive to reduce prices and are eager to enjoy their position, but Musk's warning suggests that today’s pricing policies could influence customer relationships once supply and demand eventually return to balance.

CXMT expects to launch its first 4F² product, a server DDR5 RDIMM, by the end of the year, company president Cao Kanyu said in remarks reported by Yicai. The memory will be built on a denser cell layout, not yet commercialized, using vertical transistors to reduce the cell’s footprint by about one-third on paper. No speeds or capacities have been announced yet for the new product.

Cao spoke about the new RDIMM at the Integrated Chips and Chiplets Conference on Saturday. A 4F² cell is 2F by 2F at about two-thirds the area of current 6F² cells at the same feature size, and designs so far all stand the transistor up. The company has produced research and patent filings on the technology with papers in 2021, 2023, and 2025, and an 8Gb full-array research example was demonstrated at IEDM 2023.

Cao said CXMT’s version, the Vertical Surrounded Gate (VSG) transistor, has a channel that stands vertically with the gate wrapped around it, allowing stronger gate control with less leakage. Most importantly, standing the transistor up shrinks the cell. CXMT now has more than 300 published patent families tied to 4F², he added. The report says the industry as a whole is moving toward 4F² with 3D solutions that decouple DRAM and CMOS processes, combining them with wafer-level hybrid bonding, which allows logic and cell density to be optimized independently. Cao also covered CXMT’s own hybrid-bonding work, which began in 2019, with published patents.

Aside from this announcement, China’s primary DRAM maker has been in the news lately for its manufacturing and market-share gains. Its fifth-generation G5 DRAM technology platform, announced Sept. 20, is in mass production. TrendForce puts CXMT’s share of global DRAM revenue at 9.5% in the second quarter, up from 7.6% in the first, good for fourth place. Last November, CXMT showed off DDR5-8000 and LPDDR5X-10667. It has revealed itself as a manufacturer to be taken seriously by the biggest existing players.

Samsung showed off a 16Gb, 10nm-class 4F² DRAM design in its ISSCC 2026 paper in February. That one also used vertical-channel transistors (VCT), with the array bonded on top of the periphery using wafer-to-wafer hybrid copper bonding. The company claims the bonding raises dies per wafer by more than 20% with the same design rules. In April, The Elec reported that Samsung had a working 4F² VCT die on its sub-10nm “10a” process, with mass production targeted for 2028. Later South Korean reports clouded that date: the VCT version has since been split off as “D0a-V” with no timeline, and there is no firm timeline for adopting 4F².

SK hynix laid out plans at VLSI 2025 for a 4F² vertical-gate platform and 3D DRAM at nodes of 10nm and below, with circuitry bonded under the cell array. The April report also puts SK hynix’s 4F² debut at the 10b node, one step after Samsung’s 10a. Micron’s plans remain less clear, with no widely reported 2026 statement.

The announcement is perhaps more interesting for what wasn’t mentioned: capacity, speed, die density, process node, named customers, or intended volume. All we have is a date and a purported cell design, admittedly well-supported by the literature, but no product that has been tested by anyone outside of CXMT. Beyond Cao’s talk, CXMT hasn’t posted a release about the product in its Chinese or English newsrooms.

South Korean reports have said that CXMT’s initial products may only partly use 4F² and that producing stable units at volume is a separate challenge. With about 11 weeks left in the year, it will be interesting to see what CXMT actually delivers.

PC shipments globally have dropped by 20.1% year-over-year in the third quarter of 2026, a decline of 15.8 million units. According to research firm IDC Global, this marks a steeper decline compared to the 3.8% year-over-year decrease that the market experienced last quarter. It’s also down 9.1% from the second quarter of this year. Many research firms have been warning about this since late last year, with IDC warning that the PC market could shrink up to 9%, with the budget sector being hit the hardest. Some experts estimate that the situation isn’t expected to improve until 2029, with Tom’s Hardware readers saying that they won’t upgrade their systems in the next two years.

These price increases have been directly caused by the boom in AI data centers, with hyperscalers pouring massive amounts of money into the crucial HBM needed to support AI GPUs. This has led to memory manufacturers pivoting toward this technology, leaving less production capacity for consumer memory. One good example of this is Micron, which killed the Crucial RAM and SSD brand in late 2025 so that it can focus on data center production. As PC makers fight for a shrinking supply of memory chips, we saw memory prices climb by as much as 500%, with 128GB of DDR5 now costing as much as $3,399.

Manufacturers didn’t sit idly by and let the market take its course, though. Many of them stocked up on inventory in the second quarter of 2026 to try and head off the projected higher prices caused by the shortage, which directly led to the reduced shipments being reported. “What we’re seeing is the result of the strong first half pull-in. Vendors and channels loaded up on inventory early in the year to get ahead of price hikes, and that has thrown off the usual seasonality, where Q3 is typically larger than Q2,” said IDC consumer devices research director Jitesh Ubrani. “Channels are now worried about carrying too much inventory into a market where high prices are suppressing demand. That could translate into promotions and some short-term relief for consumers, but we don’t expect pricing anywhere near what it was a year ago. Prices will remain elevated. With macro conditions worsening, the risk is that the outlook for the next few quarters gets worse before it gets better.”

The top three PC vendors suffered the most, with Lenovo shedding 22.6%, HP shipping 30.9% fewer units, and Dell shipments contracting by 25%. On the other hand, Apple’s shipments shrank by 11.3%, while Asus’s numbers fell by 8.6%, with the rest of the market shipping 14% less year-over-year. Despite being hit the hardest, Lenovo, HP, and Dell still maintained their lead at 23.8%, 16.5%, and 12.1% market share, respectively.

Even though other industry leaders, including Micron, say that the situation will not improve for the next few years, Acer CEO Jason Chen went against the grain and said that these fears are just being hyped to protect the margins of memory chip makers. He estimated that PC prices will decline by the latter half of 2027 as Chinese memory chip capacity comes online, with only high-end parts like LPDDR5X-9600 and niche CPUs such as the Nvidia N1 and N1X remaining in short supply.

It's a reasonable assessment that everyone and their dog is tired of Electron-based desktop apps that pack a full web browser and waste gobs of RAM. Spotify lovers now have a reprieve from the memory blues in the form of the Spotifast client.

Spotifast is an OS-native application written in Rust, with an emphasis on lowering memory consumption and CPU utilization. The author claims that the app ought to use 150-200 MB of RAM, compared to the usual 600 MB to 1 GB that the official application chews through.

By default, Spotifast offers a reasonable facsimile of the standard Spotify UI, though with additional features including an EQ-like visualizer on the play bar, and dozens of keyboard shortcuts and playlist management features.

The alternative client also packs a bevy of add-ons, including dark, light, and custom themes, Milkdrop visualization support, and a Winamp mode that turns Spotifast's UI into the much-beloved player.

There's even support for Winamp skins in the .wsz format, too. Those features may be tugging at nostalgia, but they're also a breath of fresh air in this age of excessive minimalism.

To use Spotifast, you'll need to have a Spotify Premium account, as presumably the ad delivery of the free version is tied to the official client. Once installed, you'll configure Spotifast as a connected device and grant it permissions to your account.

For now, there's no support for lossless audio, but that's subject to change — the librespot library underpinning Spotifast's playback doesn't yet support DRM'd lossless files, but might add the feature at some point, as popular demand seems quite high.

You can download Spotifast for Windows, macOS, and Linux and let your machine enjoy some additional free RAM. Since the client is quite new, you might run into some turbulence — but development is active and going at a fast clip. Predictably, Spotify even extended a job offer to the author, who said they'd prefer to remain independent.

Despite being in the midst of an unprecedented memory chip shortage, it seems that gamers are still willing to invest in their gaming PCs to extract the best performance out of their favorite titles. The September 2026 Steam Survey results show that 42.22% of the surveyed units now have 32GB of system RAM — a 4.77% increase compared to the previous month — while 16GB configurations have shrunk by 3.38%, falling to just 37.82%.

We’ve also seen increases in “weird” memory configurations — 24GB has grown to 2.56%, increasing by 0.34%, while 48GB inched up to 1.46% after a 0.26% increase.

This comes as a surprise, as some manufacturers have reintroduced laptops with 8GB of RAM even as Microsoft called 16GB the new “practical starting point,” and recommended 32GB as the future-proof “no worries” configuration for gaming. It should be noted, though, that the company quietly erased this suggestion after it released 8GB base models for its Surface laptops a few months later.

It’s quite possible that memory capacities were always destined to increase for gamers, especially as titles become more demanding. Minecraft, which hasn’t updated its system requirements for 17 years and is known for being potato-PC-friendly, even increased its recommended memory to 16GB earlier this year, forcing players on older systems to switch to the Java Edition or play retro games instead. Because of that, the memory shortage may have merely postponed the inevitable reign of 32GB RAM on gaming PCs.

Another metric we’ve been following in the survey results is AMD’s slow but relentless march toward taking away Steam Survey market share from Intel. Team Red’s 48.37% market share across all platforms is the highest we’ve seen so far this year, with Team Blue now at just 51.63%. The May 2026 Steam Survey showed AMD at a little under 45% — at this pace, it’s possible that it will overtake Intel in just a matter of months.

If we break it down by operating system, 52.59% of Windows users are on Intel, while 47.41% use AMD. Intel may have an advantage here compared to the overall result, but it’s just a tiny margin, and the trend shows that AMD is gaining ground month after month. The difference between Intel and AMD is more glaring when it comes to Linux users, with an overwhelming 66.18% preferring Team Red over Team Blue’s 33.71%.

The Steam Survey is far from scientific and may not even reflect the broader movement of the overall PC market. But with Steam reporting a peak of more than 38 million concurrent players at the time of writing, the survey still offers a useful snapshot of what’s happening in the gaming PC market.

A YouTube channel best known for its skillful graphics card fixes has published its first RAM module repair video. Tony from NorthWestRepair’s latest video shows his attempts to mend a pair of high-capacity DDR5 sticks worth a purported $16,000. It isn’t the repair skills that are newsworthy here. Rather, it’s the shift in economics that makes the chuck-it-and-replace-it attitude to bad RAM a philosophy that simply doesn’t apply in 2026. The impact of the AI-pocalypse means that spending a couple of hundred dollars on repair labor to save a several-thousand-dollar DDR5 DIMM is now sensible. If you can repair RAM, you can now start a business.

Two DDR5 sticks were sent in to Tony, described as having physical damage. They are both ECC sticks, meant for servers, one with 128GB and the other with 256GB of DRAM ICs onboard. Tony sounded happy at the start of the video, as this is an excuse to use his Unified DDR Flasher Main Board, for which he had just acquired an RDIMM extension that works with these server sticks.

Initial close physical inspection didn’t reveal any conclusive evidence of the source of the problems. So, it was hoped electrical tests would provide more clues. A data line tester didn’t highlight any issues, though. Tony used flux and hot air to reflow the solder on the first DIMM, which is a far simpler process than a reball (where all the memory ICs are taken off, cleaned, and given new solder balls). Initial signs were that the module was now working OK. So, he moved to the next DDR5 DIMM.

The second DIMM “may have a faulty PMIC chip,” which is why it seemed more severely broken than the first module, Tony indicated. Powering on a system with this DIMM inserted showed no signs of life, and the DIMM didn’t even warm up (thermal camera checks). That contrasts with the first fix.

Because this DIMM is completely dead, Tony did some work on the non-DRAM chips like the PMIC and SPD EEPROM first. Then he decided to reflow some other chips, including memory ICs, like before, while the board was warm. Some ICs were also reballed after inspection, making Tony suspicious of them.

The repairer found a short circuit via voltage injection and thermal camera monitoring. This was fixed with a new capacitor and by fixing the short on the damaged edge of the PCB. Finally, a new PMIC chip ended the quest, and this second DDR5 DIMM powered on and trained successfully.

The repair is good to see, saving these valuable components from e-waste. However, the bigger picture is that repairing memory modules could now be a viable business. Previously, it didn’t make sense to spend a hundred or two on labor to fix a DIMM that would cost about the same or even less to replace with a new one. Now the repair fee might be just a fraction of a replacement price.

Micron released its fiscal Q4 2026 financial results on Wednesday, expectedly setting another record for revenue with $54.23 billion for the quarter, up nearly five times since the same period last year. Micron also hit a record 87% gross margin, the largest contributor to which was Micron's Mobile and Client (consumer) business unit. Further, Micron's client business was the only one that shipped less memory last quarter, despite bringing in the highest operating margin at 88%.

Micron's margins overall are up significantly year-over-year; Core Data Center surged from 25% to 85%, and Automotive and Embedded have climbed from 20% to 79%. The Mobile and Client unit also saw significant growth, with a 29% operating margin in fiscal Q4 2025, and now a margin of 88%. Cloud Memory margins grew, though not to the same extent as other units, moving from 48% to 76%.

The gross margins are interesting to look at, too. In a financial statement, the gross margin equals revenue minus cost of goods. Operating margin, on the other hand, equals revenue minus cost of goods and all other operational expenses. The operating margin simply excludes taxes and interest.

The gap between gross and operating margin is what's interesting in the breakdown above. The Mobile and Client unit has the smallest gap, with only a 2% difference. The Core Data Center unit matches the Mobile and Client unit with a 90% gross margin, but it has a lower operating margin at 85%. In other words, the cost of running Micron's consumer business is extremely low relative to the amount of revenue it currently generates.

It also saw the lowest amount of growth for the quarter, with revenue up 14% quarter-over-quarter. Micron says this was "driven by higher pricing, partially offset by lower bit shipments." Out of Micron's four business units, the Mobile and Client unit was the only one that shipped less memory in the past quarter.

For clarity's sake, a bit shipment is just a shipment. Micron measures shipments in bits rather than units. It's the capacity Micron has shipped in a quarter, not the actual number of DRAM or NAND chips.

Outside of Mobile and Client, Micron attributes higher revenue to higher pricing and bit shipments. The situation in the Mobile and Client unit echoes a sentiment we've heard elsewhere: growth in the consumer market is still happening, but it's driven by higher pricing, not growth in shipments.

Earlier this year, Intel's David Zinsner, chief financial officer, attributed a 13% YoY growth in Intel's consumer business to higher average selling price (ASP), not increased unit sales. Zinsner clarified that Intel "thought we had seen some inflation on our cost and needed to pass that on to the end customer."

Micron's outlook for fiscal Q1 2027 has revenue set at another record of $61.5 billion ± $1.5 billion, with gross margin rounding from 87% in fiscal Q4 2026 to 86.25%.

Another record quarter signals more squeeze on the DRAM and NAND markets. Echoing rival SK hynix, Micron says it expects memory and storage to be "much tighter" in 2027 and 2028, claiming that the company expects the industry to be supply-constrained in both years. That's despite a growth in supply that Micron anticipates.

The company says it expects industry NAND bit shipments to grow in the mid-20% range, and DRAM bit shipments to grow in the low-20% range. The industry broadly will produce more memory over the next two years, says Micron, but that still won't keep pace with demand.

Worrying still is this line in Micron's earnings slides: "we do not have line of sight to when supply and demand will return to balance." However, the company says it plans to increase its capital expenditure (capex) in fiscal 2027 compared to its prior estimates.

A "majority" of that increase is set aside for construction of additional clean room space, which Micron has set for 2028 through the end of the decade. Hopefully, that additional clean room space coming online will ease supply constraints, but we're still a long way from that point.

Micron said during its FY 2026 earnings call that RAM and storage chip shortages will worsen in 2027 and 2028, even as it announced a record gross margin of 86.25%. CEO and chairperson Sanjay Mehrotra said that the company has already sold most of its capacity for next year and that customers will have to pay more compared to 2026.

“In calendar 2027 as well as 2028, we see demand exceeding supply. In fact, we see greater tightness in the industry in 2027 and in 2028 versus 2026. Overall, supply-demand environment is only getting tighter,” Mehrotra said. “We do not have line of sight to when supply and demand will return to balance.”

The memory and storage industry is not holding back on increasing production, though, with Micron saying that NAND and DRAM shipments are expected to grow in the low-to-mid 20s percentage range for the next two years. However, it seems that this is not enough to match growing demand, as it expects “the industry to remain supply constrained in both years.” Still, it seems that manufacturers are prioritizing HBM demand for AI data centers, with the company expecting shipments of these chips to grow faster than conventional DRAM.

Micron and other chip manufacturers are bringing new factories online to increase output, but it’s going to take years before they can start producing chips. But even as we’re amid an unprecedented multi-year memory chip shortage, Micron also announced record financial guidance. It forecasted a record $61.5 billion FQ1 revenue and a gross margin of 86.25%, implying a gross profit of more than $53 billion. After accounting for an estimated $2.06 billion in operating expenses and a tax rate of around 15.5%, the company said its earnings per share sit at $38.15, plus or minus $1.00, for approximately 1.15 billion shares.

These are record numbers, but it’s not surprising given the amount of money being poured into AI data centers. It has gotten to the point where the memory workers from Samsung and SK hynix have demanded and received bonuses worth hundreds of thousands of dollars, with Micron’s workers in Taiwan threatening to strike if they do not receive a bigger slice of the AI pie. While this is good news for the average employee from these big companies, it’s unfortunately bad news for the average person who must pay for RAM and storage at higher prices.

Micron’s prediction goes directly against the Acer CEO’s prediction that PC prices will decline by late 2027, especially as Chinese RAM chips enter the market and consumers simply refuse to pay more for expensive memory chips. We can only wait and see which of these CEOs will be correct when it comes to DRAM and NAND pricing.

A PC RAM maker has honored its guarantee promises despite the memory kit in question’s price rising eightfold since it was bought. This is news in 2026, as we’ve heard of so many companies dealing with AI-inflated component pricing refusing to replace items, instead refunding the original purchasing price despite the products now being worth many multiples of the original price. These glad tidings come via Redditor Double-South8863, who says their $150 G.Skill Trident Z5 Neo RGB 64GB DDR5-6000 RAM kit, now priced at $1,200 on Amazon, was back at full capacity after the company replaced the stick. They received the replacement within two weeks.

“I will never buy any RAM other than G.Skill for as long as I live,” pledged Double-South8863 on Reddit. They informed their fellow social media posters that one of the 64GB RAM kit’s sticks died at the beginning of September. After some A/B testing, they were sure one of the 32GB sticks was dead.

On September 8, about a week after the issue first reared its head, Double-South8863 decided to start an RMA process and get the dud G.Skill Trident Z5 Neo RGB 32GB DDR5-6000 stick replaced. They remember buying this highly desirable RAM kit online in May 2025 for the princely sum of $150. Now it is worth a king’s ransom at $1,200 on Amazon, and price tracker sites show it's even been as high as $1,300.

Perhaps the Redditor was aware of the reports of companies and their dastardly deeds regarding RMAs, as they are active on the PCMR subreddit. However, they optimistically went ahead and completed the RMA paperwork, then received instructions, including a shipping address to initiate the warranty exchange. Double-South8863 says they mailed the misbehaving memory module back to G.Skill on September 15. The Redditor’s post celebrating G.Skill’s customer service, proclaiming that they were now a “customer for life,” was published on September 26.

If you check the G.Skill site, you will note that this RAM-first firm still offers a limited lifetime warranty on all its popular RAM kits. Please note that, according to the official terms, this lifetime warranty “automatically terminates upon discontinuation or end-of-life ("EOL") designation of that specific model by G.Skill.” That means you shouldn't expect to swap out a faulty DDR5 module for a replacement for the whole of your natural life.

PC enthusiasts and DIYers are having a hard time right now as several key components required for performance builds are at all-time-high pricing. Meanwhile, those with a working setup pray that nothing will go wrong with the precious equipment they already have. Sadly, things do break, some components more than others. However, warranty obligations seem to have come under increased strain in recent months as consumer product scarcity means component makers can’t or won’t follow RMA norms that had been established for decades. Some of the worst cases we’ve seen involve PCs and component makers trying to refund the original (low) prices paid, substituting failed parts with non-equivalent parts, or even worse.

Micron is reportedly pulling the plug on its 2 GB (16Gb) GDDR7 memory chips, ending production and sales of both the 28 Gbps and 32 Gbps variants. According to an X post by UNIKO’s Hardware, the chips — some of which shipped on some GeForce RTX 50 graphics cards — are now designated as “End of Life” on Micron's site. Tom’s Hardware can confirm that the pages for module norms return “No results found.”

Micron just began supplying its 2GB GDDR7 to Nvidia earlier this year, with Samsung and SK Hynix being the main GDDR7 suppliers. As a result, Micron's 2GB module only shipped on a few Nvidia models, such as retail variants of the GeForce RTX 5060. Samsung and SK Hynix cover the vast bulk of 2 GB GDDR7 modules for the standard RTX 50 retail lineup, so the risk of immediate shortages is minimal. Micron’s uncompetitive position in the 2 GB segment also appears to have made a fast exit logical to free up fabrication capacity.

The company is reportedly shifting its focus toward higher-density 3 GB (24 Gb) GDDR7 chips. These larger packages are considered impractical for Nvidia's RTX 50 lineup because they are more expensive and result in less conventional consumer memory capacities. However, they yield higher profit margins and are actively utilized in Nvidia's high-end RTX PRO Blackwell GPUs tailored for generative and agentic AI workloads.

Micron’s decision follows the ongoing trend of memory suppliers prioritizing AI-facing technologies over their consumer and retail counterparts. The company exited its Crucial consumer memory and SSD business earlier, explicitly saying that surging AI data-center demand had prompted it to prioritize larger strategic customers in faster-growing segments.

Memory prices are at record highs due to demand from the AI sector and are not going to drop any time soon. In fact, the cost of manufacturing memory chips on a per-area basis can be higher than the price of silicon processed using TSMC's N2 and N3 fabrication technologies, which are used to make compute chips, according to an observation made by Kurnal Insights. While the comparison has merit, it has an important caveat.

Based on media leaks, Kurnal from Kurnal Insights considers that a 300-mm wafer processed using TSMC's N3 technology costs $20,000, which translates to approximately $0.283 per mm² when the wafer price is divided by its area. For TSMC's N2, the analyst assumes a considerably higher wafer price of $30,000, or around $0.424/mm². These calculations are based on unofficial information and do not account for unusable wafer edges, dicing, test structures, defects, or yield, so they should be viewed as nominal wafer-area prices rather than the actual price of usable silicon.

The calculation for DRAM works differently. Kurnal assumes a DRAM price of $1.50 per Gb and then multiplies it by the bit density of different generations. At 0.219 Gb/mm², 1y DRAM works out to $0.329/mm², whereas 1z DRAM with its 0.273 Gb/mm² density reaches $0.410/mm². Finally, 1b DRAM at 0.436 Gb/mm² produces a figure of $0.654/mm², considerably higher than the nominal $0.424/mm² calculated for an N2 wafer.

There is an important distinction here. The N2 and N3 numbers represent assumed prices charged by TSMC for processing a wafer, whereas the DRAM figures represent the potential selling value of the memory contained within a square millimeter of silicon, thus illustrating how much revenue a DRAM maker can theoretically get from a given die area at the assumed memory price.

Interestingly, Kurnal Insights' $1.50/Gb assumption is almost exactly in line with the current spot price of DDR5 eTT memory. According to DRAMeXchange, 16Gb DDR5 eTT chips carried a session-average price of $24.80 on September 21, equivalent to $1.55/Gb. At that price, 1b DRAM with a density of 0.436 Gb/mm² would be valued at approximately $0.676/mm², just 3% above Kurnal's $0.654/mm² estimate.

It goes without saying that producing DDR5 memory is considerably cheaper than making logic chips using TSMC's N3 process technology. However, with DRAM in short supply, memory makers are getting considerably more money for their silicon than they did historically.

There are a few important caveats that make the comparison somewhat less straightforward. The calculations do not account for packaging costs, with logic requiring more expensive techniques. Additionally, TSMC manufactures chips on a contract basis, and the actual price of a processed wafer depends on the volumes, customer, and other commercial terms. Thus, comparing estimated TSMC wafer prices with DRAM spot prices is not exactly an apples-to-apples comparison. Even TrendForce notes that DDR5 spot procurement remains limited and transactions are sporadic, which means spot prices do not necessarily reflect the prices at which Micron, Samsung, and SK hynix sell the bulk of their DRAM.

Therefore, contract DRAM prices would provide a considerably better basis for an economically meaningful comparison. However, we do not know contract prices, and while they are clearly higher than historical memory prices, they may not be as high as spot prices. To that end, we cannot state for sure that DRAM makers get more money for their wafers than TSMC does for its logic wafers.

Raspberry Pi users are effectively being blocked from swapping the RAM chips on their SBCs for repairs or upgrades. In a reply on the firm’s forums, Raspberry Pi Engineer & Forum Moderator PhilE told users that the company has been “locking devices to their original RAM size” for some time. This decision was made for the sake of device reliability, says the rep. However, the move seems to go against the grain for a company so involved in the maker, DIY, and tinkerer side of computing.

PhilE explains the problem that faced Raspberry Pi and some users, airing the company’s side of the argument. “If labor is cheap enough then there may be a minor financial gain in buying a part with say a 2GB part, swapping it for an 8GB part of dubious origin, and reselling it as an 8GB device,” says the forum mod. “However, this brings an element of risk to the user - the board hasn't been tested by us - and is a potential support burden for us, with customers complaining of unreliable devices. We therefore remove the commercial incentive by locking devices to their original RAM size.”

In addition, the Pi’s firmware currently “program in some other device attributes, meaning that switching parts of the same size may not work,” says PhilE. This isn’t great for genuine users who might want to tinker with or upgrade the RAM chips or have to replace an IC for repair. The forum mod underlines the effective block by telling would-be RAM MacGyvers to “don't waste your time trying - it won't work.”

Some readers might feel sympathetic towards Raspberry Pi’s RAM tinkering blockade, given PhilE’s reasoned explanation. One surprising aspect of the decision, though, is that the firmware locks of RAM IC swaps began to roll out in updates from late 2024 onwards. So, this change was made well before the crazy RAM chip pricing upswing precipitated by the AI data center boom. Also, it means that if you want to sidestep this RAM tinkering block, you would need to grab and flash a pretty old firmware to your Pi model (if available).

Naturally, the Pi community isn’t celebrating this RAM upgrade/repair block. Some high-profile Pi advocates like Jeff Geerling suggest that implementing a ‘warranty bit’ (similar to older models), or a one-time firmware flag to void support for modified boards, would have been a more agreeable path for Raspberry Pi to take. Here’s a lookup table that you can use to check your Pi’s factory RAM configuration.

China's DRAM champion CXMT has begun mass production using its 5th-generation DRAM process technology.

CXMT says its new process technology — G5, as the company calls it — reduces DRAM’s active-area half-pitch to 11.95nm using quadruple-patterning lithography. The 11.95nm half-pitch corresponds to an active-area pitch of 23.9nm, something that puts this particular dimension roughly in the range of other advanced 10nm-class DRAM technologies. However, it cannot be directly translated into a conventional DRAM node designation. Separately, CXMT says its DRAM-optimized high-K metal gate (HKMG) process reduced the height of the core cell array to 6,762nm.

The company also says it modified its process flow and introduced unspecified new materials to enable storage capacitors with a depth-to-width aspect ratio of about 45:1.The figure is certainly difficult to compare directly with competing DRAM process technologies, but SK hynix says that capacitor aspect ratios will need to exceed 100:1 as DRAM critical dimensions eventually fall below 10nm.

A 45:1 aspect ratio means CXMT’s storage capacitors are 45 times deeper than they are wide, which is what enables the company to reduce DRAM cell area and fit more memory arrays onto a wafer and retail predictable capacity. However, increasingly high aspect ratios make etching, deposition, mechanical stability, and ultimately high-yield manufacturing considerably more challenging.

The first disclosed mass-produced devices using G5 are said to be 24Gb LPDDR5X devices, which have already entered mass production. The chips offer 50% more capacity than CXMT's previous comparable products and are available in two package formats for different mobile-device designs. According to the Chinese report, the 24Gb LPDDR5X products are already entering mainstream Chinese flagship smartphones.

A nanometer caveat?

Meanwhile, there are some important caveats.

First up, CXMT's 11.95nm figure represents the active-area half-pitch rather than a conventional process-node designation, so calling G5 a 12nm process is a large degree of simplification at best.

Secondly, the two revealed physical dimensions do not mean technological parity with the latest DRAM processes from Micron, Samsung, and SK hynix, as density, capacitor scaling, transistor characteristics, power consumption, and, arguably most importantly when it comes to commodities, yields matter.

Thirdly, CXMT says G5 provides at least 50% more gross dies per wafer than G4, but without actual numbers, this is obsolete. CXMT also did not disclose yields, which makes it impossible to determine the increase in productivity, not to mention known-good dies or the actual manufacturing cost per bit. Yet again, even a claimed 11.95-class DRAM node is an achievement.

Acer chairperson and CEO Jason Chen is expecting that prices for components will start reversing in the latter half of next year. According to DigiTimes, Chen told reporters that only high-end DDR5 parts like LPDDR5X-9600 and niche CPUs like Nvidia’s N1 and N1X chips are in short supply. Since supplier pricing lags consumer pricing by about a few months, he also added that PC prices will still rise between 5% and 20% towards the end of this year, plateau by the first half of 2027, before finally declining after years of AI-drive hikes.

The AI boom has driven shortages for various PC components, beginning with GPUs in late 2022, before expanding to memory chips by late 2025. This made memory prices climb 500% in 12 months, although the increases have seemingly cooled as consumers refuse to absorb further hikes. Some memory companies like SK hynix are saying that the shortage will be worse next year and that it won’t be until 2030 before pricing will start to normalize. The Adata chief even said that the DRAM shortage would last another 10 years. This is plausibly true, especially as HBM demand from AI hyperscalers remains strong, and the various memory chip fabs under construction aren’t expected to come online until the 2030s.

However, Chen disagreed with this take. He said that the major memory suppliers naturally want to keep their margins as high as possible for longer, “so they keep putting out the message: let me tell you, prices won’t come down until the year 20-whatever.” The Acer chairperson argued that there’s already ample memory and SSD supplies, while the purported CPU shortage is now limited to specific models. He also added that Chinese memory makers churning out cheaper alternatives would disrupt the market — something that SK Group Chairman Chey Tae-won feared. In fact, Acer, alongside HP and Asus, has started using CXMT chips in some of its products, while some Lenovo models sold in Germany were found to have YMTC SSDs.

Nevertheless, he says that price increases are becoming their own trend, saying that SSDs, PCBs, and fiberglass cloth used in motherboards are seeing their own hikes. “A lot of people come and tell us they want to raise prices, and we find it a bit baffling — this needs to go up, too?” Chen said to the reporters.

The overall tenor from Chen is good news, though, if computer manufacturers could finally lower prices after years of shortages and expensive parts.

It's been quite a week over on Tom's Hardware Premium: let's go through all of the articles that we've published throughout this week so far.

Kicking things off with a bang, Valve officially released the Steam Frame, its latest VR headset, which adds functionality that allows the headset to act as both a standalone and PC VR headset. Our VR expert Brandon Hill reviewed the headset itself and managed to interview the engineers at Valve about their efforts on the new hardware and the software powering the company's next generation of Virtual Reality.

• Valve Steam Frame interview — why it costs up to $1,300, Snapdragon power, and 10x foveated streaming

Reporter Chris Stokel-Walker investigated the deepening DRAM and NAND crisis, honing in on how SLC and NOR Flash are the next products that have been affected by the ongoing demand for AI. Featuring expert interviews and a grim outlook on the electronics the world relies on, he explored how the ongoing data center gold rush is leaving other supply chains decimated in its wake.

• NOR Flash and SLC NAND production are under threat as capacity gets routed to more profitable products — 'severe undersupply' threatens everyday electronics

Nanya-backed company PieceMakers debuted on Taiwan's stock market this week, making a bold bet that it's not just HBM that's useful for integration in AI devices. Instead, the company offers a different look at how hybrid-bonded chips might also be useful for inference chips. We've broken down exactly how the company views the future of memory for inference accelerators.

• PieceMakers bets edge AI devices will diverge from reliance on HBM — custom-designed memory fuses DRAM stack directly to the processor using hybrid bonding

Next up, AI leaders butted heads this week over alleged safety concerns about new, advanced models. It all started with one ex-OpenAI and Anthropic worker warning that the technology could endanger human existence and 'kill us all' by 2030. In response, AI leaders like Dario Amodei and Sam Altman have committed to delivering safe AI and 'pacing the frontier' of AI development, while figureheads like Mark Zuckerberg and Jensen Huang argue against the claim that AI models would do such drastic things, so long as they are developed responsibly.

• AI leaders clash over safety fears after Anthropic whistleblower says AI could 'kill us all' by 2030 — OpenAI, Anthropic and xAI figureheads call for external governance, while Jensen Huang says worries are 'made up'

Despite the company's CEO telling us all that responsible AI development is indeed necessary, Anthropic published its economic forecasts on how widespread usage of Artificial Intelligence might impact the economy. Despite forecasting that GDP growth in the U.S. might shoot up by as much as 32%, it also warns that other 'knowledge workers' might be left in the lurch, with unemployment rising as the technology threatens to displace professional workers.

• Anthropic says AI can boost U.S. GDP by 32%, up to $44.4 trillion in four years — economics model predicts that displaced employees 'may have to switch to jobs like electrician and nurse'

An investigative report has detailed exactly how advanced AI accelerators are reaching Chinese shores through a series of shell companies. We go over the specifics of two reports and see exactly how supposedly export-controlled accelerators are allegedly being funneled through illicit channels in an economy where compute and powerful silicon create AI kingmakers.

• Investigative report details how export-restricted Nvidia AI chips reach China — public records reveal how Chinese entities skirt US sanctions

Despite the country's access to advanced AI accelerators through illicit channels, some leading frontier companies out of China are also allegedly using distillation attacks to learn how leading Western AI models think, and how extracted thinking traces and grey-market user logs are being used to train cheap models originating from the Eastern hemisphere.

• US frontier AI companies warn authorities over sophisticated distillation attacks — China warns of 'countermeasures' if America tries to constrain domestic AI models

If you'd like to read any of the articles above and gain access to Bench, you'll need to purchase a subscription. Your support goes a long way in helping us to publish deeper, more insightful stories that might otherwise fall outside of our regular areas of coverage.

The memory chip that makes a router remember how to be a router is a world away from the sleek GPUs that are attracting eye-popping investments and alarming valuations, as well as sending stock markets shooting upwards. They’re small, historically have been cheap, and are based on technology that has been around for years.

But despite being a world away from GPUs, the price of these often overlooked chips is skyrocketing, thanks to the all-encompassing memory price crisis caused by the AI boom.

While public and press attention has focused on the expensive chips, there’s an equally large impact beginning to be felt on older, less attractive memory chips. HBM is vital for AI accelerators, while DRAM and high-capacity NAND are being swallowed up by rapidly expanding data centres. A June report from Morgan Stanley reckons memory prices have risen more than sixfold over the last year, breaking with decades in which memory became steadily cheaper as production increased.

It’s not just HBM and DRAM that’s being affected. The crunch is also spreading down into much older forms of memory, including NOR flash and single-level cell, or SLC, NAND. Morgan Stanley expects NOR flash to remain undersupplied through 2026, while JPMorgan has warned its forecasts don’t fully capture a potential supply crunch in SLC NAND. The effects are already showing up in prices. TrendForce says contract prices for both NOR flash and SLC NAND rose by more than 100% during the first half of 2026, while it expects SLC NAND prices to rise another 120% to 170% in the second half of the year compared with the first half.

Picking winners

An increase in prices will have an impact on the tech we use day in, day out. NOR flash is commonly used to store boot and program code, and is a core part of automotive, industrial, and networking equipment. SLC NAND is deployed across a number of uses because of its reliability and endurance when placed in embedded hardware with long lifespans.

Both are vital. And both are being overlooked in favour of higher-margin chips — pushing the supply crunch to tech that previously never faced any issues. “The SLC NAND market is probably under a billion dollars a year,” said Jim Handy, a semiconductor and SSD analyst at Objective Analysis, in an interview with Tom’s Hardware Premium. That tiny scale adds up to a big problem, because it disincentivises any new investment.

“What you've got going on is a purely economic phenomenon,” said Handy. Hyperscalers and cloud providers are “all trying to outspend each other”, pouring unprecedented sums into semiconductors to build AI infrastructure. That willingness to spend big means the most profitable customers naturally move to the front of the queue.

Companies including Nvidia, Broadcom and Marvell need huge amounts of semiconductor manufacturing capacity for chips destined for AI systems. “They’re sucking up all of the wafers,” says Handy. “And then the companies who make NOR flash and SLC are having a hard time getting wafers to build their product, and so they have to raise prices.”

The problem is even starker in the NAND market. Bryan Ao, research manager at TrendForce, told Tom’s Hardware Premium in an interview that major NAND manufacturers, including Micron, Kioxia and SK Hynix, have been cutting the wafer capacity devoted to SLC because they can make considerably more money using it for newer NAND technologies. Ao estimates that a 12-inch wafer devoted to mainstream NAND can ultimately generate close to $20,000 in revenue. Use the same space to produce SLC and the figure is closer to $6,000 to $8,000.

Even if they wanted to, smaller SLC suppliers in China and Taiwan can’t just spin up new production. Lead times for some semiconductor manufacturing equipment have stretched to between 12 and 15 months, said Ao. The result is what he calls “severe undersupply”.

Big prices, big returns

BNP Paribas forecasts the average NAND price will hit $279.50 per terabyte during 2026, up from $73.10 in 2025. JPMorgan expects the memory shortage to persist for at least another two years, with customers getting just 70% to 80% of their orders fulfilled. TrendForce says manufacturers are shifting capacity towards advanced, higher-value memory products, with mature processes increasingly squeezed as a result.

There are some alternatives available. Kioxia says its serial SLC NAND is an alternative to NOR flash. But moving an existing industrial or networking product onto a different chip can itself require engineering work and qualification. Nor is there much incentive for memory manufacturers to fix the problem by building new SLC capacity – which means manufacturers are unlikely to invest billions in capacity whose useful market may disappear. That creates an unusual trap: there may not be enough demand to justify new factories, but there is still more demand than the shrinking supply can satisfy.

Hardware manufacturers can eat the higher component bill and accept lower margins, or pass it on. “We'll just have to either have lower margins, or we'll have to raise the prices to the consumer,” Handy said.

An ongoing issue

The problem is one that seems to have no solution – at least in the short term. Ao expects memory prices to remain high over the next five years and does not expect them to return to 2023 or 2024 levels. That broadly fits with the structural nature of the shortage identified by TrendForce, which says there are no significant capacity expansion plans for NOR flash or SLC NAND.

Handy sees one possible way out, but it is hardly reassuring. “As long as the race between the hyperscalers keeps up to spend, then it will continue to be an issue,” he said.

Handy compares the AI buildout to the internet infrastructure boom of the late 1990s. Rather than enough capacity eventually arriving to restore balance, he thinks spending may simply overshoot what the market can economically support.

“I'm expecting the same kind of a thing to happen here that we've got too many people spending too much money on AI, and not really making any return on it yet,” he said.

Until then, the least exciting memory chips in a computer may become some of the hardest to replace. Or, as Ao put it: “Pretty much we have to get used to this high price, no matter which segment of memory.”

Micron this week introduced its first 512GB DDR5-9200 memory module that is designed for servers used for applications that demand a lot of memory. The new modules — which are currently being validated by AMD and Intel with their next-generation server platforms — will enable server makers to build machines with up to 12TB of fast memory. What remains to be seen is the price of such modules and servers.

To build its 512GB DDR5 RDIMM, Micron uses advanced packaging that stacks multiple DRAM dies vertically and connects them using through-silicon vias (TSVs). The company does not disclose which memory devices and how many of them it uses, but claims that a single 512GB RDIMM consumes over 60% less operating power than four 128GB modules — based on 16.0W for one 512GB module compared with the 44.2W total for four 128GB modules — which suggests that we are dealing with fairly advanced ICs.

Micron's 512GB module is not the industry's first 512GB DDR5 RDIMM — that achievement belongs to Samsung — but it is certainly the industry's first 512GB module certified to operate with a 9200 MT/s data transfer rate with standard 1.1V voltage (which implies on usage of Micron's 16Gb DDR5-9200 devices made on its 1γ (1-gamma) fabrication process that uses EUV lithography and consumes 20% less power than predecessors, though we are speculating).

Truth to be told, 512GB DDR5 memory modules are rather niche products, which is perhaps why Samsung's 512GB RDIMMs formally introduced in 2021 have not become widespread even after AMD and Intel introduced processors with over 100 cores. Micron positions its 512GB DDR5 RDIMM primarily for servers running analytics, in-memory databases, simulations, virtualization, agentic AI, and other workloads demanding high-core-count processors and plenty of memory. As processors with 200 or more cores emerge, 512GB modules may become more relevant as 12TB of memory in a server running two 256-core CPUs means 24GB per core, which no longer looks particularly excessive for applications like in-memory databases, analytics, or caching.

Micron claims that in memory-constrained Spark Support Vector Machine (SVM) analytics workloads, systems featuring 512GB memory modules can provide up to 1.4 times the performance of configurations equipped with 256GB DDR5 modules, though the company does not disclose how much memory in total these systems use. Micron also says the higher-capacity memory can increase throughput and concurrency for memory-intensive database and caching applications such as RocksDB and Redis.

AMD and Intel are working with Micron to qualify the new modules for their upcoming server platforms. Micron plans to begin volume production of its 512GB DDR5 RDIMMs sometime in the second half of 2027 and intends to align the schedule with customer requirements.

One of the more pressing questions about Micron's 512GB DDR5-9200 memory modules is their price. A 256GB DDR5-6400 RDIMM currently retails for around $19,000. Given the unique proposition that 512GB modules have for memory-constrained applications, such modules can cost significantly more than 256GB memory sticks, which will not help their broad adoption.

With the ongoing memory shortage, smaller smartphone and laptop manufacturers are reportedly looking at new ways to tackle the problem. While some are changing how they design their products, others are placing orders months in advance and are even forced to test incoming memory chips to make sure they are not fake. A Reuters report suggests that more than the price, availability has become a bigger problem, with manufacturers struggling to secure enough chips in the first place. Still, device makers like Fairphone say that memory now makes up nearly 60% of a device's bill of materials.

Back in July, memory maker SK Hynix’s CEO Kwak Noh-jung said that 2027 will be the "worst year" for the ongoing memory shortage and expects the memory crunch to last until 2030. For smaller manufacturers, however, simply paying more for memory isn't always enough. The situation is particularly difficult for budget-oriented phones and laptops, where memory makes up a much larger portion of the overall product cost.

According to Raymond van Eck, CEO of repairable-phone maker Fairphone, memory can account for almost 60% of the bill of materials in phones costing around $400. That itself is worrying, as a recent Counterpoint Research report expects global smartphone shipments to fall 13.9% this year to 1.08 billion units, marking the largest annual decline on record.

Finnish phone maker Jolla has designed two motherboard versions, allowing it to switch between combined packages for discrete chips depending on availability. The company is also testing samples from every batch it receives to ensure new memory isn't being sold as refurbished hardware.

Similarly, laptop manufacturer Framework has been able to rely on its highly modular approach where customers can install memory salvaged from older laptops or opt for second-hand units, giving the company and its users another way to deal with limited supply. The company is also placing non-cancellable orders well in advance, even when it doesn't know the final price or exact delivery volume.

Back in July, it nearly doubled memory pricing for 32GB and 64GB variants of the Framework Laptop 13 Pro after receiving a cost update from its LPCAMM2 supplier. However, after sourcing new inventory at a reduced cost, the company recently announced a price drop for the same, including retroactive orders that have already shipped.

A computing enthusiast has shared images of a fat stack of DDR4 RAM sticks that they found at home. VastOption8705 told other tech fans on Reddit that they “found 10k worth of RAM sitting in my garage.” We count 30 sticks of DDR4-2666, and three sticks shown separately are all 64GB modules. If they are all 64GB modules, that number of sticks would add up to 1,920GB of RAM…

How did this huge amount of RAM end up in VastOption8705’s garage? The story goes that the Redditor was allowed to keep an old server from their workplace. Such 'generosity' isn’t unheard of, and it might have actually saved the company some recycling fees.

Is server DDR4 useful?

Numerous comments on the Reddit post jokingly pitch for RAM stick donations. But they might be barking up the wrong tree. Looking more closely at the sticks, where the labels are clearly readable, reveals that they are Samsung 64GB DDR4 ECC registered DIMMs (RDIMMs).

These kinds of RAM sticks are commonly used in servers built around Intel Xeon, AMD Epyc, or AMD Threadripper platforms. Sadly for their market value and the folks on Reddit hoping for some spare RAM, they aren’t consumer PC friendly. Even if you have a DDR4-supporting motherboard, these ECC RDIMMs will be both physically and electrically incompatible with your home creator/gaming PC.

Pricing and the Australia question

A quick poke around eBay U.S. listings shows that a single 64GB DDR4-2666 stick like those shown can be bought for between $350 and $425. So, we could roughly value the 30 sticks at $12,000 if a price of $400 per stick were achieved. The OP’s touted $10K valuation wasn’t far off. But if VastOption8705 lives in Australia, as they seem to, and guesstimated the value in Australian dollars, AU$10,000 currently equates to ~US$7,200 – quite low.

If you have spare RAM in your garage, don't share your address on public forums. The best I could find is a pair of 8GB DDR4 SO-DIMMs in my drawer. I also had some 30-pin SIMMs, SDRAM, PowerMac ROMs, and DDR3 modules probably worth just pennies, despite the RAMpocalypse.

Earlier this year, V-Color announced its 1+1 DDR5 filler memory kits to help suspend disbelief and offer psychological salvation against rising memory prices. These kits mix real DDR5 sticks with dummy modules that don't actually have any RAM inside — just working RGB — to give you the illusion of a fully-slotted motherboard. Today, the kit is finally available to buy in the UK and Europe, with just the filler sticks on their own also listed for sale in North America.

V-Color has two different DDR5 products: Manta XSky and Manta XFinity, the latter being the higher-end model. The 1+1 kit is only available for the Manta XSky variant and only in the UK and Germany; not yet in the US. The 0GB kits (where both sticks are dummies) are available in both the Manta XSky and XFinity models across multiple regions. Pricing starts from $43 and goes up to almost $300, so let's break it all down.

In the UK, Overclockers currently has the 16GB 6,000 MT/s CL30 kit listed for 210 GBP, or $285, in black and white colorways. You get a single 16GB stick with those specs and a filler module to occupy two slots on your motherboard. There's a slightly more expensive 16GB 6,000 MT/s CL28 kit as well, selling for 219 GBP, or $297. Once again, you can choose either the black or white color, and you get 1 real stick of RAM and one filler.

• V-Color (1+1) Manta XSky RGB 16GB C30 6,000MHz - Black
• V-Color (1+1) Manta XSky RGB 16GB C30 6,000MHz - White
• V-Color (1+1) Manta XSky RGB 16GB C28 6,000MHz - Black
• V-Color (1+1) Manta XSky RGB 16GB C28 6,000MHz - White

In Europe, using Geizhals, we were only able to find one in-stock listing of the 16GB 6,000 MT/s CL28 kit for 330 Euros, or $384, in the black colorway. The same kit with CL30 speeds can be had for 220 Euros, or $256, but it's out of stock on CaseKing, the one Germany-based store in the entire EU with these products. We'll remind readers that there are no North America listings for V-Color's 1+1 DDR5 kits as of now.

But we did spot plenty of 0GB kits on Newegg and Amazon. These kits don't offer any real RAM whatsoever and are purely meant for decorative purposes. You can only use these if you already have working RAM in your system and two extra slots left to populate on your motherboard. Amazon has the Manta XFinity variant listed for $57 in either black or white, while Newegg is selling the Manta XSky model for $44 in white.

• V-Color Manta XFinity DDR5 RGB Filler Solution - Black (Amazon)
• V-Color Manta XFinity DDR5 RGB Filler Solution - White (Amazon)
• V-Color Manta XSky DDR5 RGB Filler Solution - White (Newegg)

CaseKing in Germany is selling the Manta XSky filler kit for 50 Euros, or $58, but we weren't able to find any other listing across Europe. The prices for these kits across the world are not much higher than their regular, non-filler counterparts, so you might as well spring for these until the RAMpocalypse settles down. Just don't forget that you'd still be limited to single-channel memory with the 1+1 kits, which isn't that big of a deal when it comes to DDR5, especially if you have an X3D CPU.

The saga involving Chinese DRAM maker CXMT's alleged theft of Samsung's trade secrets is going strong. The South Korean court case already includes multiple convictions, two of which carry prison sentences for ex-Samsung engineers. The latest chapter is a doozy, though. Korean publication NoCut News spilled the chips on Project Hefei, a purported CXMT roadmap outlining long-term planning about said technology "acquisitions," personnel poaching, and production tape-out — all key pieces that may have directly led to CXMT's ascension to 10% of the global DRAM market.

According to leaked court documents, the prosecution says that Project Hefei was CXMT's entire DRAM development plan and was spearheaded by the firm's head of development (formerly Samsung's DRAM development lead), around August 2016 — not much longer after CXMT itself was created in June 2016.

In brief, the purported plan was to nab Samsung's Process Recipe Plan (PRP) by September 2016, poach key Samsung engineers by October 2016, have R&D complete in July 2017, and start making DRAM wafers by August 2018 at a rate of 10,000 a month. NoCut says the PRP dataset comprises 620 steps in DRAM manufacturing and includes data on equipment, consumables, and production methods.

The report states that in August 2016, CXMT first attempted to make wafers of 18nm chips by relying on the collective memories of the Samsung engineers it had hired away. Those recollections apparently proved insufficient, so after allegedly gaining illicit access to Samsung's PRP, CXMT prepared its own document in September 2016. The leaked data even included specific equipment suppliers and model numbers.

CXMT's "new" PRP was then handed out to key specialists, many of them ex-Samsung engineers, whom the prosecution says ought to have immediately recognized the data as originating from the Korean firm. The document apparently included notation and notes on process developments that were all unique to Samsung. A convicted ex-Samsung researcher with the surname Jeon, previously sentenced to 7 years in prison for manually copying parts of the PRP before leaving for CXMT, testified in this case as a witness.

The whole CXMT debacle has been playing out in South Korean courtrooms since January 2024 and is arguably far bigger than just "a company stole some tech from another." A decade ago, most of the DRAM market was taken by the Big Three: Samsung, Micron, and SK hynix. CXMT was created in June 2016 in Hefei (hence the project name), with a modest government investment of around $1.9 billion USD, allegedly with no R&D facilities whatsoever or any plan for research.

Going from zero facilities and institutional expertise to DRAM wafer production in little over two years would be an unprecedented feat, and presumably nigh impossible without the alleged IP theft; getting just the memory fab up and running usually takes two to four years, let alone any time for research. The firm claimed in 2019 that it designed its then-new 8 Gb DDR4 chips entirely in-house as a "leapfrog, independent" technology and began selling DRAM chips locally.

Then the AI locusts charged in and ate every chip on the planet. This demand resulted in explosive growth for CXMT, from an estimated 4% of the global DRAM market in Q2 2025 to around 10% in Q2 2016, marking the first time in over a decade that the Big Three held less than 90% of the pie.

Production capacity expanded to three 12" wafer fabrication facilities, expected to churn out a collective 350,000 wafers until the year is done — close to the same figure that Micron produces, of 375,000 to 385,000. CXMT is also planning to open a second fab in Beijing, aiming to produce over 600,000 wafers per month once it's online.

Furthermore, CXMT's gains aren't coming just from its DRAM market share. Revenue grew 716% in Q2 2026 alone, and its IPO on the Shanghai STAR Market in July 2026 saw its stock climb 466%, netting the firm a cool $8.6 billion USD and making it the most valuable chipmaker in the Chinese stock market.

About 70% of that money is reportedly going towards further expansion of DRAM production, rather than pricier, more complicated HBM. However, the firm has supplied HBM3E samples to Alibaba's T-Head and Cambricon, even as Samsung and SK hynix enter HBM4 production.

As of the South Korean prosecution's last tally in December 2025, Samsung's damages due to CXMT's alleged machinations ascended to "at least tens of trillions of won." A back-of-the-envelope extrapolation, considering quite a while has passed, might suggest a figure in the range of ₩40 trillion, or $29.5 billion, and rising exponentially.

The lasting impact on the memory market and technology in general is going well beyond plain number descriptors, though. All things considered, if the allegations are true, then CXMT's machinations resulted in a geopolitical-scale economic event. Dr. Evil would be proud.

The goal of next-generation HBM5 memory specification is to double performance and increase power efficiency compared to HBM4E, Samsung announced at the 'Memory Executive Summit,' an event that precedes 'Semicon Taiwan 2026.' Considering that it is barely realistic to double the data transfer rate of HBM4E in just one generation, the comment made by Samsung may imply that HBM5 will double the number of interface pins to boost bandwidth.

The goal of HBM5, which is currently under development, is to double the performance and improve the performance per watt by 20% compared to the HBM4E generation, according to Choi Jang-seok, the head of the product planning team of the memory business department of Samsung Electronics DS division. Previously, Samsung announced that its HBM5 memory stacks will feature a heat path block (HPB), which will reduce thermal resistance by 20% and simplify cooling of HBM5 modules.

Doubling HBM5’s per-stack memory bandwidth would result in peak bandwidth of around 4 TB/s per stack already in 2028 – 2029. TSMC expects AI accelerators to get to 20 – 24 HBM5/HBM5E per package configurations by the end of the decade, which means that these systems-in-packages will get a whopping 80 TB/s – 96 TB of memory bandwidth just several years down the road.

Although both DRAM makers like Micron, Samsung, or SK hynix as well as developers of HBM controllers and PHYs like Cadence, Rambus, or Synopsys already offer HBM4/HBM4E controllers and interfaces rated for 16 GT/s data transfer rates, the official JEDEC transfer rate for HBM4E will be around 12 GT/s.

If Samsung expects HBM5 to deliver twice the bandwidth of HBM4E, the HBM5 specification must either double the per-pin data transfer rate from 12 GT/s to 24 GT/s, double the interface width from 2,048 to 4,096 bits, or combine a wider interface with a higher data transfer rate. Increasing HBM5 memory stack interface width to 4,096 bits has so far been envisioned by KAIST and Marvell; however, this is certainly not an even semi-official confirmation of the specification's target.

From a performance-per-watt perspective*, widening the interface is generally easier than doubling the per-pin signaling rate. Higher per-pin speeds require faster drivers, receivers, clocks, equalization, tighter timing margins, and a more sophisticated PHY since maintaining signaling integrity at speeds well beyond 20 GT/s is not easy. But while a wider HBM interface moves more bits in parallel at a lower speed per wire, going from 2,048 to 4,096 pins means twice as many TSV/I/O paths, drivers, receivers, bumps, more complicated routing, and extremely complicated base die. So while a 4,096 I/O at moderate speed is probably best for pJ/bit, the interface/package complexity gets so extreme that it may offset the gains. Furthermore, such a wide interface Perhaps a 3,072-bit interface combined with a moderate increase in data transfer rate would be a reasonable engineering compromise, though engineers involved in JEDEC’s decision-making process may think otherwise. In any case, for now, any discussion of HBM5 specifications remains speculative.

Nonetheless, the target to double the bandwidth of HBM4E (2 TB/s per stack) within one generation is clearly a very aggressive one.

*It should be noted that achieving a 20% higher energy efficiency can be achieved not only by increasing performance, but by improving DRAM process technology, optimizing base die, lowering TSV I/O voltages, architectural changes, or power management.

China's DRAM champion ChangXin Memory Technologies (CXMT) has started risk production of HBM3E memory, The Information reports. Although CXMT remains a generation behind the big three memory manufacturers, which are mass producing HBM4, it goes without saying that reaching the HBM3E milestone highlights the company's rapid technological progress.

Specifications of CXMT's HBM3E products are unknown, though keeping in mind that we are dealing with risk production, specifications of actual HBM3E products from CXMT may differ from risk production samples. Meanwhile, general JEDEC specifications are well known: HBM3E modules feature a 1,024-bit-wide memory interface, supports data transfer rates up to 9.6 GT/s per pin, and can stack 8 or 12 memory devices. Depending on the exact speed bins, HBM3E can provide up to 1.228 TB/s of memory bandwidth.

Capacity of actual memory stacks depends on the number of DRAM dies used in that stack: HBM3E products can offer 24GB of capacity using an eight-die stack or 36GB using a 12-die stack when built with 24Gb DRAM devices.

Several Chinese developers of advanced processors are already evaluating CXMT's HBM3E with their processors, including Alibaba Group's T-Head and Cambricon Technologies, according to the report. If testing and qualification proceed as planned, these companies could begin using CXMT's HBM3E in commercial products as early as next year.

Since every HBM package requires multiple large DRAM dies, growing HBM output could consume considerable DRAM manufacturing capacity, which is when CXMT's aggressive capacity expansion will be useful.

CXMT's manufacturing of HBM3E is important for multiple reasons and arguably the HBM3E generation itself matters less than CXMT's ability to manufacture usable HBM at all.

Firstly, HBM is one of the critical components of modern AI accelerators, so if CXMT's HBM3E qualifies with processors from Cambricon, T-Head, and other Chinese designers, China becomes less dependent on Micron, Samsung, and SK hynix for building high-performance AI hardware.

Secondly, despite being a generation behind HBM4, HBM3E is still very capable memory and can provide several TB/s of bandwidth, sufficient for powerful AI accelerators. In fact, many Chinese developers of AI accelerators do not necessarily need HBM4/HBM4E to build useful AI systems.

Thirdly, HBM is substantially harder than making ordinary DRAM. CXMT needs not only competitive DRAM dies, but also high-yield stacking, through silicon vias (TSVs), very fine interconnects, thermal management, packaging, and testing. Reaching HBM3E risk production proves that China's memory ecosystem is advancing beyond simply manufacturing commodity DRAM.

Finally, there is also an important geopolitical angle. Export restrictions constrain China's access to advanced AI processors and HBM, so a combination of Chinese-designed accelerators, CXMT HBM3E, and advanced domestic packaging indicates that China becomes one step closer to semiconductor self-sufficiency.

G.Skill, which makes some of the best RAM on the market, has announced the Flare X5X series of DDR5 memory kits. Like the Trident Z5 NeoX, the new Flare X5X leverages AMD's EXPO ULL (Ultra Low Latency) technology, which features optimized memory subtimings to maximize performance on Ryzen processors, especially those without 3D V-Cache.

G.Skill offers a plethora of different DDR5-6000 memory kits across its Trident, Ripjaws, and Flare lineups. It also offers variations that specifically cater to Intel and AMD processors. Historically, the Flare series targets AMD platforms.

The Flare X5X will initially launch at DDR5-6000, since many consider it the sweet spot for AMD's Ryzen chips. Like the other offerings, the Flare X5X debuts with a 32GB memory kit, made up of two 16GB memory modules.

As with any AMD EXPO ULL memory kit, it is difficult to tell the Flare X5X apart from the vanilla Flare X5 since we are not accustomed to listing specifications beyond the main memory timings. In the case of the Flare X5X, the memory kit has its timings configured to 36-36-36-96 at 1.35V, the same as the normal Flare X5 memory kit. The memory subtimings are tighter on the Flare X5X because of AMD EXPO ULL.

G.Skill Flare X5X Specifications

With memory timings of 36-36-36-96, the Flare X5X is not the best AMD EXPO ULL memory kit G.Skill offers. The company sells more optimized variants, including 26-36-36-32, 28-36-36-32, and 30-38-38-32 at 1.45V, 1.40V, and 1.35V, respectively. It is plausible that G.Skill will offer similar configurations for the Flare X5X down the line.

When AMD first announced it, the chipmaker confirmed that EXPO ULL memory kits would be priced similarly to regular EXPO memory kits. However, because of the memory shortage and leftover stock, the price difference was substantial. Pricing for AMD EXPO ULL memory kits has somewhat stabilized over the last few months, so the price tags are falling in line with what AMD anticipated.

G.Skill has not shared the pricing for the Flare X5X DDR5-6000 C36 32GB (2x16GB) memory kit. However, we should have a pretty good idea of what it will retail for by looking at G.Skill's other memory kits on the market. For instance, the Trident Z5 NeoX RGB DDR5-6000 C36, a less optimized version of the C30 version we have reviewed, sells for $10 more than the normal Trident Z5 RGB DDR5-6000 C36. In a perfect world, the Flare X5X DDR5-6000 C36 may sell for around $509.99, $10 above the standard Flare X5 DDR5-6000 C36.

G.Skill will roll out the Flare X5X series in phases so that availability will vary by region. It should not be long before we find the Flare X5X DDR5-6000 C36 memory kit at all major U.S. retailers.

ChangXin Memory Technologies (CXMT) has announced in a social media post that it has started mass production of LPDDR6 memory for a Xiaomi smartphone, Reuters reports. This is not entirely unexpected given the general LPDDR6 mass-production timeline, but the announcement is still surprising because two China-based companies are ahead of industry announcements. Yet, there are caveats.

LPDDR6 is perhaps the most substantial upgrade to the GDDR-class memory ever. Firstly, it uses PAM3 signaling, which encodes 3 bits of information across two symbols, compared with the NRZ signaling used by LPDDR5/LPDDR5X. Second, the data transfer rate increases to 43.2 GT/s. Third, the reduced I/O width from 32 bits to 24 bits requires rework at both the hardware and software levels.

Given the differences between LPDDR5 and LPDDR6, the most important factor here is not exactly LPDDR6 manufacturing, but a broader view.

On the one hand, CXMT reached mass production of LPDDR6 roughly at the same time as the established DRAM leaders, meaning it is on par with them, if not ahead. This marks a substantial change from earlier generations, when Chinese DRAM technology generally lagged considerably behind Samsung, SK hynix, and Micron.

On the other hand, reaching mass production does not necessarily mean that CXMT has achieved full technological or manufacturing parity with its larger rivals. The official announcement covers only one smartphone maker and one model, meaning CXMT's LPDD6 still has to pass validation for other handsets and other makers.

Still, the significance of CXMT's announcement is hard to understate. CXMT is no longer merely catching up by introducing a new memory generation years after its international competitors. With LPDDR6, CXMT is entering the market during the standard's initial commercialization, which means the technology gap between China's leading DRAM producer and the industry's established players has narrowed considerably.

Which brings us to the question of whether CXMT can maintain this pace. Developing a competitive LPDDR6 device is one thing, producing it at high yields and in sufficient volumes to supply major customers is another. For now, we are talking about a niche smartphone with memory operating at undisclosed performance.

If CXMT can mass-produce LPDDR6 for the whole market and manufacturers, we may well have seen the change of the industry leader. Yet, given one niche device, we certainly cannot say so for now.

China's leading DRAM producer ChangXin Memory Technologies (CXMT) has filed a lawsuit against the U.S. Department of Defense in an attempt to overturn its classification as a company linked to China's military, Reuters reports. CXMT claims that it has no connection to the Chinese People's Liberation Army, and argues that the Pentagon's decision lacks supporting evidence, violated due-process requirements, and has damaged both its business and reputation.

The Pentagon initially classified CXMT as a Chinese military company in January 2025, when Joe Biden was the president. The Trump administration subsequently maintained the designation when the Defense Department updated the list in June. CXMT says it spent more than a year supplying information to the Defense Department in an attempt to overturn the classification and remove itself from the list.

The company claims the DoD published a notice in February indicating that CXMT would be taken off the list but withdrew that notice later the same day without any explanation. In June, the Pentagon classified CXMT as 'directly affiliated with MIIT and indirectly affiliated with SASAC and MIIT.' MIIT is China's Ministry of Industry and Information Technology, whereas SASAC is the State-owned Assets Supervision and Administration Commission of the State Council, an organization that formally owns the government's stakes in non-financial state-owned enterprises.

While CXMT memory can certainly be found in systems used by the PLA or China's secret services, this does not automatically make CXMT a direct supplier to these entities and therefore does not prove that CXMT is a Chinese military company.

CXMT points out the Pentagon's original motivation to include the DRAM maker in its list was a remarkably weak-looking 'military grade' argument. According to the complaint, DoD's 2024 report said CXMT contributed to China's defense industrial base partly because its DRAM is dual-use and cited an advertisement describing CXMT products as 'military grade.' CXMT says that advertisement came from an unauthorized distributor, which later admitted the characterization was erroneous.

In addition, CXMT claims that its DRAM products conform to JEDEC commercial standards and lack the requirements imposed on Chinese military-grade semiconductor components involving areas such as temperature, packaging, testing, and military oversight. Also, it says that should its products be made in the U.S., they would be classified as for 'purely civilian uses' and that it 'does not hold any licenses to manufacture products for military use.'

Inclusion on the Pentagon's list of companies linked to the Chinese military can result in restrictions involving U.S. government contracts, something that CXMT barely seeks. But more importantly, it can affect a company's commercial relationships (as many companies do not want to be affiliated with companies linked to the Chinese military) and reputation. Indeed, CXMT claims that since January 2025 the designation has continuously hurt it commercially and reputationally, and that the lawsuit is intended to protect its business interests.

The ongoing DRAM crisis has led to a sharp increase in laptop prices, with manufacturers facing exponentially high component costs, particularly memory and SSDs. The situation has created a growing gap in the affordable gaming laptop segment, with most entry-level models becoming increasingly expensive. In its response, MSI has introduced the new Katana 15 HX C14 that features Intel’s 14th-gen Raptor Lake Refresh processors along with support for both DDR5 and DDR4-3200 memory.

Depending on the region, MSI will be offering the value-focused gaming laptop in two variants, featuring dual SO-DIMM slots with either DDR4 or DDR5 compatibility. For context, a 32GB (2x16GB) DDR4-3200 SO-DIMM memory kit can be purchased for around $200, while a DDR5-6000 kit goes for over $400. MSI did not specify the DDR4 capacity as standard, only that the laptop supports up to 96GB, which seems unlikely given no 48GB DDR4 SO-DIMMs exist.

Configurable with up to a 24-core Intel Core i9-14900HX processor, the laptop should offer plenty of CPU performance for demanding tasks besides gaming. It will be available with up to an Nvidia RTX 5070 laptop GPU offering support for the latest AI features, GDDR7 memory, DLSS 4.5, and real-time ray tracing. MSI claims that the Katana 15 HX C14 is tuned for up to 170W of combined CPU and GPU power, while the cooling system with dual fans, three heat pipes, and four exhaust outlets helps in sustained performance. There are also dual-PCIe Gen 4x4 M.2 slots, allowing gamers to add a separate SSD dedicated to their gaming library.

Display options include a 15.6-inch IPS panel available with either QHD (2560x1440) resolution that supports up to a 165 Hz refresh rate or FHD (1920x1080) resolution with up to a 144 Hz refresh rate. In terms of design, the laptop comes in a stealthy black finish with textured slash patterns inspired by traditional Japanese blades along with bright red logos. The chassis measures 22.9mm in terms of thickness and weighs 4.62 pounds, making it fairly compact for a 15-inch gaming notebook.

Other notable features include support for Wi-Fi 6E and Bluetooth 5.4, a 4-Zone RGB gaming keyboard with 1.7mm key travel, a 240W power adapter, USB Type-C with Power Delivery 3.0, a 60Whr battery, and DTS-enhanced dual 2W speakers. According to MSI, the new Katana 15 HX C14 will be available globally, although there's no pricing information at the moment.

Cloudflare says that it has freed up roughly 100TB of RAM across its global fleet without reconfiguring any physical RAM modules in its servers, and that it did so by redesigning how each DNS cache entry is laid out in memory. In a technical blog post, systems engineer Sebastiaan Neuteboom gave us an in-depth look at five Rust-level changes to Big Pineapple, the platform behind the 1.1.1.1 resolver, that shrank each cached entry from 953 bytes to 420 bytes and made the cache faster in the process, with insert throughput up 43% and lookup latency down 19%. The recovered memory matches the combined DDR5 in 130 of Cloudflare's 768GB Gen 13 servers, reclaimed in the face of server-grade DDR5 prices that are on track to double year over year.

Just one wasted byte per entry costs Cloudflare more than 250GB of fleet memory, which is a consequence of Big Pineapple holding more than “250 billion cached DNS entries at any given time.” The first of the five changes, replacing Rust's growable Vec and String containers with fixed-size boxed slices, saved over 15TB on its own by dropping capacity fields the data never uses once cached.

Further changes collapsed the three record lists in every DNS response into one buffer indexed by 2-byte offsets, and dropped owner names that duplicate the queried domain, rebuilding them at read time instead. The last change stores record data as length-prefixed raw wire-format bytes, ending an arrangement in which a 4-byte A record took up the same 144 bytes as the largest record type Cloudflare caches, the rarely seen NAPTR.

Packing record data contiguously also improved CPU cache locality, meaning that most record types now copy straight from the stored buffer into outgoing responses instead of being re-serialized field by field.

According to Cloudflare’s benchmarks in the technical blog, insert throughput is now 893,000 entries per second, up from 625,000, with lookup latency down from 828 to 670 nanoseconds. Over the rollout, which ran from mid-May to early July, p99 resident memory per instance fell from 9.3GB to 5.3GB.

The Gen 13 servers, which Cloudflare calls its most powerful yet, each carry 768GB of DDR5-6400. The company settled on that config back in March after pricing out a 1,152GB option and rejecting it partly because of high memory prices.

This DNS cache work is the second large memory-reclamation project Cloudflare has completed in the last year, following the FL2 rewrite of its request-handling layer in Rust last September. Efficiency has been driving the company’s hardware picks for years, including the switch to AMD's 96-core EPYC 9684X for its Gen 12 servers.

None of the liberated RAM will be cashed out as smaller memory configurations, though; Cloudflare plans to pour it back into larger DNS caches, which raise hit rates and cut the query traffic it sends upstream to authoritative servers.

High-bandwidth memory (HBM) is one of the key components of AI systems that is not currently assembled in the U.S., but this is going to change in 2029, when SK hynix initiates packaging of HBM memory modules at its facility in Indiana. This week, the company held a groundbreaking ceremony for its HBM production base in America and intends to start construction of the plant shortly.

SK hynix's HBM production site in West Lafayette, Indiana, will specialize in advanced packaging, testing, and R&D of HBM. The facility is set to cost the company around $4 billion, which highlights its advanced technology capabilities as well as vast capacity. The DRAM maker expects to open the cleanroom by October 2028 and begin volume production of next-generation HBM in the second half of 2029, which is about a year later than originally envisioned. Once commercial operations kick off, SK hynix expects the Indiana site to employ around 1,000 people.

Despite being described as an HBM production base, the Indiana site will not manufacture the DRAM wafers, but will package HBM stacks using DRAM wafers produced in South Korea and base dies produced in South Korea, Taiwan, or the U.S. Nonetheless, SK hynix intends to market the resulting devices as its first U.S.-made next-generation HBM products. Meanwhile, as custom HBM-class memory gains traction in the second half of the decade, assembling such stacks close to American customers may be particularly important both for SK hynix and its clients, as it enables SK hynix to shrink the feedback loop significantly.

In addition to building the advanced packaging and testing plant, SK hynix will also establish an Advanced Packaging R&D Testbed next to the manufacturing lines. The facility will enable SK hynix to work with customers, universities, and commercial partners on future packaging technologies, build prototypes, and quickly validate their performance and manufacturability in an actual production environment. In the era of customized HBM, such a facility could become a significant competitive advantage for SK hynix.

SK hynix also signed a memorandum of understanding with Purdue University to jointly research system integration and advanced packaging technologies, including HBM.

"The United States is the epicenter of AI innovation, bringing together premier customers, top-tier R&D capabilities, and partners and Indiana fab will become a gateway to deliver first Made in USA HBM products," said Kwak Noh-Jung, CEO of SK hynix. "We will expand our investments and collaboration in the U.S., grow together, and become the most trusted partner in shaping the future of AI in America."

Nvidia's NVLink Fusion program gives the company's partners the building blocks necessary to connect custom chips with the NVLink scale-up domain used to join many separate processors into a single coherent system like the Vera Rubin NVL72 rack-scale accelerator. Today, Nvidia is adding a new building block to that toolkit: NVHBM, a custom implementation of the high-bandwidth memory that underpins practically every AI accelerator in use today.

As Nvidia describes it, NVHBM is a custom HBM base die that promises higher bandwidth, lower power usage, and a smaller on-die footprint than traditional HBM4e. Nvidia says it's designed and validated with "leading memory vendors," so it promises custom silicon developers faster time-to-market than implementing commodity HBM from the ground up. But it's worth re-emphasizing that this isn't an HBM replacement. Instead, it's a new building block that Nvidia is only offering to its custom silicon partners.

Memory bandwidth is everything for AI accelerators, and NVHBM promises up to 30% higher bandwidth per stack than standard HBM4e. For memory-bandwidth-bound AI workloads, that higher bandwidth translates into higher throughput, such as a higher tokens-per-second rate for AI inference.

The custom NVHBM base die also reduces the footprint of memory-related circuitry on the main custom accelerator die. Traditionally, the HBM memory controller has been incorporated into the primary silicon die on the package. NVHBM instead moves the memory controller into the base die of the HBM stack and provides a smaller custom PHY that NVLink Fusion customers can then integrate into their designs.

Nvidia says this approach frees up precious package real estate that can then be used for additional compute die area — up to 30% more compute on the primary silicon die. NVHBM further promises to simplify the interposer routing used to join multiple chips together for designs using advanced packaging techniques.

NVHBM also provides power savings versus off-the-shelf HBM4e stacks. As Nvidia has continuously hammered home in the Vera Rubin roll-out, every watt that isn't going into token production is a watt wasted. Nvidia says NVHBM uses 15% less power than commodity HBM4e, and that power savings can be banked for performance-per-watt improvements, reallocated into more functional units for a custom accelerator design, or translated into higher sustained performance within the same power budget.

Higher bandwidth at lower power is a huge win for AI accelerators that are moving massive data structures like model weights and KV caches around, especially when those savings are multiplied across many thousands of chips. The energy saved on data movement can be plowed back into higher performance from the accelerator itself or reallocated to support larger numbers of accelerators within the same fixed power envelope.

But these are, as of now, reasons for Nvidia's prospective partners to consider incorporating NVLink Fusion and NVHBM into their custom designs, not benefits that will materialize in the Rubin rack-scale systems already in production.

Along with NVHBM itself, Nvidia announced that Amazon's Annapurna Labs will be its first partner on NVHBM. , and Annapurna VP Nafea Bshara says: “We look forward to this technology collaboration to benefit future AWS infrastructure designs.” Annapurna's next-generation Trainium 4 AI chips will already support the NVLink Fusion scale-up interface, so it seems likely that follow-on chips will support NVHBM, too.

Earlier this month, Samsung introduced the industry's first LPDDR5X-PIM memory, adding in-memory logic to the low-power memory standard, and at Hot Chips 2026, it dove into the memory technology that we've previously seen at play through HBM stacks.

PIM, or Processing-in-Memory, is a technology Samsung demoed as early as 2021, piloted through HBM stacks in AMD accelerators. It's a small bit of logic that sits alongside DRAM cells, allowing basic calculations to happen directly in-memory. By handling those basic calculations locally, Samsung is able to eliminate the processor as a bottleneck and speed up, in particular, AI inference. In inference tasks, Samsung says its LPDDR5X-PIM is 2.28x faster than standard LPDDR5X, in fact.

The reason for adding in-memory processing to LPDDR5X is pretty clear: HBM is too damn expensive. Micron warned just a day earning at Hot Chips that the HBM wafer demand is only getting worse, and Samsung opened its presentation with something we're all well aware of. Memory makes up the bulk of AI chip costs, and its share of the pie continues to grow. Add on top of that the power demands of DDR5, much less HBM, and LPDDR5X seems like an ideal target for PIM.

Samsung introduced HBM-PIM in 2023, and at the time, introduced the concept of LPDDR5X-PIM. What it shared at Hot Chips is a real product, taking the concept of LPDDR5X-PIM and putting it through validation. Samsung is also looking ahead for LPDDR6X-PIM, and the company says it hopes to have an initial specification from JEDEC this year.

Bringing in-memory processing to Samsung LPDDR5X

Above, you can see a basic layout of how Samsung integrated PIM into LPDDR5X. Each memory bank has its own PIM, which is an advancement over HBM-PIM, where Samsung had to cut banks to fit the logic. The memory bank, scale register file, and source register file feed parallel MAC trees. Once calculated, the output (either integer or floating point output) is written to a vector register file.

Samsung says its LPDDR5X can operate in two modes: single-bank (traditional DRAM) or multi-bank (PIM). Traditional DRAM controllers work, with commands switching between standard read/write or a PIM read/write depending on the mode. The challenge, according to Samsung, was reordering with conventional DRAM.

Samsung uses what it calls Address Align Mode (AAM) to get around the reordering issue. It maps DRAM addresses to MAC instructions, assigning the VRF/SRF address based on the RA/CA address, respectively, and not the Instruction Register File.

To demonstrate how data moves through the memory cells and calculations are performed, Samsung provided an example of a MAC operation, assuming weight parameters for the data are already written into the cell, and the memory is operating in multi-bank (PIM) mode.

Storing 512 bytes of FP8 activation data, it's first broken down into 16, 256-bit packets, which are written into each of the banks in and noted in the Source Register File.

A PIMX_RD reads the weight data from the DRAM bank, feeding into the MAC trees alongside the data from the SRF. Once the calculation is done, the output vector from each operation is written into the Vector Register File.

Once the calculation is done, a PIMX_WR command transfers the output data back to the DRAM bank. Samsung noted there doesn't need to be a 1:1 relationship between reads and writes, but it's useful for this example. With a VRF size of 1 kbit, a maximum of four calculations can be written to the VRF.

With the output written back to memory banks, the host just needs to read the data from memory. The host switches to single-bank (conventional DRAM) mode and executes 16 reads to gather the output from all of the memory banks.

Samsung LPDDR5X specs and preliminary performance

Samsung's LPDDR5X-PIM looks a lot like LPDDR5X. It uses a standard 561-ball array for packaging, just like LPDDR5X, and Samsung uses two 64-bit ranks with 16 GB modules. The critical number here is bandwidth. With LPDDR5X-9600, peak bandwidth is 76.8 GB/s, but that's increased by eightfold with PIM to 614 GB/s by reducing data movement and keeping basic logic local.

Samsung uses four dies per rank, for a total of eight dies. Not the various registers above, as well, as they're important for the illustration of data flow through Samsung's LPDDR5X-PIM memory.

In Samsung's preliminary benchmarks, LPDDR5X-PIM is impressive. In model run time, Samsung say a 2.28x improvement with PIM, and in tokens per second (TPS), PIM offered a 3.01x increase in performance.

The slide above shows what happened behind the scenes to gather these numbers, with Samsung using an edge AI accelerator — we're not sure which, but perhaps an early Gaia SoC — and testing Llama 3.1 with 8 billion parameters. Notably, the output is different, which one attendee pressed Samsung about. The company says optimizations are ongoing to improve accuracy, but it expects the performance benefit to remain the same.

One of the main advantages of LPDDR5X is right there in the name: low power. With PIM, power consumption becomes more of a concern, but Samsung says it doesn't expect higher power consumption overall compared to conventional DRAM. The presenter noted that peak power consumption will be "much higher" due to the bursty power draw of the PIM, but Samsung still expects overall power draw to be lower than conventional DRAM.

That comes down to extra reads/writes. Although PIM represents a power increase, decreasing the number of times data needs to move between DRAM and the host will lead to overall lower power consumption. "We're not having significant power increase," as Samsung's Karam Hwang put it.

LPDDR5X has, until recently, only had applications in consumer products. However, SOCAMM2 serviceable modules allowed Nvidia to use LPDDR5X as the memory of choice with its Vera CPU. And Intel uses LPDDR5X with its new Crescent Island AI accelerator.

Even with PIM, LPDDR5X doesn't come remotely close to the bandwidth with available with HBM, but it has a lot of applications elsewhere. Samsung's targets of server, client, and mobile are telling, with LPDDR5X-PIM accelerating edge AI on mobile and client devices, as well as arriving in lower-scope accelerators like Crescent Island.

Full Samsung Hot Chips 2026 presentation

Looking back in time is always interesting, especially when visiting any topic that's technology-adjacent — and doubly so when looking at the evolution of pricing. The price of memory continues to be a hot-button topic, and an eagle-eyed Redditor came across a 1995 press release from Advantage Memory Corporation announcing prices for its freshly released DIMMs, revealing that fitting a high-end machine with 1 GB of RAM would set you back as much as a cheap house.

The figures on display are rather shocking when converted to today's dollars, with 8 MB of RAM going for $399, or $874 in today's money, and a 64 MB stick ringing in at $3,900, or $8,540 in 2026. The Apple Power Macintosh mentioned in the PR had 12 slots, so it could fit in as much as 1.5 GB of RAM, and although the pricing for 128 MB DIMMs wasn't mentioned, those would be around $8,000 a pop, so "only" 1 GB of RAM would come in at $64,000 — enough for a house back then in the more affordable areas of the U.S. By the way, that amount would be $140,000 today.

In 1995, memory technology was transitioning from SIMMs to the spankin' new DIMMs, and Command and Conquer, MechWarrior 2, and the original Need for Speed were coming out. 16 MB of RAM was generally accepted as a decent amount of memory for a build, roughly matching the 16 GB of today. Some quick math says those 16 MB of the new technology were about $800, or in today's money, the princely sum of $1,751.

As of today, 16 GB of DDR5 will set you back $200 to $250, but the price of memory has been extremely volatile, to say the least. Plus, not only is supply rumored to drop, server RAM contract prices are expected to rise, and the few crumbs left for the consumer market are still rising in price.

SK hynix chairman Chey Tae-won even suggested that DRAM wafer shortages could last until 2030 at least. The fact that all the major RAM makers are shifting their production lines to HBM for AI accelerators is only making the problem worse. Yes, $200 is still a long way from $1,750, but with things keeping in this direction, there's a non-zero chance this very article will be linked to in the near future.

At any rate, despite the poor outlook, these figures reveal just how much technology really became democratized with time. Any form of PC was really expensive back in 1995. Around that era, Bill Gates said that there would be "a PC at every home, and at every desk." That statement sounded a little insane back then, but in retrospect wasn't crazy enough, as today we have what would be sci-fi hardware... in everyone's pocket or purse.

When it comes to building a gaming PC, DDR5 RAM clocked at speeds of 6,000 MT/s is often touted as the sweet spot for specs. While slower and faster speeds are available, it's very much the benchmark for both price and performance, which is why it's noteworthy that this particular configuration now costs $400, a more than 400% increase from the low prices we've seen in the past.

• $401 for Corsair Vengeance 32GB DDR5 600 ($215 off)

In addition to our ongoing RAM price tracking, we perform daily spot checks on pricing for discounts or deals for 32GB (2x16GB) of DDR5 RAM, given its aforementioned significance as the "benchmark" when it comes to capacity. In recent weeks, the price of 32GB DDR5 6000 RAM has been creeping ever closer to that unfortunate $400 milestone, and in the last few hours we've just crossed the threshold. That's not to say that prices might fluctuate back down in a day or two, but generally the traffic is only moving in one direction.

You can buy 32GB of DDR5 RAM at slower speeds for less — this Corsair Vengeance DDR5 4800 is "just" $359 — but good RAM is now harder (and more expensive) to come by than ever before.

According to data from PCPartPicker, this particular 32GB DDR5 6000 kit from Corsair has been as little as $80 in years gone by at Newegg, marking a full 400% price increase on the lowest we've ever seen on this model.

RAM prices elsewhere have climbed by as much as 500%, with 128GB of DDR5 now costing $3,399 in stores. The causes of the PC component crisis are numerous and well-documented. AI buildouts are consuming much of the world's NAND and flash manufacturing capacity, which is having a knock-on effect for consumer production. Famously, Micron even wound up its consumer brand Crucial in favor of serving more enterprise customers.

All signs point to the memory shortage, and thereby pricing, getting worse in the coming months. As such, bundles and pre-built PCs remain one of the only ways to insulate yourself from cost increases if you're in the market for new hardware. As mentioned, slower memory speeds are available at lower prices, but compromising for 4,800 MT/s RAM to save $40 when building a PC is an extremely tough state of affairs.

Memory will account for roughly 30% of hyperscaler capex this year, up from about 8% in 2023 and 2024. Conventional DRAM contract prices rose 90% to 95% in a single quarter, and Meta is already running recycled DDR4 behind CXL across millions of servers, cutting server counts by up to 25% for some inference workloads. Into that market, Marvell has brought a three-tier "AI memory infrastructure" portfolio, announced at FMS 2026 in Santa Clara on August 4 and pitched to EE Times last week, where product marketing VP Khurram Malik put DDR4 reuse at the top of the CXL use-case list.

Only one piece of it is new: the Bravera SC6 PCIe 6.0 SSD controller, which samples in Q4. Structera X has been shipping since 2024, the Structera S switch was announced at OFC in March, and the Photonic Fabric optical memory tier came with the Celestial AI acquisition in February. Meta, the reference customer for the use case Marvell is selling, did it with an ASIC of its own design rather than anything from Marvell.

What's new (and what isn't)

The Bravera SC6 is a PCIe 6.0 x4 controller with 16 NAND channels, eight chip enables per channel, a 3,600 MT/s ONFI and Toggle interface, and 12 Arm Cortex-R82 cores plus three Cortex-M7s, according to Marvell's product blog.

Marvell says it doubles the Bravera SC5, supports NAND from multiple suppliers, and uses a host-managed flash translation layer, meaning cloud operators control write placement, garbage collection, and wear leveling themselves, with KV cache spillover from HBM to SSD as the primary workload. Sampling starts in Q4 2026, which puts drives in 2027 at the earliest on the timeline Tom's Hardware Premium laid out for the PCIe 6.0 controller field, where Phison and Silicon Motion are chasing the same Gen6 drive launches.

Structera X 2404 and X 2504, the DDR4 and DDR5 expansion controllers, were announced in July 2024, and Marvell's FMS blog says both are in hyperscaler deployments, with inline LZ4 compression that Malik told EE Times yields roughly 2 to 2.5 times the effective capacity.

The Structera S 30260 switch, announced at OFC in March, carries 260 PCIe 6.0 and CXL 3.x lanes, connects 16 or 32 CPUs or GPUs to up to 48TB of shared memory at 4 TB/s aggregate bandwidth and under 460ns round trip, and begins sampling this quarter. Photonic Fabric came in with the $3.25 billion Celestial AI acquisition that closed in February, with Marvell now describing it as a shared-memory tier reaching up to 50 meters with up to 32 TB of warm KV cache and a claimed 2 to 3 times token throughput inside existing footprints. Marvell also took a $2 billion investment from Nvidia in March, tied to NVLink Fusion, the proprietary scale-up fabric CXL pooling has to sit alongside.

DRAM contract prices have tripled since Structera launched

Conventional DRAM contract prices rose 90% to 95% quarter-on-quarter in Q1 2026, the steepest increase on record for every DRAM category. Q2 added another 58% to 63%, and server DRAM is set to climb a further 13% to 18% in Q3, held in check mainly by the long-term agreements U.S. hyperscalers signed to cap pricing through 2027 and 2028. Server DRAM buyers in the U.S. and China were receiving about 70% of their orders late last year as suppliers diverted wafers to HBM.

Samsung, SK hynix, and Micron have all been winding down DDR4 output since last year, and TrendForce put the legacy memory rally at up to 50% for DDR4 in Q1 alone. A module pulled from a decommissioned 2021 server is now worth a multiple of what it was when Structera X was announced, and the DDR5 that would replace it has roughly doubled in price twice. When Marvell first pitched DDR4 reuse in 2024, it was a sustainability line item, but two years later, the memory crunch has turned it into a capex line item.

Meta's recycling numbers

Meta's Vistara ASIC, presented at ISCA 2026 in late June, is a CXL 2.0 Type-3 expander on a PCIe 5.0 x16 link that bridges two DDR4 channels to a host and runs at 128GB per chip using 32GB modules recovered from retired machines. Each MemServer pairs a 158-core AMD EPYC Turin with 768GB of local DDR5-6400 and 256GB of CXL-attached DDR4-2400, and Meta claims idle round-trip latency of around 50ns on the controller path.

The paper states that around 40% of Meta's fleet is memory-capacity bound, that its servers last three to five years while the DRAM inside them is good for seven to 10, and that the deployment cuts server counts by up to 25% for disaggregated ML inference, average latency by 29% for distributed caching, and job failures by 33%, The Register from the paper ahead of the talk.

Malik told EE Times, "The first and foremost important use case within CXL is the recycling of DDR4," and Marvell's FMS release says Structera X was "developed in close collaboration with leading hyperscalers" without naming one. Meta's paper describes an in-house ASIC, an in-house MemServer chassis, and an in-house Linux page-placement stack, the full path one would take when volume justifies its own silicon, while Astera Labs' Leo controllers reached Microsoft Azure's M-series preview in November last year.

CXL's deployment gap

SemiAnalysis declared CXL dead for AI in March 2024 because Ethernet-style SerDes such as NVLink carry roughly three times the bandwidth per millimeter of die edge as PCIe 5.0 or 6.0, so every CXL lane on an accelerator costs scale-up bandwidth that could have gone to the GPU-to-GPU fabric instead.

Marvell's CXL pitch accordingly targets CPU-side capacity and KV cache staging rather than the GPU-to-GPU path where you’ll find NVLink Fusion. Yole estimated two-thirds of servers sold in Q1 2025 were CXL-capable and expects more than 90% to be by the end of this year, yet it puts the share of servers actually using CXL at close to zero today and only 13% by 2030.

Marvell's benchmarks for the Structera S show a 16TB pooled DRAM tier delivering 4.8 times the inference throughput and an 82.7% cut in time to first token in GPU configurations, attributed to keeping KV cache in DRAM instead of recomputing or reloading it. Those are vendor numbers with no disclosed model or baseline, and the switch only starts sampling this quarter. Nvidia, AMD, and the SSD makers all offer their own routes for the same cache spillover.

Nvidia has told some of its largest customers that the prices of servers containing its AI chips will rise by more than 15% in many cases, Bloomberg reported on Saturday. The increases will take effect on Grace Blackwell and Vera Rubin systems shipping early next year, according to people familiar with the matter, who commented on communications that have not yet been made public. The size of each increase will depend on the chip generation and the memory configuration involved. Companies that build servers under contract for large data center operators, including Microsoft, Google, and Oracle, have recently notified their customers of the forthcoming increases, the people told Bloomberg.

This is another example of the so-called "RAMageddon" that's gripping the DRAM market, with contract prices having risen at record rates this year. Analysts projected that conventional DRAM contract prices would climb 58% to 63% quarter-over-quarter in Q2 2026, following a Q1 surge of 90% to 95%, as suppliers reallocated capacity toward HBM and server products. SK hynix said in October last year that it had already sold out its entire 2026 memory production capacity, and Samsung and SK hynix raised 2026 HBM3E supply prices by close to 20% before the year began.

AI systems carry enormous memory loadouts, with Nvidia's Rubin GPU shipping with up to 288GB of HBM4 per package, and the NVL72 rack-scale system combines 72 of those GPUs, putting more than 20TB of HBM in a single rack before accounting for the LPDDR attached to its Vera CPUs. With HBM production consuming roughly four times the wafer area of equivalent conventional DRAM, memory has become one of the largest line items in an AI server's bill of materials, and it's continuing to rise at a stratospheric pace.

Ironically, the supply crunch that's now inflating Nvidia's systems is the same one its demand helped to create. The three major memory makers spent this and last year shifting advanced nodes and new capacity toward HBM and high-capacity server DRAM, starving commodity markets in the process. Consumer DDR5 pricing has more than doubled since late 2025 as a result, with a mainstream 32GB DDR5-6000 kit selling for around $392 in August against $110 to $140 a year earlier, according to our RAM price tracker.

Nvidia has already passed rising costs through to consumers, raising prices on GeForce graphics cards earlier this month. The Bloomberg report indicates the same unrelenting pressure has now reached the top of the Nvidia stack, where hyperscalers as well as PC builders will be absorbing the increase. A 15% rise on rack-scale systems that sell for several million dollars each adds hundreds of thousands of dollars per rack across deployments that run to thousands of racks.

Nvidia runs a gross margin of roughly 75% non-GAAP, among the highest in the semiconductor industry, and the reported hikes indicate the company intends to pass memory cost inflation on to customers rather than absorb it, which it can more than afford to do. Meanwhile, supply of its accelerators from TSMC still can't meet demand, which limits buyers' immediate leverage.

Whether the increases push hyperscalers further toward AMD's accelerators or their own custom silicon will depend on how quickly those alternatives can absorb displaced demand, and all of them draw HBM from the same three constrained suppliers.

Bad bots account for 91% of the traffic reaching one retailer's DDR5 memory product pages, roughly 10 automated requests for every legitimate visit, according to a LinkedIn post this week from Jérôme Segura, VP of threat research at bot-mitigation firm DataDome. The figure updates research DataDome published in March, which measured the ratio at about 6:1 across several e-commerce sites.

Over the same period, the cheapest 128GB DDR5-6400 kit tracked by Tom's Hardware has reached $3,399, ten times its record low pricing. The Thales 2026 Bad Bot Report puts bad bots at 40% of all web traffic, less than half the share Segura reports on DDR5 listings.

DataDome's March report documented a single operation that generated more than 10 million blocked requests, with a one-hour sample showing 91 DDR5 listings each polled around 551 times, or once every 6.5 seconds. The requests carried cache-busting parameters to defeat cached stock data and targeted industrial module makers such as Micron and Apacer, as well as DIMM socket suppliers Amphenol and TE Connectivity, alongside consumer brands.

Segura wrote on LinkedIn that retailers carrying memory should assume their "traffic analytics are probably understating the problem significantly."

Keep in mind that the 91% figure comes from one unnamed retailer, and DataDome hasn't published a sample window or its methodology. DataDome also sells the product that blocks this traffic, and page requests ultimately aren't purchases, so the ratio measures monitoring pressure on listings rather than how much stock bots actually end up securing, which can’t easily be quantified.

Apacer CEO C.K. Chang said in July that DRAM supply to independent module makers could fall to 30% of 2026 levels next year, and TrendForce expects conventional DRAM contract prices to rise another 13% to 18% in Q3 after roughly 60% in Q2. Hyperscale buyers have reportedly placed deposits against most of 2027's DRAM output.

A 32GB DDR5-6000 kit that averaged $72 this time last year now averages $392 on PCPartPicker. While graphics card and console scalping in 2020 and 2021 ran against scheduled restocks that eventually outpaced resale demand, no equivalent restock date exists for consumer DDR5 before 2027 at the earliest.

Framework stopped selling standalone RAM in November last year, citing scalpers, and Micro Center sells its CPU, motherboard, and 32GB DDR5 bundles in-store only with a one-per-household limit. Newegg and Amazon have run repeated CPU-plus-memory bundles that price a 32GB kit well below its standalone cost, which ties each kit to a processor a reseller then has to move as well. On eBay, we found G.Skill's Trident Z5 Neo 32GB kit listed at $836.54 in December against a $429.99 retail price, roughly double, and about seven times the $117.99 it sold for before the shortage.

ChangXin Memory Technologies (CXMT), China's largest maker of dynamic random access memory (DRAM), planned to obtain Samsung's IP related to its memory process technologies in a bid to develop its own production nodes, according to testimony given in a South Korean criminal case involving leaked Samsung technology, reports Maeil Business. The company's managers allegedly had no intention to develop an in-house process technology from scratch, so obtaining IP from Samsung was a strategic decision.

The intention was a key part of CXMT's business plan rather than an opportunistic attempt to acquire Samsung's technology after the start of its own DRAM process development, according to the testimony of a former Samsung engineer identified as Jeon, who worked at Samsung for 28 years before jumping ship to CXMT sometimes around 2016. This April, Jeon was sentenced to seven years in prison for illegally obtaining a 600-step Process Recipe Plan (PRP) information concerning Samsung's DRAM fabrication processes in general and the 18nm-class node in particular.

"From the beginning, CXMT CEO and CTO tried to develop DRAM by stealing Samsung Electronics' Process Recipe Plan (PRP) information," Jeon told the court this week, according to Maeil Business. "CXMT had no research institutes or facilities at the time of its establishment, and had no intention of developing technology through its own research."

Copying the recipe does not automatically give you a working process. Nonetheless, a detailed process recipe can dramatically shorten development of any production node because it reveals things like the sequence of steps, deposition or etch conditions, anneals, cleans, implant parameters, temperatures, pressures, tool types, and so on. For a memory process, a ready process recipe can remove a huge amount of trial-and-error and reveal how the process integration is supposed to work. Meanwhile, even to ensure that the recipe works as intended, one needs to obtain the same or compatible tools as well as adjust their characteristics accordingly.

However, while a process recipe can potentially help to ramp any fabrication technology, a process recipe itself does not necessarily reveal the complete transistor architecture or physical design. For that, perpetrators also want things like cross-sectional structures, masks/layout information, design rules, device dimensions, capacitor geometry, process window, and so on. Such details are not easy to get for a brand-new fabrication technology, but they can be obtained by reverse engineering of shipping products. By combining process recipe with reverse engineering, experienced DRAM engineers can reconstruct much of the technology. Meanwhile, process integration engineers can save years of trial-and-error with actual fab tools.

Normally, it takes DRAM companies around 3 – 5 years to design a process node from device development to yield ramp. For a new player, development time from scratch will probably be around five years rather than three unless pre-competitive IP is licensed or certain heavy-lifting is done elsewhere. In fact, the Maeil Business report claims it took Samsung five years to develop its 18nm-class node.

Meanwhile, CXMT began mass production of DDR4 SDRAM in 2019 using a 22nm-class node. Mass production of memory using a 18nm-class process technology began in 2023. Such a timeline raises a question of whether CXMT's 22nm-class G1 was derived/adapted from the knowledge of Samsung's process technologies and/or their process recipes, the more advanced 18nm-class node, or did the allegedly obtained Samsung IP primarily help CXMT develop the later 18nm generation? In any case, there is a court ruling that CXMT stole IP from Samsung to boost its own memory production capability.

After posting record profits amid high memory prices, SK hynix ran into a dispute with employees over profit sharing and wage increases, which threatened to escalate into collective action by the company's union. This week, SK hynix management and the labor union reached a preliminary 2026 wage and collective bargaining agreement that significantly changes how the company's profit-sharing bonuses will be distributed, reports Maeil Business citing Yonhap. The good news is that no strikes are planned at the memory maker.

The tentative labor package reportedly calls for a 6.3% wage increase and an increase in welfare points provided by the company. In addition, under the proposed arrangement, employees will receive 40% of their performance-based profit distribution in cash, while the remaining 60% will come in the form of SK hynix shares. The proposal changes SK hynix's 2025 profit-sharing scheme, which allocated 10% of the previous year's operating profit to employee profit-sharing program, but the bonus was to be paid complete in cash: employees received 80% in cash immediately and remaining 20% over the next two years.

The union argued that stock-based bonuses expose employees to potential losses if SK hynix shares decline and could create tax complications, as income tax may be calculated using the share price when the stock is awarded. Specifically, the workers argued that performance bonuses normally paid in cash should not be converted into assets that carry investment risk. Yet, the SK hynix management and union have agreed to remove the 10% ceiling, potentially providing more money to employees, maintain the mechanism for 10 years, and pay the bonuses in cash and stock.

If SK hynix meets current market expectations and earns 25 trillion won ($17.897 billion) in operating profit this year, the profit-sharing pool would amount to 2.5 trillion won ($1.79 billion) based on the 10% formula. SK hynix reportedly has approximately 35,000 employees, so on average every employee will get 70 million won, or $50,120 ($20,048 in cash and $30,072 in stock). Yet, actual compensation will differ depending on an employee's position and individual performance assessment.

On August 4, before the fifth round of negotiations, an SK hynix union told members that if management did not present a revised proposal, it would be difficult to settle the dispute through negotiations alone and the union would have to take necessary action, which was obviously a way to threaten the management with a strike. Yet, the parties have come to terms.

The dispute comes as Samsung Electronics has faced similar labor action over compensations.

G.Skill, maker of some of the best RAM for PC gaming, has begun sending payments to claimants in the $2.4 million class action lawsuit over claims that it falsely advertised the speeds of its memory, misleading customers because the very fastest speeds could only be obtained by overclocking. According to screenshots from different users, reimbursements range from a paltry $20 to $25.

According to the lawsuit filed in 2022, G.Skill reportedly did not make it clear to consumers that overclocking was necessary to reach the advertised memory speeds on its DDR4 and DDR5 offerings from the Trident Z and Ripjaw series. The plaintiffs claimed that G.Skill’s packaging did not warn consumers about the potential risks associated with overclocking, such as system instability, or even possible hardware damage.

While G.Skill denied the allegations and asserted that its products were properly labeled, the company eventually reached a $2.4 million settlement with the plaintiffs. As part of the settlement, G.Skill would send cash payouts to eligible U.S. consumers who purchased certain DDR4 or DDR5 memory kits during the period mentioned in the lawsuit.

The exact payout amount for each claimant depends on the total number of claims submitted and how many qualifying G.Skill memory kits each person purchased. For example, one X user shared that they received $19.68, while separate reports on Facebook indicated that two users received $24.60 each.

In addition to the cash payout, G.Skill agreed to update the packaging for its memory kits and online product listings with clear disclaimers that consumers must overclock the memory kit, whether through Intel XMP or AMD EXPO enablement, to reach the rated memory speeds.

Memory speeds are a complex topic for the average computer user. Not everyone understands that memory kits default to the JEDEC baseline, whether DDR4-2133 or DDR5-4800, for maximum compatibility. However, to reach advertised speeds above the baseline, you need to overclock. Multiple hardware variables affect whether you can successfully use a memory kit that exceeds the manufacturer's specification.

For starters, the processor’s integrated memory controller (IMC) determines whether it can run memory above the manufacturer's specification, for example, DDR5-5600 for AMD Ryzen 9000 or DDR5-6400 for Intel Core Ultra 200S processors. That is the memory speed that the chipmaker guarantees will work on the chip. Furthermore, the motherboard must support the desired memory speeds. The QVL is a good place to start since it includes memory kits that the vendor has tested and confirmed to work on the motherboard. However, the QVL is not foolproof because the motherboard is only one of two factors at play, and sometimes the processor's IMC plays a bigger role.

Less experienced consumers may blame a memory kit for not working in a system. However, they fail to consider that the processor and motherboard are equally important. Memory speeds above the processor's default specification are not always plug-and-play, and it is good that manufacturers communicate this clearly to avoid consumer confusion and disappointment if a memory kit does not perform as advertised.

Pine64 has stopped producing Linux devices entirely, announcing this week on its official Telegram news channel that "there isn't [sic] any plans to continue producing more Linux devices in the near future" because of the ongoing DRAM and eMMC shortage. The stoppage covers the company's full lineup of Arm and RISC-V single-board computers, the PinePhone family, the PineTab2 tablet, and the PineNote e-reader, with remaining PineNote and PineTab2 stock estimated to last around three months.

Microcontroller-based products, such as the PineTime smartwatch, PineVoice smart speaker, and Pinecil soldering iron, won't be affected, and production will continue as usual. Development on the upcoming PineTime Pro will also continue: Pine64 said its demo firmware now has basic drivers for the display, touch, motion sensing, GPS, and audio, though some issues need fixing before a pilot batch enters production. The company also hasn't ended software support for existing Linux hardware.

The AI-driven memory crunch has raised prices on everything from DDR5 kits — which have sold on eBay for more than $2,000 — to prebuilt PCs from Dell, CyberPowerPC, and Maingear. Unfortunately, Pine64 buys the single worst-supplied part in the entire NAND market. TrendForce reported in April that the eMMC/UFS segment faces the tightest supply gap of any NAND category, because its production capacity overlaps with far higher-margin enterprise SSDs, making it the last in line for supplier allocation.

Phison CEO Khein-Seng Pua said in February that 8GB eMMC modules had risen from $1.50 to $20 in a year, a 13-fold increase, and warned the shortage could shut down entire consumer electronics companies in 2026. Pine64 hasn't shut down, but a whole product category has, and it's the first named vendor to kill a lineup outright instead of repricing it.

Other small-board makers have taken the opposite route. Raspberry Pi has raised prices repeatedly, pushing the Pi 5 16GB to $205 and the 500+ to $410, while launching a 3GB Pi 4 and leaning on a stockpile of older LPDDR2 to hold prices on legacy boards. Framework followed in January, raising its desktop pricing to cover LPDDR5x costs, which, since Strix Halo boards use soldered RAM, it couldn't pass to users any other way.

Pine64 sells its hardware near cost as a community service, so it has no margin to absorb higher component prices and, evidently, believes its buyers won't, either. Its mid-2027 checkpoint aligns with supply forecasts that don't expect new memory fab capacity to arrive in volume before late 2027 or 2028.

Pine64 said any decision on resuming production depends on component pricing after mid-2027, meaning its Linux hardware could be off the market for two years — or more.

The XPG Novakey RGB DDR5-6000 C30 is Adata's latest memory kit to hit the market, going toe-to-toe with the best RAM. Although we are still living in a memory shortage, memory brands will continue to release new memory products. The releases are not as frequent as before, but we are glad that companies still support consumers. As always, more competition helps improve prices and offers more options for consumers to choose from. Adata recently brought a new Novakey series to the market. It is a product from the brand's XPG division, with a strong emphasis on gaming culture. However, unlike some of Adata's other series that are available with and without RGB lighting, the Novakey lineup is only available with the former.

Adata’s Novakey memory modules stand out for the company's commitment to sustainability. It produces the memory modules with recycled materials, specifically 50% aluminum and 85% post-consumer recycled (PCR) plastic. The heat spreader, which features a brushed matte black aluminum construction, looks nice. The memory modules measure 1.79 inches (45.5 mm) in height, which we do not expect to pose a problem for big air CPU coolers, but it never hurts to double-check.

A defining feature of the Novakey memory modules is the debut of Adata’s patented “Infinity Mirror” design. When not powered on, the surface is synonymous with a reflective mirror. Once illuminated, though, it transforms into a dazzling visual effect. With the help of the lighting, the futuristic geometric silhouette gives the impression that the image looks 3D-ish and pops out.

The Infinity Mirror effect is present on only one side of the memory module, though. The opposite side features a standard black decorative strip. For customization, Adata offers its XPG Prime software, or you can use your motherboard's software, whether it be Asus Aura Sync, Gigabyte RGB Fusion 2.0, MSI Mystic Light Sync, or ASRock Polychrome Sync.

Under the sleek heat spreader, you will find a black 10-layer PCB with eight integrated circuits (ICs) on one side. It uses 2GB SK hynix H5CG48MEBDX014 (M-die) ICs to reach 16GB on each memory module. Meanwhile, Adata sources the power management integrated circuit (PMIC) from Richtek, labeled 0P=CH QYK.

For maximum compatibility, the Novakey memory modules run at DDR5-4800 with memory timings at 40-39-39-77. It supports both Intel XMP 3.0 and AMD EXPO technologies. Regardless of the standard, the only profile onboard the memory modules will get them up to DDR5-6000 and configure the memory timings and DRAM voltage to 30-40-40-77 and 1.4V, respectively. See our PC Memory 101 feature and How to Shop for RAM story for more timings and frequency considerations.

Comparison Hardware

The Intel system features the Core Ultra 9 285K processor and the MSI MEG Z890 Unify-X motherboard with firmware version 7E20v1AA0. Conversely, the AMD system utilizes the Ryzen 9 9900X processor and the MSI MPG X870E Carbon WiFi motherboard with firmware version 7E49v1AA3. The Corsair iCUE Link Titan 360 RX LCD CPU liquid-cooling solution efficiently maintains optimal temperatures for both the Arrow Lake and Zen 5 processors, ensuring efficient thermal management across platforms.

The MSI GeForce RTX 4080 16GB Gaming X Trio efficiently handles demanding graphics workloads, preventing any bottlenecks during our gaming RAM benchmarks. The TeamGroup A440 Lite PCIe 4.0 SSD balances performance and capacity, delivering 2TB of ultra-fast storage with speeds up to 7,400 MB/s—perfect for Windows 11 24H2 installations, benchmarking software, and gaming applications.

The Corsair RM1000x Shift ATX 3.0 power supply delivers reliable and ample power to our test systems, directly supporting the GeForce RTX 4080 via its native 16-pin (12VHPWR) cable. The Streacom BC1 open-air test bench offers flexible, tool-free accommodation for all hardware components, streamlining assembly and component swaps.

Intel Performance

On average, the Novakey memory kit performed a bit slower than competing options like the Trident Z5 Neo RGB DDR5-6000 C36 and the Ripjaws S5 DDR5-6000 C32. The performance gap is not massive, though. Although the Novakey boasts an impressive CAS Latency (CL) of 30 clock cycles, its other memory timings are comparatively loose, which affects bandwidth and latency, leading to lower real-world performance.-world performance.

AMD Performance

Adata’s memory kit delivered similar performance on the AMD system. It neither stood out as the fastest nor lagged behind the slower memory kit among the tested options. The performance was consistent across the range of different benchmarks.

Overclocking and Latency Tuning

Overclocking on the Novakey was a breeze. The only downside is that the kit already operates at a relatively high 1.4V for DDR5-6000, so we needed to increase the voltage further to 1.45V to gain any headroom for overclocking. The memory kit proved to be quite capable and handled DDR5-6400 speeds with the same timings.

The memory kit was unforgiving when attempting to tighten the CL timing, even with additional voltage applied. On the contrary, both the tRCD and tRP timings showed a bit more flexibility under 1.45V and allowed us to decrease them to 36 cycles, four cycles lower than the default values.

Bottom Line

The XPG Novakey RGB DDR5-6000 C30 is not just about looking good inside your system, thanks to the vibrant and customizable Infinity Mirror design. The memory kit's performance will not let you down, even if it's not the fastest contender on the market. At DDR5-6000, Adata is intentionally targeting the sweet spot for both Intel and AMD platforms. The fact that the XPG Novakey RGB DDR5-6000 C30 arrives with both Intel XMP 3.0 and AMD EXPO overclocking profile support ensures seamless integration regardless of the platform of choice.

The XPG Novakey RGB DDR5-6000 C30 has yet to make its debut on the hardware shelves at U.S. retailers. However, Adata has put the memory kit up for pre-order through Adata’s official online store for $589.99. While the price is certainly steep, it falls within expectations of a premium memory kit that is coming out during the memory shortage. Once things get back to normal, we should see Adata's memory kit at a more reasonable price. But for the meantime, the XPG Novakey RGB DDR5-6000 C30 represents a luxury that not many consumers can buy.

There was a time when PC RAM and storage products were sold with lifetime warranties. Replacement of these components was an inconvenience at worst, with parts exhibiting great reliability and sold at trifling prices. In 2026, the tide has fully turned, and we see even the largest businesses wriggling to avoid warranty repairs and replacements with little shame. Yet another anti-consumer case in point is shared by GRINZ_DOCTOR on the Mildly Infuriating Subreddit. It appears to be a bizarre episode where Best Buy ‘repaired’ an under-warranty laptop by simply removing one of its SODIMMs, testing it worked reliably, and then sent it back to the customer with half the memory it originally shipped with installed, confusion possibly caused by a purchase made from a third-party seller.

You can see at the top of the letter from Best Buy/Geek Squad, dated August this year, the device sent in for warranty repair was a “Lenovo – Upgraded – Legion 5 15.1-inch WXGA Gaming Laptop, Intel i9-14900HX, RTX 5070, 64GB DDR5, 2TB SSD, +1TB dock station, Win 11 Pro” laptop in black, available to buy at Best Buy in the exact configuration. One possible reason for the mishap is that the linked product here is sold by a third-party retailer, PC Heaven, which offers "professionally customized and upgraded configurations." Upgraded in the product listing may be a giveaway that this is, in fact, one of PC Heaven's souped-up options.

GRINZ_DOCTOR sent the eight-month-old 64 GB laptop in for attention after beginning to experience repeated blue screen crashes. The notes mention that underlying software issues were basically ruled out ahead of the warranty return, as reinstalling Windows didn’t help.

Amputation was the chosen 'cure'

The technician accepted the Legion 5 in good cosmetic condition with “no visible wear or damage.” After investigations, the blue screen issues were clearly pinned on RAM, as the Best Buy tech closed the case with repair notes as follows: “Unit has two 32GB sticks for a total of 64GB; this unit only accepts 32GB RAM maximum. One stick of 32GB has been removed and sent back to client with unit.” Before ending the note with the punchline “Unit passed all tests.”

Of course, we don’t know exactly what was done by the repair tech during their fault-finding and resolution process. While GRINZ_DOCTOR insists they bought the unit as described on the upper section of the document with 64GB pre-installed, a product you can still get on Best Buy right now, it seems the most likely explanation for the snafu is that the customer bought an upgraded model from a third-party reseller. Best Buy's insistence that the laptop only supports 32GB of RAM does clash with the user's report that the laptop worked for eight months. Moreover, this certainly doesn't change the fact that they simply took the RAM from the machine without the customer's input. Best Buy also continues to list a configuration of a laptop on its website that the company admits is unsupported by the hardware.

Plenty of commenters have advised escalating the issue with Best Buy. They are advised to go to the store in person and keep escalating until a proper remedy - meaning a new working second RAM stick, or a like-for-like laptop replacement - is done. However, if they did indeed buy a third-party offering, their options may be limited.

Earlier this month, we reported on Micron offering pennies on the dollar for Crucial RAM returns. Meanwhile, in NAND-land, SK hynix reportedly ran out of replacement SSDs and is instead insisting on original purchase price refunds.

We're officially in dire straits. There's almost no way, if you're reading this site, that you aren't aware that memory prices have become entirely divorced from reality. Some are calling it the RAMpocalypse; I prefer "RAMageddon." Whatever you want to call it, though, the reality for PC builders right now is just grim. To put this in perspective, just take a look at our RAM price tracking post:

That's right: 128GB DDR5 kits are fully ten times more expensive than the lowest price we've ever seen. Things improve as you step down the memory capacities and speed tiers, but not as much as we'd like. You're still looking at $392 for a memory kit that was just $72 last year.

To reinforce the point, I pulled the latest average price data from PCPartPicker, comparing where we are today (August 2026) to exactly one year ago. This data is somewhat approximate, but it should be broadly accurate.

The numbers speak for themselves; in just 12 months, the cost of DDR5 memory has essentially exploded. We are looking at year-over-year increases nearing 500% for high-capacity kits. A standard 64GB (2x32GB) DDR5-5600 kit that would have cost you under $200 last summer is now demanding over $1,100. It is a 5x multiplier on a component that used to be a fairly boring and predictable line item in a PC build budget.

If you plan to just wait it out on an older AM4 or LGA1700 motherboard with DDR4, you'd better hope your memory holds out too, because DDR4 isn't safe from the fallout. With DDR5 entirely out of reach for most builders, the resulting scramble for older platforms running DDR4 memory has created a massive knock-on effect, and as a result, DDR4 kits are up anywhere from 120% to nearly 180% across the board. Nowhere near as bad as DDR5 pricing, but it still stings when a kit that was $105 last year is $281 this year.

This phenomenon is by no means exclusive to the US, either. German tech site ComputerBase have also been tracking this global trend, reporting just this week that average RAM prices in Europe have skyrocketed by 345% compared to September 2025. Their data shows the squeeze is bleeding into other components too, with hard drive and SSD prices both climbing over 125% in that same timeframe.

In fact, the situation is so severe that hyperscale buyers have reportedly already locked in almost all of the global DRAM production capacity for 2027, handing over advance deposits to guarantee their supply of precious DRAM, which is now among the highest-value commodities in the world by weight; mainstream DRAM chips are worth over half as much per kilogram as solid gold. PC and smartphone makers are simply fighting over the scraps, as low-priority markets compared to the extremely lucrative AI datacenter buildouts. And lucrative they are indeed; all four memory vendors (SK hynix, Samsung, Micron, and China's CXMT) have increased revenues by double, triple, or even more, all in just the space of one year.

For consumer prices to drop, we would essentially need a major contraction in the AI market, which would mean a massive correction in financial markets worldwide. Absent that, the people actually making the chips don't see an end in sight. SK Hynix CEO Kwak Noh-jung recently warned that 2027 will be the worst year for memory supply in the industry's history, forecasting that demand will outstrip their ability to produce it well into 2030. ADATA's Chairman, Simon Chen, was even more pessimistic, suggesting this DRAM crisis could last another 10 years and dismissing the idea of an "AI bubble" bursting anytime soon.

The era of cheap, plentiful memory is over, at least for now. If you need RAM today, you're either going to have to bite the bullet and pay the premium, or learn to get by with less. Make sure you check out our RAM price tracking post for the best deals we found on memory, as well as some tips on how to secure solid deals yourself.

What could possibly go wrong when you try to steal trade secrets from a restricted facility using a 360-degree action camera hidden in snacks? Forgetting to turn off the device’s Bluetooth and Wi-Fi transmitters, as it turns out.

A senior engineer at Nanya Technology has been indicted in Taiwan for allegedly copying 32 files containing information about the company's DRAM manufacturing process, reports Freedom Times. The engineer was reportedly in talks with Chinese recruitment agencies and allegedly planned to pass Nanya's trade secrets to its next employer in the People's Republic in exchange for higher compensation.

Yeh Yen-wei, a senior engineer in the Advanced Process Development Division at Nanya, joined the company in 2022 and began to communicate with Chinese recruiters in 2025 to explore employment opportunities in the People's Republic. Sometime in mid-February 2026, he submitted his resignation. However, before leaving the company in mid-April, on March 28, April 4, and April 5 — during weekends and either late at night or early in the morning — he visited the company's restricted office areas with his Insta360 X4 Air action camera hidden among snacks to get it past security checks.

Once inside, Yeh used his legitimate account credentials to access Nanya's virtual machines and opened various internal research and development documents. He then used the camera to capture photographs and video of information associated with Nanya's DRAM process technologies and production methods. It goes without saying that he retained the information when he officially resigned from Nanya in mid-April.

However, his actions did not go unnoticed. Nanya's IT security team detected 'abnormal' wireless signals inside the company's restricted facilities (i.e., identified the device using its Bluetooth and/or Wi-Fi signals) and tied them to the employee's access records and activity logs. Eventually, Nanya reported the suspected theft to Taiwanese authorities, which led to an indictment.

The New Taipei District Prosecutors Office charged Yeh under Taiwan's Trade Secrets Act with unauthorized reproduction of trade secrets intended for use in China, an offense for which he faces up to 10 years in prison, as well as with breach of trust under the Criminal Code. Meanwhile, forensic examination of the seized equipment uncovered no evidence that Yeh had successfully transmitted Nanya's confidential information to a Chinese company or anyone outside the company, so he could potentially get off easy.