The LuckyStar K7VA133 offers clock rates of up to 155 MHz for the Front Side Bus. Significant shortcoming: The memory clock cannot be operated asynchronously at 133 MHz with a FSB of 100 MHz. In addition the DIP switches for adjusting the clock rates are not labeled.
Right at the beginning a serious flaw of the LuckyStar K7VA133 becomes apparent: The memory clock can only be set in sync with the clock of the Front Side Bus (e.g. FSB minus 33 MHz). Therefore it is impossible to operate the memory at 133 MHz with a 100 MHz Front Side Bus. Thus the memory can run at a maximum clock rate of only 100 MHz, resulting in a board with a significantly weaker performance than the other test participants. It should be possible to solve this problem with a BIOS update, however. The maximum clock rate of the Front Side Bus is 155 MHz and can be set either in the Bios or with DIP switches. The labels for the latter on the board are incomplete. It is impossible to manually adjust the CPU core voltage. Even though the board supports VCM-SDRAM memory according to the manufacturer, we experienced problems with our NEC memory modules during the test.