The Hybrid Memory Cube Consortium (HMCC) has established a global standard for a disruptive memory computing solution that aims to enable memory to reach a peak aggregate bandwidth of 320 GB/s.
Following a 17-month collaborate development effort, more than 100 developer and adopter members of the Hybrid Memory Cube Consortium (HMCC) have accounted that they have reached a consensus on a global standard for a disruptive memory computing solution. That solution will allow the development of Hybrid Memory Cube (HMC) technology for a wide range of consumer and industrial applications.
The HMC Specification 1.0 currently enables companies to build memory that incorporates HMC's stacked, power efficient technology with capacities of 2 GB, 4 GB and 8 GB. While this may not seem all that impressive, a memory cube with eight links can provide an astonishing peak aggregate bandwidth of 320 GB/s, more than 20 times what is offered by current generation DDR3 memory.
The achieved specification provides an advanced, short-reach (SR) and ultra short-reach (USR) interconnection across physical layers (PHYs) for applications requiring tightly coupled or close-proximity memory support for FPGAs, ASICs and ASSPs, such as high-performance networking, and test and measurement.
HMC technology also holds promise in overcoming the "memory wall" challenge that stems from the capacities of conventional memory architectures being outstripped by the demands of high-performance computers and networking equipment. Overcoming this requires memory that can provide increased bandwidth and density with lower consumptions and was, in fact, one of the key motivations for forming the organization.
"The consensus we have among major memory companies and many others in the industry will contribute significantly to the launch of this promising technology," said Jim Elliott, Vice President, Memory Planning and Product Marketing, Samsung Semiconductor, Inc. "As a result of the work of the HMCC, IT system designers and manufacturers will be able to get new green memory solutions that outperform other memory options offered today."
HMCC is confident that Hybird Memory Cube Architecture will "leap beyond current and near-term memory architectures in the areas of performance, packaging and power efficiency." The consortium now aims to increase data rate speeds from 10, 12.5 and 15 Gb/s to 28 Gb/s for SR and from 10 Gb/s to 15 Gb/s for USR. The next revision of the HMC Specification is expected to gain consortium agreement by Q1 2014
Additional information and technical specifications can be found at HybridMemoryCube.org.