During the three-day virtual Flash Memory Summit for 2020, CEO and founder of NEO Semiconductor, Andy Hsu, gave a detailed presentation covering the company's new X-NAND flash architecture that promises to combine the speed of SLC flash with the density and low pricing of QLC flash.
NEO Semiconductor was founded in 2012 in San Jose, CA, and has twenty memory-related patents to its name. The company first revealed its X-NAND in 2018 as a storage solution for the emerging markets of AI and 5G but has now shared the deep-dive details.
X-NAND promises intriguing performance numbers: The company claims it can do random read and write workloads 3x times faster than QLC flash, and beat it by 27x/14x for sequential read and write workloads, respectively (see above). This is achieved with a far smaller die that's roughly 37% the size of a 16-plane design (see below). There is some flexibility here as speed and die size reduction can be balanced as needed. Still, X-NAND offers particularly high levels of parallelism even for smaller form factors, as you would find in a smartphone or an M.2 drive. The company also claims this can be achieved without impacting endurance or cost, all while consuming very little power.
As the NAND market moves to cheaper but slower flash to increase density, for example, from 3-bit TLC to 4-bit QLC, performance and endurance are inherently reduced. Read and write latencies increase, which can reduce sequential write performance. That's especially detrimental for datacenter and NAS applications.
Consumer QLC drives tend to rely heavily on SLC caching, which consists of part of the native flash operating in single-bit mode. Still, enterprise workloads do not allow for sufficient idle time to migrate written data from the SLC buffer to primary QLC storage.
Instead, X-NAND offers a way for the flash to maintain SLC performance throughout by allowing for simultaneous SLC and QLC write modes (see below).
Hsu was quick to point out that higher-density flash is growing at a rapid rate, citing Western Digital’s anticipation that up to 50% of the market would be comprised of QLC by 2024. His goal with X-NAND was to make sure it used a conventional NAND process with no structural changes, no additional manufacturing costs, and fast development with quick sampling as a solution based on current NAND. That strategy is designed to speed up the adoption of QLC, especially for the data center as flash performance would no longer fall drastically behind I/O speeds. Further, X-NAND programming and erase policies are designed to drastically improve endurance over QLC flash (see below).
X-NAND achieves these gains by going from a 16KB page buffer per plane to a 1KB page buffer per plane, but with sixteen times the planes, as one example.
A plane tends to be the smallest unit of interleaving for flash, with one or more planes per flash die. The page buffer holds data in transit, like read or write data, between the bus and the flash. A flash die is divided into planes containing bit lines or strings of cells (see above), so planar division can reduce the bit line's length, which helps boost performance. This technique is further enhanced by shielding between adjacent bit lines to reduce settling time when reading or verifying a program (see below). Write performance is increased because up to sixteen bit lines can be programmed in parallel.
X-NAND has six primary features: multiple bit line writes, multi-plane QLC programming, program suspend, multi-BL reads, single latch QLC reads, and the aforementioned SLC/QLC parallel programming. Depending on the implementation, this can improve program throughput substantially as multiple planes can be used in the programming sequence (see below).
The use of multiple banks allows for simultaneous SLC and QLC programming, ensuring the SLC pages are never full, while data can be programmed to the QLC pages at SLC speed. The program suspect function enables using the internally shared inter-page buffer data lines or I/O bus to minimize additional latency. Reads are improved by having a plane latch the read per bit line, with DRAM-like refreshing of data in a non-destructive way due to high capacitance.
X-NAND can work with any number of existing NAND layouts, which increases its flexibility and ease of conversion (see below). NEO Semiconductor intends for the tech to be cost-effective, fast, and easy to implement with existing designs.
The company says it is especially useful with higher-density flash like QLC because it can leverage the high capacity with a balance of high performance and lower die area while being affordable with good endurance and power consumption. The tech is aimed at embedded devices, AI, and the cloud, including NAS, data center, and edge computing.
If it does in fact come out at QLC prices...HDD's will be dead for anythign other than archiving (where they need MASSIVE TB's)
can't wait for it to come to market and try it out in RAID:geek:
If you check the presentation, which I've uploaded in document form here, you can see he talks about it always writing to SLC mode first and without disturb (pg. 49).
There has been Many promising new alternate to normal nand, but so far only Intel with Micron has come out with something like this... but at wery high cost...
so I hope for the best but am not holding my breath yet. Promising, but we need consumer products to make this real.
I think one thing people confuse a lot with this technology is that they assume it's different NAND - it's explicitly not. It's meant to be a drop-in change to existing flash. What you're talking about is 3D Xpoint (crossbar memory) which is a completely different thing than NAND. Although, X-NAND is decidedly not oriented at consumer usage.
Getting more out of QLC using a variety of techniques is nothing new, in fact there were more than just this at FMS this year.
QLC is never going to be good enough or cheap enough to be worth buying over TLC. Anything that improves QLC can be used to improve TLC by an even wider margin, so it's always going to be worth paying that extra ~$20 for the much higher speeds and 10x the endurance... And that's just TLC, which is still bad compared to MLC and especially SLC, but at least in that case the price drop was actually more significant.
X-NAND makes QLC perform more like SLC.
X-NAND dramatically improves the endurance of QLC.
X-NAND is most useful for QLC, since it supposedly fixes its main limitations.
So, pretty much the opposite of what you are suggesting. There might be some limitations, but it definitely seems like a positive development.
And as I pointed out before, QLC is already arguably pretty good when implemented properly. The vast majority of today's applications and usage scenarios won't see much benefit from higher-end flash, so it doesn't make much sense for most people to pay more for it. Maybe someday, applications will be optimized to fully make use of something like 3D Xpoint, and the pricing will be down to practical levels, but today those advanced storage technologies are terribly priced, and don't really improve the performance of most real-world tasks substantially. Even for the higher-end NAND drives, many people would be better served by getting a lower-end drive with double the capacity for about the same price than to pay a huge premium for a given capacity with maybe 10% better real-world performance. SSD pricing has certainly gotten better, but it's still high enough that many people are getting lower-capacity drives than would be ideal, so reducing costs is still an important focus.
To those mentioning consumer usage, I got the impression this was intended for datacenter/enterprise implementation before it might be incorporated into consumer applications. Only "embedded devices" were mentioned in the usage cases. So I think they intend to get their money from enterprise, either through direct purchases/licensing deals. Sounds like a good target for revenue. If it delivers exactly what they said, then it will be a great tech to have & could have some significant savings for enterprise storage as well.