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Intel, SK hynix shares surge following reports of chip packaging partnership — SK is said to be testing Intel's 2.5D EMIB for HBM integration
By Luke James published
The rally followed a report claiming that SK is conducting R&D with Intel on 2.5D packaging using Intel's EMIB technology.

Apple reportedly strikes deal for Intel to make some of its chips
By Jowi Morales published
Intel and Apple have reportedly reached a deal in which the former will manufacture chips for the latter.

Global semiconductor sales hit nearly $300 billion in Q1 2026 — chips are on track to top $1 trillion for this year, says report
By Anton Shilov published
Sales of chips in Q1 2026 hit $298.5 billion and are on track to exceed $1 trillion this year, according to the Semiconductor Industry Association.

Apple considering Intel and Samsung for US chip production, report claims
By Jowi Morales published
It seems that TSMC cannot supply all the chips that Apple needs, so it's looking for a US-based alternative to increase production.

China pushes for 70% homegrown silicon wafer use as domestic firm ramps up 12-inch production
By Etiido Uko published
China is targeting 70% local wafer sourcing as firms like Eswin scale 12-inch production, aiming to reduce reliance on foreign suppliers and support growing AI chip demand.

ASML's roadmap for chipmaking lithography tools examined — from DUV to Low-NA, High-NA, Hyper-NA, and beyond
By Luke James published
Premium ASML shipped 48 EUV lithography systems and 131 immersion DUV tools in 2025, generating €32.7 billion in total revenue and ending the year with a €38.8 billion order backlog.

Intel details 18A-P process node, touts higher performance, lower power, and much more
By Anton Shilov published
Intel details improvements of 18A-P that include higher performance, lower power, reduced variability, improved yields, and more.

TSMC SoIC 3D stacking roadmap outlines path from 6-micron pitches today to 4.5-micron in 2029
By Anton Shilov published
Premium TSMC adds support for face-to-face stacking, 6.5 µm and 4.5 µm pitches for the next generation of SoIC 3D stacking.
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