Latest about EUV
TSMC says it doesn't need High-NA EUV chipmaking tools for 1.6nm-class node, but Intel has championed the tech
TSMC says it will not need a high-NA litho tool for its A16 technology but will keep exploring it for A16 and beyond.
ASML ships its second High-NA EUV litho tool to unspecified client
ASML begins to ship its High-NA EUV lithography system to the second customer
Samsung to double investment in Texas fab, spend $44 billion to build leading-edge chips: Report
Samsung to add another fab module, an advanced packaging facility, and an R&D center to its Taylor, Texas, campus.
Taiwan earthquake causes estimated $62 million in damage and disruptions for TSMC
Insiders talk about broken beams, columns, and cracked walls.
Samsung rep says High-NA EUV is good for logic, but might have cost issues for memory fabrication
Samsung shares its views on High-NA EIV costs, while other companies present more bullish views.
Intel and ASML achieve 'First Light' milestone with world's most advanced chipmaking tool
ASML and Intel achieve first light on wafer milestone with ASML's Twinscan EXE:5000 lithography system for the first time.
ASML explores Hyper-NA chipmaking tools as the next step in shrinking transistors
ASML mulls Hyper-NA lithography with a higher than 0.7 numerical aperture in 2030s.
Equipment delivery to Intel's Ohio fab delayed for several weeks
The transportation of Intel's oversized equipment to its Ohio fab is delayed to February 17.