RISC V: The Open Standard Architecture
RISC-V is an open-standard (or open-source, depending on who you ask) instruction set architecture (ISA) for CPUs that was first established in 2014, maintained by RISC-V International. The basic premise for RISC-V is that any company can take the ISA and make their own CPUs, bypassing the closed ecosystems of Arm, AMD, and Intel. Since its debut, RISC-V has grown extremely quickly, with 16 billion cores sold forecasted by 2030.
Latest about RISC V
China's Unisoc launches 'world's first' open architecture RISC-V security chip
By Anton Shilov published
Unisoc launches RISC-V security chip, the E450R.
Senior Intel CPU architects splinter to develop RISC-V processors
By Mark Tyson published
Extensive brain drain won’t help Intel bounce back.
SiFive sets the stage for 256-core RISC-V CPUs with P870-D core
By Anton Shilov published
SiFive unveils Performance P870-D, its highest-performance core yet, sets the stage for 256-core datacenter CPUs.
Sam Altman-backed AI processor venture hires ex-Apple engineer
By Anton Shilov published
Sam Altman-backed Rain AI hires ex-Apple senior director of SoC engineering to lead hardware engineering.
Smartphone SIM card has embedded CPU core
By Dallin Grimm published
This is China Mobile's new 'super SIM card.'
Framework embraces RISC-V processor trend with new laptop mainboard
By Jowi Morales published
DeepComputing has built a prototype RISC-V mainboard for the Framework Laptop 13. It will debut at the RISC-V Summit Europe event next week.
The world’s first RISC-V laptop gets a big upgrade
By Jowi Morales published
The world's first RISC-V laptop gets a better SoC, Ubuntu OS straight out of the box.
RISC-V adoption predicted to get AI boost
By Dallin Grimm published
Industrial and automotive industry demands seem likely to turn to RISC-V over Arm, says Omdia
US investigates China's access to RISC-V — open standard instruction set may become new site of US-China chip war
By Dallin Grimm published
U.S. lawmakers again review the risks of China's access to powerful chips through the RISC-V standard, an open-source ISA that wants to remain open to all.
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