RISC-V is an open-standard (or open-source, depending on who you ask) instruction set architecture (ISA) for CPUs that was first established in 2014, maintained by RISC-V International. The basic premise for RISC-V is that any company can take the ISA and make their own CPUs, bypassing the closed ecosystems of Arm, AMD, and Intel. Since its debut, RISC-V has grown extremely quickly, with 16 billion cores sold forecasted by 2030.
Latest about RISC V
Chinese project aims to run RISC-V code on AMD Zen processors
A new contest inspired by Google's Zentool challenges developers to modify AMD Zen CPU microcode to run RISC-V programs natively, but experts argue the goal is unfeasible.
DeepComputing's RISC-V mini AI PC that fits inside a Framework laptop shell revealed
DeepComputing's newest product, a mini AI PC that can be put in the Framework Laptop 13, is now taking preorders.
Minimal Linux OS runs in a 6MB PDF document in Chrome — LinuxPDF leverages RISC-V emulator
A version of the Linux operating system can now be toyed with inside a PDF opened by a Chromium-based browser.
China's SpacemiT develops 64-core RISC-V datacenter CPU on 12nm
SpacemiT's VitalStone V100 has 64-cores, but its single-thread performance is comparable to that of 2011 processors.
Qualcomm is hiring a data center chip architect for Snapdragon-based reference server designs
Qualcomm is looking for a server SoC security architect, according to a job listing.
Imagination quits RISC-V CPU business to focus on GPUs and AI
No more RISC-V CPUs for Imagination Technologies as the company divests its Catapult business.
It looks like the Raspberry Pi RP2350 Hacking Challenge may have been beaten
We may have a winner for the $20,000 Raspberry Pi and Hextree RP2350 Hacking Challenge after engineer Aedan Cullen went public with his Hacking the RP2350 presentation at the recent 38C3.
Ubitium announces development of 'universal' processor that combines CPU, GPU, DSP, and FPGA functionalities
RISC-V startup Ubitium says it’s working on a processor that can tackle any workload whether it’s made for CPUs, GPUs, DSPs, or FPGAs.
