RISC V: The Open Standard Architecture
Latest about RISC V

New RISC-V microprocessor can run CPU, GPU, and NPU workloads simultaneously
By Aaron Klotz published
XSi has created a new RISC-V microprocessing chip architecture that combines a RISC-V CPU core with vector capabilities and GPU acceleration into a single chip.

China-made RISC-V PCIe 5.0 SSD controller promises up to 14.2 GB/s without a fan
By Zhiye Liu published
Yingren (aka InnoGrit) has announced the YRS820, a high-end PCIe 5.0 controller for consumer SSDs based on the RISC-V architecture.

Alibaba claims it will launch a server-grade RISC-V processor this year
By Anton Shilov published
Alibaba continues to flex its RISC-V muscle, expects to roll-out datacenter-grade RISC-V CPU this year.

Google to use RISC-V for its custom AI silicon — TPU to get open source compute core: Report
By Anton Shilov published
SiFive's optimistic outlook may point to new RISC-V licensing deal with Google.

India's homegrown Aries 3.0 board has an onboard Vega CPU
By Christopher Harper published
India launches a RISC-V powered Aries v3.0 development board for roughly the equivalent of $20 USD. It's powered by a 32-bit, 100 MHz CPU with 256KB of SRAM.

Chinese chipmaker tapes out 16-core DragonChain-powered CPU, 64-core coming
By Anton Shilov published
Loongson tapes out the 16-core/32-thread LS 3C6000 CPU, preps 32-core and 64-core processors.

China planning 1,600-core chips that use an entire wafer
By Anton Shilov published
Chinese Academy of Sciences builds 256-core Zhejiang 'Big Chip,' looking towards wafer-scale chips .

RISC-V hardware ecosystem sees strong industry support with the establishment of Quintauris
By Matthew Connatser published
Qualcomm and four other semiconductor companies have jointly formed Quintauris, which is dedicated to enabling next-generation RISC-V hardware development.
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