Alibaba claims it will launch a server-grade RISC-V processor this year

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Alibaba continues to expand its RISC-V portfolio.

T-Head
(Image credit: T-Head)

Alibaba's research division, the Damo Academy, recently announced expansion of its RISC-V efforts, which includes the Xuantie C907 matrix compute core and the Xuantie C930 datacenter-oriented processor, according to Sohu. The server-grade CPU is expected to be launched this year, reports The Register.

One of the ways for Chinese companies to sidestep U.S. export curbs regarding high-performance computing and artificial intelligence technologies is by developing their own processors for AI and HPC based on their own cores (based on the RISC-V instruction set architecture, or ISA). Alibaba's T-Head chip division was one of the first companies to realize the potential of the RISC-V ISA a few years ago — so it has quite a lot of experience with the technology by now. 

T-Head introduced its first RISC-V-based Xuantie C910 processor for client systems around two years ago and Alibaba has been selling PCs based on this CPU for a while. For some reason, the processor is no longer listed on the company's website. The same C910 core is used for the company's PCIe Gen5 Zhenyue 510 enterprise-class SSD controller that are used for a variety of drives. 

Now the T-Head Xuantie 930 processor is set to power servers, including those machines running artificial intelligence workloads — though it remains to be seen whether Alibaba plans to use them for its cloud datacenters, or for something else. 

In addition, Alibaba's chip unit T-Head intends to introduce its Xuantie 907 matrix computing unit, though it's unclear whether we're dealing with a separate datacenter SoC for AI workloads or an IP core that can be added to another processor, say, to the Xuantie 910 or Xuantie 930. 

"As the demand for new computing power surges, the development of RISC-V is undergoing a metamorphosis and is about to enter a period of application explosion," said Zhang Jianfeng, president of the Damo Academy. "The Damo Academy will continue to increase its R&D investment and ecosystem co-building in RISC-V, promoting collaborative innovation and development of the industry upstream and downstream." 

Since native RISC-V technology is crucial for Chinese companies to avoid U.S. export curbs, it's developing very fast in China. As a result, hardware and software companies have been collaborating to create a competitive ecosystem around this ISA, the report from Sohu notes.

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Anton Shilov
Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

10 Comments Comment from the forums
  • Findecanor
    No details about the XuanTie C930 core are public yet, except for some wild claims:
    * Supposed SPECint 2006 performance of 15/GHz.
    * Supposed compliance with the "RVA24" profile, on which work has hardly even started yet.
    Reply
  • JTWrenn
    Am I the only who read that as Alabama and was terrified for a minute?

    Will be interesting to see what they come out with and if any software supports it. For now it has a whole lot to catch up to.
    Reply
  • JamesJones44
    JTWrenn said:
    Am I the only who read that as Alabama and was terrified for a minute?

    Will be interesting to see what they come out with and if any software supports it. For now it has a whole lot to catch up to.
    Software support on the server side is fairly robust already. Most of the major languages support RISC-V as a target. Java or JVM based languages like Ruby or Java Script (NodeJs for example) not an issue, just install and run (C# support is currently in beta). C/C++ and Rust for example already have RISC-V target support on Linux, the software in many cases just needs to be recompiled. Popular server operating environments such as Kubernetes and Docker already support RISC-V.

    RISC-V is behind in software support, but in truth for the server environment it's not that far behind.
    Reply
  • das_stig
    Always had this crazy thought in my mind for an open source NAS/router.
    Risk-V, open socket, choose your number of cores and speed
    2-4 ram slots for large memory capacity.
    4-8 bays, maybe NVMe and 2.5" SATA models
    2 or more slots for off the shelf wifi cards for AP's
    4+ LAN, minimum of 2.5G, maybe a couple of 10G, managed switch
    TrueNas/Unraid + open source router/linux + other software in isolated containers/jails/vm's

    and if made in bulk, reasonable prices for all the components, yes I can dream :unsure:
    Reply
  • ahmad1900
    JamesJones44 said:
    Software support on the server side is fairly robust already. Most of the major languages support RISC-V as a target. Java or JVM based languages like Ruby or Java Script (NodeJs for example) not an issue, just install and run (C# support is currently in beta). C/C++ and Rust for example already have RISC-V target support on Linux, the software in many cases just needs to be recompiled. Popular server operating environments such as Kubernetes and Docker already support RISC-V.

    RISC-V is behind in software support, but in truth for the server environment it's not that far behind.
    question, is risc v running well natively? Android OS only supports RISC V (but doesn't make much hardware yet) Docker only supports X86-86, Arm, PowerPC, IBM doesn't support RISC V yet
    Reply
  • ahmad1900
    JTWrenn said:
    Am I the only who read that as Alabama and was terrified for a minute?

    Will be interesting to see what they come out with and if any software supports it. For now it has a whole lot to catch up to.
    Does it work well natively, does the Android OS only support RISC V (the question is whether RISC V is good natively, RISC V uses the Android OS, the number of hardware is still limited. rather than Arm dominating)
    Reply
  • ahmad1900
    das_stig said:
    Always had this crazy thought in my mind for an open source NAS/router.
    Risk-V, open socket, choose your number of cores and speed
    2-4 ram slots for large memory capacity.
    4-8 bays, maybe NVMe and 2.5" SATA models
    2 or more slots for off the shelf wifi cards for AP's
    4+ LAN, minimum of 2.5G, maybe a couple of 10G, managed switch
    TrueNas/Unraid + open source router/linux + other software in isolated containers/jails/vm's

    and if made in bulk, reasonable prices for all the components, yes I can dream :unsure:
    I dont, the risc v experience architecture is still relatively new compared to the arm architecture.
    Reply
  • ahmad1900
    Findecanor said:
    No details about the XuanTie C930 core are public yet, except for some wild claims:
    * Supposed SPECint 2006 performance of 15/GHz.
    * Supposed compliance with the "RVA24" profile, on which work has hardly even started yet.
    I still don't know the performance, just try the product. Don't know which semiconductor is willing to produce it, will it use 7nm SMIC like the Kirin 9000S?
    Reply
  • JamesJones44
    ahmad1900 said:
    question, is risc v running well natively? Android OS only supports RISC V (but doesn't make much hardware yet) Docker only supports X86-86, Arm, PowerPC, IBM doesn't support RISC V yet
    In the experiments we've done we not run into issues running content natively. Docker doesn't have official support for RISC V yet, but there are several projects that add support:

    https://github.com/carlosedp/riscv-bringup#virtual-machine-and-pre-built-docker
    and

    https://github.com/carlosedp/riscv-bringup/blob/master/kubernetes/Readme.md
    This is pretty much the same path ARM took until things like above got folded into official support.
    Reply
  • ahmad1900
    JamesJones44 said:
    Dalam eksperimen yang kami lakukan, kami tidak mengalami masalah dalam menjalankan konten secara asli. Docker belum memiliki dukungan resmi untuk RISC V, namun ada beberapa proyek yang menambahkan dukungan:

    https://github.com/carlosedp/riscv-bringup#virtual-machine-and-pre-built-docker
    Dan

    https://github.com/carlosedp/riscv-bringup/blob/master/kubernetes/Readme.md
    Ini adalah jalur yang hampir sama yang diambil ARM hingga hal-hal seperti di atas dimasukkan ke dalam dukungan resmi.
    does Risc V run optimally docker. (Android, supports Risc V hardware. But it doesn't seem like much compared to the dominant hardware arm. Just try Qualcomm's Risc V hardware)
    Reply