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MIT Advances E-Beam Lithography for Chips

By - Source: MIT | B 24 comments

Researchers at MIT consider e-beam lithography as a potential future candidate for semiconductor mass production.

It is unclear how far in the future, as the current immersion lithography technology has been much more stubborn than we originally thought a decade ago. Companies such as Intel, have successfully pushed out the adoption of the extremely expensive transition to extreme ultraviolet lithography (EUV) so far.

MIT researchers now believe that e-beam lithography, which is commonly used for prototyping and is currently a slow and low-volume production process for semiconductors, could be an option for chip manufacturers as the technology can be scaled down to structures of 9 nm. Compared to e-beam lithography, traditional photolithography uses light that shines through the entire surface of a mask at once. The e-beam uses electrons that scans across the surface of the resist (a material that covers each layer of a chip) on a row-by-row basis.

The MIT researchers said that they were able to increase the efficiency of e-beam lithography by using a thinner mask, which requires less energy per beam and enables a higher number of parallel electron beams to accelerate the production process. They also said they used a common table salt solution to "develop the resist, hardening the regions that received slightly more electrons but not those that received slightly less."

There is doubt that the MIT approach will find its way into production. One manufacturer of lithography systems, Mapper, said that the presented system was "a little bit too sensitive."

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  • -2 Hide
    house70 , July 1, 2011 10:20 PM
    "One manufacturer of lithography systems, Mapper, said that the presented system was "a little bit too sensitive."

    Time will prove Mapper wrong. If you can't imagine something, that doesn't mean it's impossible.
  • 3 Hide
    Anonymous , July 1, 2011 10:38 PM
    house70 this is not a question about imagination they are basically saying the resist system is too sensitive when combined the noise inherent in their exposure tool to give the type of results customers are asking for. Sounds like the researchers haven't been listening hard enough to their end customers which strikes me as bad business.
  • 5 Hide
    phatboe , July 1, 2011 11:00 PM
    OK I don't know too much about transistor lithography but I thought the main problem with going to smaller scales wasn't so much that they couldn't make smaller transistors but that was the transistor size shrinks electron tunneling which leads to current leakage increases.

    How will using an E-beam help with that?
  • 1 Hide
    alidan , July 1, 2011 11:17 PM
    phatboeOK I don't know too much about transistor lithography but I thought the main problem with going to smaller scales wasn't so much that they couldn't make smaller transistors but that was the transistor size shrinks electron tunneling which leads to current leakage increases.How will using an E-beam help with that?


    im guessing that it would make it more accurate, and if dont right, make the process faster than it currently is.

    how long does it take now to process a chip? and how much of that time is waiting on crap to finish?
  • -1 Hide
    dogman_1234 , July 1, 2011 11:21 PM
    It seems to better manufacturing, not really changing how the transistor works. Some research is also being done on using graphene as a template, but still too small for light.

    Best chances the semiconductor industry has is to build transistors by atom.
  • 0 Hide
    cheepstuff , July 1, 2011 11:53 PM
    phatboeOK I don't know too much about transistor lithography but I thought the main problem with going to smaller scales wasn't so much that they couldn't make smaller transistors but that was the transistor size shrinks electron tunneling which leads to current leakage increases.How will using an E-beam help with that?


    Of course shrinking to smaller scales is a problem. If it wasn't why didn't we reach the theoretical transistor size limit a decade ago? Making transistors smaller is a problem that may escape our notice, however because chip makers have been able to consistently whittle down sizes since the first CPU.
    MIT has revisited and possibly improved on a lithography method that, although less expensive than Intel's method, has a yield that is too low volume to be practical in mass production. It has nothing to do with the transistor size limit, there is a whole lot more involved with chip fabrication than a single theoretical boundary the industry has not run into yet.
  • 1 Hide
    Anonymous , July 2, 2011 12:35 AM
    We're already at the point of diminishing returns, it'll only get worse from here. 40, 32, 28 and 22nm have been problematic for everyone. Fortunately, Intel PR convinced everyone it wasn't, with "we haven't made a 32nm quad yet because we don't feel the need to" and "please disregard that the 22nm delay has ruined our stated tick-tock strategy".

    Leakage is the enemy, and it's going to be exponentially worse at future nodes.
  • 0 Hide
    bison88 , July 2, 2011 2:12 AM
    How small can they go is the question before having to move into a different direction instead of shrinkage to increase processing power?
  • 1 Hide
    ojas , July 2, 2011 6:09 AM
    This is MIT we're talking about...they'll manage something soon enough...
  • 0 Hide
    whatisupthere , July 2, 2011 6:10 AM
    phatboeOK I don't know too much about transistor lithography but I thought the main problem with going to smaller scales wasn't so much that they couldn't make smaller transistors but that was the transistor size shrinks electron tunneling which leads to current leakage increases.How will using an E-beam help with that?


    I may be wrong but I believe phatboe is talking about quantum tunneling. To keep it simple. The cpu is made up of many circuits with paths for electrons to flow. The paths are divided by barriers to electron flow. When the barrier width becomes to small it cannot contain the electrons very well. Even if the barriers are really really high it doesn't matter because the electron can just appear on the other side sometimes. This results in increased current leakage. I believe it is supposed to become a major problem at 9nm. I imagine this technology would not help with this problem. anyone have insight on this?
  • 0 Hide
    stuart72 , July 2, 2011 8:57 AM
    Interesting, always wondered with UV resist what happens when then track size gets close to the miniumum UV wavelength (10ish nm). With electrons wave length is going to depend on the speed they are moving, but electron microscopy uses 10pm resolution routinely.
  • 0 Hide
    soundping , July 2, 2011 9:35 AM
    You would think by now a different cpu design would be in the works.

    How long has 0/1 switch processing been around?
  • 0 Hide
    jsc , July 2, 2011 11:18 AM
    The problem is that the binary switch is so easy to do.
  • 0 Hide
    americanbrian , July 2, 2011 2:55 PM
    @ soundpig & jsc:

    I think analogue computing might come back into fashion at some point soon. Their are some pretty cool things it can do that digital (binary) can't.
  • 0 Hide
    fir_ser , July 4, 2011 11:42 PM
    It’s good to hear about a current technology that can be scaled down to structures of 9nm.
    But they improve it and make it more feasible for mass production.
  • 0 Hide
    palladin9479 , July 5, 2011 8:09 AM
    The problem isn't the size, its quantum mechanics taking over. When you have two conducting paths running in parallel of each other and the distance between them is less then the electrons gyro-radius, then the electron can and will tunnel for one conductor to another bypassing anything in-between. What people must realize is that molecules are full of empty space, lots of empty space. Electrons are very very very small, they easily fit inside the empty space of every atom in the world. Typically electrons have no desire to do this and will follow the path of least resistance using EM laws. Electrons don't more in a straight line, they actually are spinning in large circles based on how much energy they have. More energy (voltage in this case) means larger circles. It has proven impossible to control the exact position of an election, you can just control the approximate position by forcing it to move in a direction and thus control the center of its circle. If the electron has multiple paths available that are within its circle, then it can and will jump to whatever path has the least resistance at that exact moment in time that the electron pass's near the second path. To an observer it appears that the electrons charge jumped from one conductor to another without moving through the intervening space.

    Electrons are basically always tunneling through all mater, it's just a very predictable movement.. usually.

    So yeah to get down to 9nm, we will face a choice of insanely large amounts of unused die space (9nm lanes but 15~20nm spacing in-between), or insanely low voltage (0.5~0.8v). Low voltage will make getting high clock speeds difficult, wasted space will increase price. Pick your poison.
  • 0 Hide
    doorspawn , July 5, 2011 9:40 AM
    americanbrian@ soundpig & jsc:I think analogue computing might come back into fashion at some point soon. Their are some pretty cool things it can do that digital (binary) can't.


    There is nothing an analogue computer can do that a binary can't.

    Any analogue value that has a margin of error (ie. any analogue value) can be represented by binary. As long as you use enough bits, any real value that would round to the value represented by the binary value is within said margin of error.

    It is possible some calculations may be done faster in analogue, but you build up error with each operation, error that is usually removed by regularly converting to and from binary.

    Also - not every wire in a binary chip has only two states - many have 3 (positive, negative and floating).
  • -1 Hide
    lamorpa , July 5, 2011 12:26 PM
    "The e-beam uses electrons that scans across the surface of the resist (a material that covers each layer of a chip) on a row-by-row basis."

    Um.......yeah.
  • 0 Hide
    lamorpa , July 5, 2011 12:29 PM
    americanbrianTheir are some pretty cool things it can do that digital (binary) can't.


    The questions is:

    A. Their are some pretty cool things...
    B. They're are some pretty cool things...
    C. There are some pretty cool things...

    It's a 5th grade English question. Any takers?
  • 0 Hide
    pale paladin , July 5, 2011 9:34 PM
    The change in size could also allow for more real-estate for cores and cache as well. While it may limit voltage and in turn clock speed it may also create a multi-core proc that is ultra efficient and powerful. then again the utilization of multi core cpu's is hardly impressive today so who's to say the Dev will get any better soon?
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