We caught up with PCI-SIG, the organization that defines the PCI Express bus and form factor specifications, at the yearly Hot Chips conference. PCIe is the ubiquitous engine that pulls a big part of the computing locomotive down the track—it touches nearly every device in your computer. As such, it is the linchpin for the development of many other technologies, such as storage, networking, GPUs, chipsets, and many other devices.
Considering its importance, it isn't surprising to find the PCI-SIG with 750 members worldwide. Unfortunately, large organizations tend to move slowly, and PCIe 4.0 is undoubtedly late to market. PCIe 3.0 debuted in 2010 within the normal four-year cadence, but PCIe 4.0 isn't projected to land in significant quantities until the end of 2017—a seven-year gap.
PCI-SIG representatives attributed part of the delay to industry stagnation. The PCIe 3.0 interface was sufficient for storage, networking, graphics cards, and other devices, for the first several years after its introduction. Over the last two years, a sudden wellspring of innovation exposed PCIe 3.0's throughput deficiencies. Artificial intelligence craves increased GPU throughput, storage devices are migrating to the PCIe bus with the NVMe protocol, and as a result, networking suddenly has an insatiable appetite for more bandwidth.
The industry needs PCIe 4.0 to land soon, and PCI-SIG assures us it will ratify the new specification by the end of 2017. The sluggish ratification process hasn't hampered adoption entirely, though. Several IP vendors already offer 16GT/s controllers, and many vendors have already implemented PCIe 4.0 PHYs into their next-generation products. These companies are plowing ahead with the 0.9 revision of the specification, whereas the final ratified spec debuts at 1.0.
PCI-SIG says it is accelerating the development and feedback processes, along with simplifying early specification revisions, in a bid to reduce time to market for future specifications.
PCI-SIG indicates that PCIe 4.0 will be a short-lived specification because the organization has fast-tracked PCIe 5.0 for final release in 2019.
PCIe 4.0 will bring us 64GBps of throughput, while PCIe 5.0 will double that to 128GBps. Both revisions still leverage the standard 128b/130b encoding scheme that debuted with PCIe 3.0. PCI-SIG representatives said they are satisfied with the 20% reduction in overhead facilitated by the 128b/130b encoding, and further encoding refinements to reduce the current 1.5% overhead are subject to a diminishing point of returns.
Although we have yet to see PCIe 4.0 on the market, the fast-tracked PCIe 5.0 is already on revision 0.3, and the group predicts 0.5 will be available by the 4Q17.
The PCI-SIG defines the specification, but it has no control over when the end devices make it to market. Intel and AMD are the key enablers for the broad desktop market; we certainly won't see PCIe 4.0 GPUs and SSDs without a slot to plug them into. AMD has slated PCIe 4.0 for 2020. We imagine Intel is also chomping at the bit to deploy PCIe 4.0 3D XPoint and NVMe SSDs, but the company remains silent on its timeline.
