The physical design of modern processors usually takes years and costs tens or hundreds of millions of dollars, depending on the complexity and process technology. Semiconductor startup Zero ASIC has announced a platform that allows for quick assembly of a highly-customized multi-chiplet system-in-package (SiP) out of known-good chiplets. The ChipMaker platform is set to democratize custom silicon development.
Developing a custom application-specific integrated circuit (ASIC) from concept to production is too long and too expensive for many startups. Zero ASIC's ChipMaker platform simplifies the process by using chiplet-based designs, hiding the complexities of circuit design and enabling users to swiftly and accurately test and modify their custom designs before ordering the physical devices. This is all accomplished using cloud FPGAs (Field Programmable Gate Arrays) to implement the RTL source code.
Zero ASIC's platform relies on eFabric, a 3D interposer that enables die-to-die communication, and eBrick, a collectionof pre-fabbed 3D chiplets with plug-and-play capabilities.
The eFabric acts as a dynamic 3D interposer with a grid-like structure with 512 Gb/s/mm on-fabric bisection bandwidth. The 3D interposer facilitates the integration of processing units using 3D-connected interoperable eBrick chiplets with a 128 Gb/s/mm2 chiplet 3D bandwidth. It also supports the incorporation of off-package IO functions through 2D-connected UCIe-based ioBrick chiplets with 128 Gb/s/mm chiplet 2D bandwidth.
For now, Zero ASIC has a moderate catalog of 2 mm^2 eBrick chiplets, including a quad-core RISC-V Linux-capable dual-issue CPU, 5K LUT embedded FPGA, 3MB SRAM, and 3 TOPS ML (tera-ops per second machine learning) accelerator. These chiplets are being used to demonstrate capabilities of the platform at the Open Compute Platform Summit/Open Chiplet Economy Center on October 17-19, in San Jose, California.
Zero ASIC expects the catalog of eBrick chiplets to expand significantly over time. This in turn will allow the ChipMaker platform to become ever more viable, though it does not disclose how it plans to achieve this.
"Custom Application Specific Integrated Circuits (ASICs) offer 10-100X cost and energy advantage over commercial off the shelf (COTS) devices, but the enormous development cost makes ASICs non-viable for most applications," said Andreas Olofsson, CEO and founder of Zero ASIC. "To build the next wave of world changing silicon devices, we need to reduce the barrier to ASICs by orders of magnitude. Our mission at Zero ASIC is to make ordering an ASIC as easy as ordering catalog parts from an electronics distributor."
It certainly sounds interesting. Whether it will actually work and gain traction remains to be seen.
Stay on the Cutting Edge
Join the experts who read Tom's Hardware for the inside track on enthusiast PC tech news — and have for over 25 years. We'll send breaking news and in-depth reviews of CPUs, GPUs, AI, maker hardware and more straight to your inbox.
Anton Shilov is a Freelance News Writer at Tom’s Hardware US. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.
This is a truly ingenious approach. If the catalog of chiplets grows over time, including I/O, this might become an indespensible toolkit for creating own modular chips and even SoCs.Reply
The DIY-community will rejoyce!
They didn't say anything about costs. I'm expecting these to be much too expensive for most home hobbyists. They're probably aiming it more at small and medium-sized production runs of specialty equipment, where the cost of a custom ASIC or SoC is currently prohibitive. Just a guess.ottonis said:The DIY-community will rejoyce!