AMD Piledriver Cores to Use Energy Recovery Tech

In a speech at ISSCC 2012, AMD and Cyclos provided first details about the IP that will be embedded in the Piledriver core to assist in achieving a clock speed that exceeds 4 GHz.

According to Cyclos, its resonant clock mesh (RCM) technology is similar to the technique some hybrid cars use via KERS, short for kinetic energy recovery system. Inductive-capacitive oscillators are leveraged in mesh-based high-performance clock distribution networks to deliver "high-precision timing while dissipating almost no power." In effect, RCM promises to recycle clock power to enable lower power consumption or higher clock speeds. AMD said that the technology result isa 24 percent drop in clock distribution power. The total IC power reduction is, depending on the chip design, estimated between 5 and 30 percent, but will be at the lower end (5 to 10 percent) in Piledriver.

AMD's Piledriver is the first high-volume processor core to use the RCM IP.

Create a new thread in the US News comments forum about this subject
This thread is closed for comments
46 comments
Comment from the forums
    Your comment
    Top Comments
  • Marco925
    Looks promising. but we want to see to believe.
  • Anonymous
    Now if only AMD could get Drag Reduction System (DRS) going and up their instructions-per-cycle we could have a great race!
  • de5_Roy
    amd is making bold claims about power efficiency again.
    hopefully they'll do it right this time and not blame on everything else like they did with bulldozer.
  • Other Comments
  • chumly
    But will it best a 2500k?
  • Anonymous
    Now if only AMD could get Drag Reduction System (DRS) going and up their instructions-per-cycle we could have a great race!
  • de5_Roy
    amd is making bold claims about power efficiency again.
    hopefully they'll do it right this time and not blame on everything else like they did with bulldozer.