AMD's Ryzen 7000 series processors with Zen 4 cores come with an I/O die and up to two CPU core dies (CCDs - often called chiplets) under their integrated heat spreader (IHS). Only the Ryzen 9 models need a second CCD chiplet to provide their higher core counts, but a TechTuber has recently confirmed a Ryzen 5 7600X CPU, which usually only has one CCD chiplet, has shipped with dual CCDs under the IHS.
What's happening? Nothing unusual, as AMD followed the same production methodology, designed to "maximize its production resources," with the prior generation. Specifically, inquisitive users found both Ryzen 7 5800X and Ryzen 5 5600X CPUs were rocking two CCDs, but just one was being used and was necessary.
The approach isn't a secret, or new. AMD was fully transparent about this aspect of its production strategy when Tom's Hardware's deputy managing editor asked about it last year.
In response to a question about dual CCDs in the lower-tier Ryzen 5000 processors, AMD said it uses this strategy to maximize production and minimize waste. It gave an example: "processors with one disabled CCD can be manufactured to spec as a Ryzen 7 5800X or Ryzen 5 5600X on the remaining CCD," AMD said, "Not many units need to take this route, but it nevertheless helps us ensure that customers have every opportunity to buy a high-performance Ryzen processor." AMD now apparently continues to use the same production methodology with its newer CPUs.
Tech-savvy PC DIYers and enthusiasts might have some concerns that a processor with one disabled CCD, and one active, might have weaker performance than one manufactured with a single CCD. To this question, AMD asserted that "The disabled CCD is permanently fused off at the factory and has no effect on the active die." So, there will be no latency penalty with the dual-CCD processors when one CCD is fused. Unfortunately, this response also closed the door on any user-hack aspirations regarding re-activating the surplus die.
Though we have effectively poured cold water on the "unexpected discovery," unearthed by TechTuber Der8auer in his Ryzen 5 7600X delidding video, the video is still worthy of attention.
So do you throw it away or fuse the connection to the bad die and sell it as a 6 or 8 core model?
Of course you sell it!
Bubba ain't no idiot.
Yes of course. But there will be some added latency due to location of the cores. However, if AMD did not fuse off the L3 cache, you will get 2x the cache.
It's commonly done in epyc.
Or those SKUs will come out later or on OEM products with unpublished specs.
I can't imagine a company intentionally putting two on the die and turning one off unless the process of putting each one on has a high failure rate, and they just write it off as a lower core count product and sell it anyhow?
What actually happened is that it doesn't cost much if anything to use two on a die than one, since their manufacturing cost was revealed to be about $70? So they fuse one ccd on a batch if they sell more one ccd cpu's than they intentionally made that way.
It makes perfect sense actually. Its to meet demands and reduce time needed for testing.
No, it doesn't cost them anything actually and they could potentially make more money. For CPUs that has 2 perfect dies, AMD simply mark it as 7950, if not so good, 7900.... If 1 die is very bad, 7700/7600 then. AMD/Intel usually do not rework CPU if it fails test. Imagine they solder jsut 1 die onto the substrate and found it to be bad, the whole CPU is useless... Now, they have 2 dies, if 1 is bad, they can still use it. Reduce wastage.
Of course, having 2 dies instead of 1 on each CPU means that the number of CPUs you can make is potentially halved..... So, it depends on demand. Right now, I believe AMD already know that 7950/7900 has very high demand. 7700/7600 will not have such demand at least till B650 boards are out.
Having multiple dies is just easier and more importantly cheaper.
The way I understood the article is most 7600/7700 ship with 1 CCD, but occasionally there would be a 2 CCD package with 1 fused off due to failure post packaging.