The U.S. government is putting money into radiation-resistant chips. It's investing the MESA (Microsystems, Engineering, Science and Applications) fabrication facility that makes such chips for usage in nuclear weapons, as reported by the Institute of Electrical and Electronics Engineers' magazine IEEE Spectrum today.
MESA is located at the U.S. Energy Department’s Sandia National Laboratories in New Mexico. The government is also investing another $170 million to improve the radiation-hardened chip line of SkyWater Technology Foundry (opens in new tab), in Bloomington, Minn., for other U.S. Department of Defense (DoD) needs.
Overdue for an Upgrade
The MESA fab has been making radiation-resistant chips for the U.S.’ nuclear arsenal for decades. However, although the chips are advanced enough to work reliably without being damaged by radiation, they are still using a highly antiquated 350nm process technology that was used for consumer chips for the first time back in 1994.
The facility was also making 150mm wafers, which are just about as old the the process node. The most advanced fabs currently make 300mm wafers, and there is also a thriving supply for 200mm wafers.
But the feds aren't interested in upgrading the MESA fab just because the tech was more than two decades old. Rather, the upgrades are about how difficult it's become to source the parts and raw materials for tools used to make the 150mm wafers.
MESA has already completed the first step in a four-step process that will allow the facility to make 200mm wafers. The conversion involves rebuilding chemical recipes, adjusting hundreds of process parameters and extensive testing. The upgrade should be completed by July 2021.
The facility will also upgrade to a 180nm process in parallel, which will double the transistor density of nuclear weapon chips.
Michael Holmes, senior manager of microfabrication at MESA said, that although their primary goal is to build radiation-hardened chips, it’s also important to scale the technology to provide denser and more complex logic function.
Enhancements to SkyWater Technology Foundry
The DoD is also providing $170 million SkyWater Technology Foundry to develop a 90nm process for radiation-hardened chips and copper interconnects. SkyWater should be able to build chips with this “newer” process node because the radiation-hardening requirements are not as stringent as they are for Sandia’s MESA facility. SkyWater’s chips are meant to be used in DoD’s military gear and in space.
SkyWater’s radiation-hardening process relies on silicon-on-insulator (SOI) technology, which uses a silicon wafer with a layer of oxide buried below the transistor layer. SOI chips are inherently more tolerant of radiation than regular silicon chips because ordinary silicon chips create charges that interfere with the chip’s operation when they are hit by radiation. Alternatively, in a SOI chip the oxide layer prevents the radiation-caused charge from reaching the transistor layer.
SkyWater will also replace its use of aluminum in interconnects with copper, a move that the consumer chip industry made about 15 years ago. The use of copper interconnects combined with support for the 65nm and 45nm process technology in the near future means that SkyWater will be able to build chips that resemble modern consumer chips. As such, the company will be able to make high-end mixed signal chips for the Internet of Things, chiplets and silicon interposers.
The U.S. government will fund the first phase of SkyWater’s facility upgrade with $80 million, with the rest to come in the next phases.