Cutting Fat, Adding Horsepower
The 65 nm Core 2 Duo (Merom) family that originally drove Intel’s Santa Rosa platform did well enough for a 65 nm part, offering 4 MB of L2 cache and 800 MHz front side bus speeds. However, those 34 W parts were akin to power-hungry V8 engines, serving up plenty of performance at a cost to battery mileage.
Now, don’t get us wrong. Intel is still alive and well at the 35 W TDP level with Centrino 2. The shift to 45 nm has done wonders for the chip’s energy efficiency, though. So, while all five Montevina-certified Core 2 Duo processors employ a brand new 1066 MHz front side bus setting, three of the five models feature 25 W TDPs. At 25 W, the Core 2 Duo comes across as more of a turbo V6, sipping fuel as it serves up performance.
From an architectural perspective, there’s nothing particularly groundbreaking about the new Core 2 Duos. They’re divided up into two families: T9xxx and Pxxxx, with the former featuring a 35 W ceiling and the latter ducking in at 25 W. Both the 2.8 GHz T9600 and 2.53 GHz T9400 boast 6 MB L2 cache repositories, while the P8600 (2.4 GHz) and P8400 (2.26 GHz) feature 3 MB caches. The one outlier is Intel’s Core 2 Duo P9500, running at 2.53 GHz, armed with 6 MB, and inside the 25 W barrier. That’s the chip we’re more excited about.
Mobile gamers have a sixth option, though it’ll be pricey at $851 in 1000-unit trays: Intel’s Core 2 Extreme Mobile X9100. The Extreme chip runs at 3.06 GHz, has a 1066 MHz bus, and includes 6 MB cache. Naturally, its 44 W TDP will probably require extra concessions for cooling — even more so when you consider the chip isn’t constrained by a locked clock multiplier. Notebook overclocking? Sure, why not? No doubt enthusiast-oriented notebook vendors will build well-ventilated platforms around the X9100, assuming it inherits the scalability already associated with Intel’s 45 nm Penryn design.
A handful of other enhancements offered by the desktop Penryn processors have found their way into these mobile Core 2 Duo chips as well. For instance, Intel claims the High-K 45 nm process is instrumental in minimizing leakage, thereby improving battery life. A deep power down (C6) state, which turns off caches, the core clock, and PLL, yields a significant reduction in idle power. And Dynamic Acceleration Technology boosts the operating frequency of one processor core in single-threaded applications when the other core is idling. The result is an optimized operating mode that does not negatively impact the chip’s thermals, but does help it push through demanding applications faster.