All of the previously discussed DRAM have separate address, data and control lines which limits the speed at which the device can operate with current technology. In order to overcome this limitation, several designs implement all of these signals on the same bus. The two protocol based designs currently getting the most attention are SyncLink DRAM (now called SLDRAM due to trademark issues) and Direct Rambus DRAM (DRDRAM) licensed by Rambus, Inc.