Siddharth Garg, an assistant professor of electrical and computer engineering at the NYU Tandon School of Engineering, along with a few researchers from other universities, is developing two modules that can validate that a chip works as it was intended in the original design. The technology should help ensure that the chip hasn’t been sabotaged by bad actors inside the manufacturing facilities.
Medical devices, public infrastructure and voting machines, as well as financial, military and government electronics could all be compromised long before their first use if backdoors were added to their chips during the manufacturing process. The issue could affect CPUs, GPUs and motherboards, but also storage and memory components.
These days we’re seeing more companies employ cryptographic signing for their software to ensure that the code delivered to the users is identical what was written by the vendors (although not all companies are taking this to heart yet). A similar validation process is needed for hardware to ensure its integrity.
“Under the current system, I can get a chip back from a foundry with an embedded Trojan. It might not show up during post-fabrication testing, so I’ll send it to the customer,” said Garg.
“But two years down the line it could begin misbehaving. The nice thing about our solution is that I don’t have to trust the chip because every time I give it a new input, it produces the output and the proofs of correctness, and the external module lets me continuously validate those proofs,” he added.
Garg called this method “verifiable computing” (VC). Garg and his team created two modules, wherein one is embedded in the chip and proves that its calculations are correct, and an external module that checks whether the embedded module itself was compromised or not. The external module, which is an ASIC (application-specific integrated circuit), can be fabricated separately from the chip.
“Employing an external verification unit made by a trusted fabricator means that I can go to an untrusted foundry to produce a chip that has not only the circuitry-performing computations, but also a module that presents proofs of correctness,” said Garg.
The researchers plan to use a $3 million grant they received from the National Science Foundation to improve the performance of the two modules and test the concept on real silicon as soon as possible.