An Intel graphics hardware engineer has revealed the codename of a new Intel integrated graphics unit and CPU architecture, known as Panther Lake, in his job description on LinkedIn. The engineer has since pulled the information, but Tom's Hardware viewed and screenshotted the blurb while it was live.
Nothing is known about this mysterious architecture, but we know the iGP will run on a version of Intel's Xe3 Celestial GPU architecture. According to the LinkedIn profile Panther Lake and its associated iGP are set to be announced during Intel Architecture Day 22. If true, we should know some official architectural and power specifications by then.
Based on the details given, Panther Lake and its associated integrated graphics processor will be produced several years down the road after Meteor Lake, Arrow Lake, and Lunar Lake are released. Lunar Lake - Intel's furthest CPU architecture of the three, is set to arrive sometime in 2024. So Panther Lake will probably arrive somewhere around 2024 or 2025.
Based on this timeline, we guess Panther Lake (as a CPU architecture) will probably utilize Intel's 20A manufacturing process that is set to arrive in the second half of 2024. 20A is a major milestone for Intel and is the first node to enter the angstrom era, where the physical features of a chip can no longer be accurately measured in nanometers. Instead, the chips will be measured in angstroms - or one ten-billionth of a meter.
This does not mean that the individual transistors are guaranteed to be below a single nanometer in size, just that the physical features can no longer be measured on the nanometer scale. Alongside this new breakthrough, 20A will feature a brand new transistor architecture called RibbonFET - a successor to EUV, and a new transistor wiring technology called the PowerVia interconnect.
Intel doesn't specify performance or wattage gains, but it's safe to assume that 20A will feature an enormous performance advantage over Alder Lake and Raptor Lake. For reference, Intel 4 - which will be used on Meteor Lake promises a 20% performance per watt gain, over Alder/Raptor Lake. While Intel 3 - will provide an 18% performance per watt improvement over Intel 4.
If this same trend follows, Intel 20A will probably be at least another 15% more efficient than Intel 3, making Panther Lake possibly 50% more efficient than Alder Lake or Raptor Lake.
Panther Lake iGP
Similar to the CPU side of the equation, we know basically nothing about Intel's Celestial GPU architecture. Celestial will be Intel's 3rd generation GPU following Arc Alchemist and Battlemage, operating under the Xe3 nomenclature.
However, one fact that is made clear by the LinkedIn description is that Celestial will not only be used in discrete GPUs but will also be used in Intel's integrated graphics solutions. This isn't surprising, considering Intel does this today with its current GPU architectures, but it's good to know that Intel is confident enough in its new discrete GPU architectures to continue using them in its integrated graphics solutions as well.
Intel is absolutely unreliable in terms of execution, so even any confirmed letter of intent is basically as good as worthless giving that.
Yes and no. At 20A, you have to use GAA
BTW: Sometimes these "leaks" are intentional.
And why does Intel get the image credit? Wasn't it taken from LinkedIn, where it was posted by the employee themself?
Please don't make such claims. 20A is a marketing name, only. No feature on those chips will be 20 angstroms or less. All you need to say about it, for people who haven't been paying attention, is that it's the node which comes after Intel 3.
Then I think it's irresponsible to make specific claims about efficiency in the headline, based on simplistic extrapolation. Even if the extrapolation is correct, a lot of things affect efficiency, beyond just the process node.
It did clarify one thing for me, which is the timing of Arrow Lake. I had thought it would be a successor to Meteor Lake, but this suggests they're more contemporaneous and possibly just targeted at different market segments.
Transistor architectures have gone through many generations: Bipolar, NMOS, CMOS, planar, FinFET (aka TriGate only at Intel), RibbonFET (aka GAA - Gate All Around, or Nanosheet).
The PowerVia technology will be used for power and ground interconnect through the backside of the thinned out wafer, while general interconnect remains on the topside of the wafer.
Performance and power savings on the planned nodes are very dependent on parasitic capacitance, resistance and even inductance, so let's wait and see what benefits the technology delivers.
We talk deeply about this semiconductor technology over at SemiWiki.